; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-SDAG,GFX1250-SDAG-FAKE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-GISEL,GFX1250-GISEL-FAKE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-SDAG,GFX1250-SDAG-REAL16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-GISEL,GFX1250-GISEL-REAL16 %s

define <2 x half> @fminimum3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c) {
; GFX1250-SDAG-LABEL: fminimum3_v2f16:
; GFX1250-SDAG:       ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v0, v2, v0, v1
; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fminimum3_v2f16:
; GFX1250-GISEL:       ; %bb.0: ; %entry
; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, v0, v1, v1
; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, v2, v0, v0
; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]
entry:
  %min = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b)
  %res = call <2 x half> @llvm.minimum.v2f16(<2 x half> %c, <2 x half> %min)
  ret <2 x half> %res
}

define <2 x half> @fminimum3_v2f16_vss(<2 x half> %a, <2 x half> inreg %b, <2 x half> inreg %c) {
; GFX1250-SDAG-LABEL: fminimum3_v2f16_vss:
; GFX1250-SDAG:       ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v0, s1, v0, s0
; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fminimum3_v2f16_vss:
; GFX1250-GISEL:       ; %bb.0: ; %entry
; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, v0, s0, s0
; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, s1, v0, v0
; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]
entry:
  %min = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b)
  %res = call <2 x half> @llvm.minimum.v2f16(<2 x half> %c, <2 x half> %min)
  ret <2 x half> %res
}

define <3 x half> @fminimum3_v3f16(<3 x half> %a, <3 x half> %b, <3 x half> %c) {
; GFX1250-SDAG-LABEL: fminimum3_v3f16:
; GFX1250-SDAG:       ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v0, v4, v0, v2
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v1, v5, v1, v3
; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-FAKE16-LABEL: fminimum3_v3f16:
; GFX1250-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1250-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX1250-GISEL-FAKE16-NEXT:    v_minimum_f16 v1, v1, v3
; GFX1250-GISEL-FAKE16-NEXT:    v_pk_minimum3_f16 v0, v0, v2, v2
; GFX1250-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-GISEL-FAKE16-NEXT:    v_minimum_f16 v1, v5, v1
; GFX1250-GISEL-FAKE16-NEXT:    v_pk_minimum3_f16 v0, v4, v0, v0
; GFX1250-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-GISEL-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX1250-GISEL-FAKE16-NEXT:    v_lshl_or_b32 v1, s0, 16, v1
; GFX1250-GISEL-FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-REAL16-LABEL: fminimum3_v3f16:
; GFX1250-GISEL-REAL16:       ; %bb.0: ; %entry
; GFX1250-GISEL-REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL-REAL16-NEXT:    s_wait_kmcnt 0x0
; GFX1250-GISEL-REAL16-NEXT:    v_pk_minimum3_f16 v0, v0, v2, v2
; GFX1250-GISEL-REAL16-NEXT:    v_minimum_f16 v1.l, v1.l, v3.l
; GFX1250-GISEL-REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-GISEL-REAL16-NEXT:    v_pk_minimum3_f16 v0, v4, v0, v0
; GFX1250-GISEL-REAL16-NEXT:    v_minimum_f16 v1.l, v5.l, v1.l
; GFX1250-GISEL-REAL16-NEXT:    s_set_pc_i64 s[30:31]
entry:
  %min = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> %b)
  %res = call <3 x half> @llvm.minimum.v3f16(<3 x half> %c, <3 x half> %min)
  ret <3 x half> %res
}

define <4 x half> @fminimum3_v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) {
; GFX1250-SDAG-LABEL: fminimum3_v4f16:
; GFX1250-SDAG:       ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v0, v4, v0, v2
; GFX1250-SDAG-NEXT:    v_pk_minimum3_f16 v1, v5, v1, v3
; GFX1250-SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fminimum3_v4f16:
; GFX1250-GISEL:       ; %bb.0: ; %entry
; GFX1250-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, v0, v2, v2
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v1, v1, v3, v3
; GFX1250-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v0, v4, v0, v0
; GFX1250-GISEL-NEXT:    v_pk_minimum3_f16 v1, v5, v1, v1
; GFX1250-GISEL-NEXT:    s_set_pc_i64 s[30:31]
entry:
  %min = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> %b)
  %res = call <4 x half> @llvm.minimum.v4f16(<4 x half> %c, <4 x half> %min)
  ret <4 x half> %res
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX1250: {{.*}}
; GFX1250-SDAG-FAKE16: {{.*}}
; GFX1250-SDAG-REAL16: {{.*}}