; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 ; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefixes=GFX8GISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefixes=GFX9GISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -global-isel=0 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GFX10DAGISEL,GFX1064DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -global-isel=1 -new-reg-bank-select -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GFX10GISEL,GFX1064GISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -global-isel=0 < %s | FileCheck -check-prefixes=GFX10DAGISEL,GFX1032DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefixes=GFX10GISEL,GFX1032GISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GFX1164DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -new-reg-bank-select -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GFX1164GISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 < %s | FileCheck -check-prefixes=GFX1132DAGISEL %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefixes=GFX1132GISEL %s define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 { ; GFX8DAGISEL-LABEL: uniform_value: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX8DAGISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: uniform_value: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8GISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: uniform_value: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX9DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: uniform_value: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX10DAGISEL-LABEL: uniform_value: ; GFX10DAGISEL: ; %bb.0: ; %entry ; GFX10DAGISEL-NEXT: s_clause 0x1 ; GFX10DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX10DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX10DAGISEL-NEXT: s_endpgm ; ; GFX10GISEL-LABEL: uniform_value: ; GFX10GISEL: ; %bb.0: ; %entry ; GFX10GISEL-NEXT: s_clause 0x1 ; GFX10GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX10GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX10GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX10GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: uniform_value: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_clause 0x1 ; GFX1164DAGISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1164DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: uniform_value: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_clause 0x1 ; GFX1164GISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1164GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: uniform_value: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_clause 0x1 ; GFX1132DAGISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 ; GFX1132DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: uniform_value: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_clause 0x1 ; GFX1132GISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2 ; GFX1132GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %result = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %in, i32 1) store i32 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 { ; GFX8DAGISEL-LABEL: divergent_value: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX8DAGISEL-NEXT: s_brev_b32 s4, 1 ; GFX8DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX8DAGISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX8DAGISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX8DAGISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX8DAGISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX8DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX8DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX8DAGISEL-NEXT: ; %bb.2: ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX8DAGISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: divergent_value: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX8GISEL-NEXT: s_brev_b32 s4, 1 ; GFX8GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX8GISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX8GISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX8GISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX8GISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX8GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX8GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX8GISEL-NEXT: ; %bb.2: ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8GISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: divergent_value: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX9DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX9DAGISEL-NEXT: s_brev_b32 s4, 1 ; GFX9DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX9DAGISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX9DAGISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX9DAGISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX9DAGISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX9DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX9DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX9DAGISEL-NEXT: ; %bb.2: ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: divergent_value: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX9GISEL-NEXT: s_brev_b32 s4, 1 ; GFX9GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX9GISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX9GISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX9GISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX9GISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX9GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX9GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX9GISEL-NEXT: ; %bb.2: ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX1064DAGISEL-LABEL: divergent_value: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1064DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1064DAGISEL-NEXT: s_brev_b32 s4, 1 ; GFX1064DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1064DAGISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX1064DAGISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX1064DAGISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX1064DAGISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX1064DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1064DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1064DAGISEL-NEXT: ; %bb.2: ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX1064DAGISEL-NEXT: s_endpgm ; ; GFX1064GISEL-LABEL: divergent_value: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1064GISEL-NEXT: s_brev_b32 s4, 1 ; GFX1064GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1064GISEL-NEXT: s_ff1_i32_b64 s5, s[2:3] ; GFX1064GISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX1064GISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX1064GISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX1064GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1064GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1064GISEL-NEXT: ; %bb.2: ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX1064GISEL-NEXT: s_endpgm ; ; GFX1032DAGISEL-LABEL: divergent_value: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1032DAGISEL-NEXT: s_mov_b32 s3, exec_lo ; GFX1032DAGISEL-NEXT: s_brev_b32 s2, 1 ; GFX1032DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1032DAGISEL-NEXT: s_ff1_i32_b32 s4, s3 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s5, v0, s4 ; GFX1032DAGISEL-NEXT: s_bitset0_b32 s3, s4 ; GFX1032DAGISEL-NEXT: s_max_i32 s2, s2, s5 ; GFX1032DAGISEL-NEXT: s_cmp_lg_u32 s3, 0 ; GFX1032DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1032DAGISEL-NEXT: ; %bb.2: ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX1032DAGISEL-NEXT: s_endpgm ; ; GFX1032GISEL-LABEL: divergent_value: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032GISEL-NEXT: s_mov_b32 s3, exec_lo ; GFX1032GISEL-NEXT: s_brev_b32 s2, 1 ; GFX1032GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1032GISEL-NEXT: s_ff1_i32_b32 s4, s3 ; GFX1032GISEL-NEXT: v_readlane_b32 s5, v0, s4 ; GFX1032GISEL-NEXT: s_bitset0_b32 s3, s4 ; GFX1032GISEL-NEXT: s_max_i32 s2, s2, s5 ; GFX1032GISEL-NEXT: s_cmp_lg_u32 s3, 0 ; GFX1032GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1032GISEL-NEXT: ; %bb.2: ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX1032GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: divergent_value: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164DAGISEL-NEXT: s_brev_b32 s4, 1 ; GFX1164DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1164DAGISEL-NEXT: s_ctz_i32_b64 s5, s[2:3] ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164DAGISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX1164DAGISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX1164DAGISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX1164DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1164DAGISEL-NEXT: ; %bb.2: ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: divergent_value: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164GISEL-NEXT: s_brev_b32 s4, 1 ; GFX1164GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1164GISEL-NEXT: s_ctz_i32_b64 s5, s[2:3] ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164GISEL-NEXT: v_readlane_b32 s6, v0, s5 ; GFX1164GISEL-NEXT: s_bitset0_b64 s[2:3], s5 ; GFX1164GISEL-NEXT: s_max_i32 s4, s4, s6 ; GFX1164GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1164GISEL-NEXT: ; %bb.2: ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: divergent_value: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0 ; GFX1132DAGISEL-NEXT: s_mov_b32 s3, exec_lo ; GFX1132DAGISEL-NEXT: s_brev_b32 s2, 1 ; GFX1132DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1132DAGISEL-NEXT: s_ctz_i32_b32 s4, s3 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132DAGISEL-NEXT: v_readlane_b32 s5, v0, s4 ; GFX1132DAGISEL-NEXT: s_bitset0_b32 s3, s4 ; GFX1132DAGISEL-NEXT: s_max_i32 s2, s2, s5 ; GFX1132DAGISEL-NEXT: s_cmp_lg_u32 s3, 0 ; GFX1132DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1132DAGISEL-NEXT: ; %bb.2: ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: divergent_value: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132GISEL-NEXT: s_mov_b32 s3, exec_lo ; GFX1132GISEL-NEXT: s_brev_b32 s2, 1 ; GFX1132GISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 ; GFX1132GISEL-NEXT: s_ctz_i32_b32 s4, s3 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132GISEL-NEXT: v_readlane_b32 s5, v0, s4 ; GFX1132GISEL-NEXT: s_bitset0_b32 s3, s4 ; GFX1132GISEL-NEXT: s_max_i32 s2, s2, s5 ; GFX1132GISEL-NEXT: s_cmp_lg_u32 s3, 0 ; GFX1132GISEL-NEXT: s_cbranch_scc1 .LBB1_1 ; GFX1132GISEL-NEXT: ; %bb.2: ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %id.x = call i32 @llvm.amdgcn.workitem.id.x() %result = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %id.x, i32 1) store i32 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 { ; GFX8DAGISEL-LABEL: uniform_value_dpp: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX8DAGISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: uniform_value_dpp: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8GISEL-NEXT: flat_store_dword v[0:1], v2 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: uniform_value_dpp: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX9DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: uniform_value_dpp: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX10DAGISEL-LABEL: uniform_value_dpp: ; GFX10DAGISEL: ; %bb.0: ; %entry ; GFX10DAGISEL-NEXT: s_clause 0x1 ; GFX10DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX10DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX10DAGISEL-NEXT: s_endpgm ; ; GFX10GISEL-LABEL: uniform_value_dpp: ; GFX10GISEL: ; %bb.0: ; %entry ; GFX10GISEL-NEXT: s_clause 0x1 ; GFX10GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX10GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX10GISEL-NEXT: global_store_dword v1, v0, s[0:1] ; GFX10GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: uniform_value_dpp: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_clause 0x1 ; GFX1164DAGISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1164DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: uniform_value_dpp: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_clause 0x1 ; GFX1164GISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1164GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: uniform_value_dpp: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_clause 0x1 ; GFX1132DAGISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 ; GFX1132DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: uniform_value_dpp: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_clause 0x1 ; GFX1132GISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2 ; GFX1132GISEL-NEXT: global_store_b32 v1, v0, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %result = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %in, i32 2) store i32 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 { ; GFX8DAGISEL-LABEL: divergent_value_dpp: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX8DAGISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX8DAGISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX8DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8DAGISEL-NEXT: flat_store_dword v[2:3], v0 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: divergent_value_dpp: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX8GISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX8GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX8GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8GISEL-NEXT: flat_store_dword v[2:3], v0 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: divergent_value_dpp: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX9DAGISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX9DAGISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX9DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: global_store_dword v2, v0, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: divergent_value_dpp: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX9GISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX9GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX9GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: global_store_dword v2, v0, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX1064DAGISEL-LABEL: divergent_value_dpp: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1064DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064DAGISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1064DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1064DAGISEL-NEXT: global_store_dword v0, v4, s[0:1] ; GFX1064DAGISEL-NEXT: s_endpgm ; ; GFX1064GISEL-LABEL: divergent_value_dpp: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1064GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1064GISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064GISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1064GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1064GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v4, 0 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: global_store_dword v4, v0, s[0:1] ; GFX1064GISEL-NEXT: s_endpgm ; ; GFX1032DAGISEL-LABEL: divergent_value_dpp: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1032DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s3 ; GFX1032DAGISEL-NEXT: global_store_dword v0, v3, s[0:1] ; GFX1032DAGISEL-NEXT: s_endpgm ; ; GFX1032GISEL-LABEL: divergent_value_dpp: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1032GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1032GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1032GISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s3 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, 0 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: global_store_dword v3, v0, s[0:1] ; GFX1032GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: divergent_value_dpp: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1164DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164DAGISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1164DAGISEL-NEXT: global_store_b32 v0, v4, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: divergent_value_dpp: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1164GISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164GISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v4, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: global_store_b32 v4, v0, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: divergent_value_dpp: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s3 ; GFX1132DAGISEL-NEXT: global_store_b32 v0, v3, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: divergent_value_dpp: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v3, 0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: global_store_b32 v3, v0, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %id.x = call i32 @llvm.amdgcn.workitem.id.x() %result = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %id.x, i32 2) store i32 %result, ptr addrspace(1) %out ret void } define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 { ; GFX8DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX8DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; GFX8DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX8DAGISEL-NEXT: v_bfrev_b32_e32 v4, 1 ; GFX8DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0, v2, s[4:5] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e64 v6, v4, v3, s[4:5] ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v8, v6 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v8, v8 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[7:8] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v8, v6, vcc ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8DAGISEL-NEXT: s_nop 0 ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8DAGISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX8DAGISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX8DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX8DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; GFX8DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX8GISEL-LABEL: divergent_value_dpp_i64: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX8GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; GFX8GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8GISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX8GISEL-NEXT: v_bfrev_b32_e32 v4, 1 ; GFX8GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v2, s[4:5] ; GFX8GISEL-NEXT: v_cndmask_b32_e64 v6, v4, v3, s[4:5] ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: v_mov_b32_e32 v8, v6 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v8, v8 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[7:8] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v7, v5, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v8, v6, vcc ; GFX8GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX8GISEL-NEXT: s_nop 0 ; GFX8GISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX8GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX8GISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX8GISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX8GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX8GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; GFX8GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX9DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; GFX9DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX9DAGISEL-NEXT: v_bfrev_b32_e32 v4, 1 ; GFX9DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0, v2, s[4:5] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e64 v6, v4, v3, s[4:5] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v8, v6 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v8, v8 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[7:8] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v8, v6, vcc ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9DAGISEL-NEXT: s_nop 0 ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9DAGISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX9DAGISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX9DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX9DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX9DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; GFX9DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX9DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX9GISEL-LABEL: divergent_value_dpp_i64: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; GFX9GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9GISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX9GISEL-NEXT: v_bfrev_b32_e32 v4, 1 ; GFX9GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v2, s[4:5] ; GFX9GISEL-NEXT: v_cndmask_b32_e64 v6, v4, v3, s[4:5] ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: v_mov_b32_e32 v8, v6 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v8, v8 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[7:8] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v7, v5, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v8, v6, vcc ; GFX9GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX9GISEL-NEXT: s_nop 0 ; GFX9GISEL-NEXT: v_mov_b32_dpp v6, v6 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_mov_b32_dpp v7, v7 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX9GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX9GISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX9GISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX9GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX9GISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX9GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX9GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; GFX9GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX9GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1064DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1064DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX1064DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX1064DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s[4:5] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s[4:5] ; GFX1064DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v8, -1, 0 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v8, -1, v8 ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_add_nc_u32_e32 v8, 32, v8 ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_mul_lo_u32 v8, 4, v8 ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1064DAGISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: ds_permute_b32 v6, v8, v4 ; GFX1064DAGISEL-NEXT: ds_permute_b32 v7, v8, v5 ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064DAGISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX1064DAGISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX1064DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1064DAGISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX1064DAGISEL-NEXT: s_clause 0x6 ; 28-byte Folded Reload ; GFX1064DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; GFX1064DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; GFX1064DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; GFX1064DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; GFX1064DAGISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; GFX1064DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; GFX1064DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; GFX1064DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1064DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1064GISEL-LABEL: divergent_value_dpp_i64: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1064GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX1064GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill ; GFX1064GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX1064GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s[4:5] ; GFX1064GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s[4:5] ; GFX1064GISEL-NEXT: v_mbcnt_lo_u32_b32 v8, -1, 0 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064GISEL-NEXT: v_mbcnt_hi_u32_b32 v8, -1, v8 ; GFX1064GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_add_nc_u32_e32 v8, 32, v8 ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_mul_lo_u32 v8, 4, v8 ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1064GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1064GISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: ds_permute_b32 v6, v8, v4 ; GFX1064GISEL-NEXT: ds_permute_b32 v7, v8, v5 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1064GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1064GISEL-NEXT: v_readlane_b32 s6, v4, 63 ; GFX1064GISEL-NEXT: v_readlane_b32 s7, v5, 63 ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, s6 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v3, s7 ; GFX1064GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1064GISEL-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX1064GISEL-NEXT: s_clause 0x6 ; 28-byte Folded Reload ; GFX1064GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; GFX1064GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; GFX1064GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; GFX1064GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; GFX1064GISEL-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:16 ; GFX1064GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:20 ; GFX1064GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:24 ; GFX1064GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[4:5] ; GFX1064GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1064GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1032DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1032DAGISEL-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX1032DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX1032DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s4 ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s6, -1 ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s6 ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s6 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032DAGISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1032DAGISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032DAGISEL-NEXT: v_readlane_b32 s4, v4, 31 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s5, v5, 31 ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s6 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1032DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1032DAGISEL-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX1032DAGISEL-NEXT: s_clause 0x5 ; 24-byte Folded Reload ; GFX1032DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; GFX1032DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; GFX1032DAGISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; GFX1032DAGISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; GFX1032DAGISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:16 ; GFX1032DAGISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:20 ; GFX1032DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s4 ; GFX1032DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1032DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1032GISEL-LABEL: divergent_value_dpp_i64: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1032GISEL-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX1032GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX1032GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s4 ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s6, -1 ; GFX1032GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s6 ; GFX1032GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s6 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1032GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032GISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1032GISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc_lo ; GFX1032GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc_lo ; GFX1032GISEL-NEXT: v_readlane_b32 s4, v4, 31 ; GFX1032GISEL-NEXT: v_readlane_b32 s5, v5, 31 ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s6 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1032GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1032GISEL-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX1032GISEL-NEXT: s_clause 0x5 ; 24-byte Folded Reload ; GFX1032GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 ; GFX1032GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:4 ; GFX1032GISEL-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:8 ; GFX1032GISEL-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:12 ; GFX1032GISEL-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:16 ; GFX1032GISEL-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:20 ; GFX1032GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s4 ; GFX1032GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1032GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1164DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1164DAGISEL-NEXT: s_xor_saveexec_b64 s[0:1], -1 ; GFX1164DAGISEL-NEXT: s_clause 0x4 ; 28-byte Folded Spill ; GFX1164DAGISEL-NEXT: scratch_store_b64 off, v[4:5], s32 ; GFX1164DAGISEL-NEXT: scratch_store_b64 off, v[6:7], s32 offset:8 ; GFX1164DAGISEL-NEXT: scratch_store_b32 off, v8, s32 offset:16 ; GFX1164DAGISEL-NEXT: scratch_store_b32 off, v4, s32 offset:20 ; GFX1164DAGISEL-NEXT: scratch_store_b32 off, v5, s32 offset:24 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s[0:1] ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s[0:1] ; GFX1164DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v8, -1, 0 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v8, -1, v8 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_add_nc_u32_e32 v8, 32, v8 ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_mul_lo_u32 v8, 4, v8 ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1164DAGISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: ds_permute_b32 v6, v8, v4 ; GFX1164DAGISEL-NEXT: ds_permute_b32 v7, v8, v5 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_readlane_b32 s2, v4, 63 ; GFX1164DAGISEL-NEXT: v_readlane_b32 s3, v5, 63 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v3, s3 ; GFX1164DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1164DAGISEL-NEXT: s_xor_saveexec_b64 s[0:1], -1 ; GFX1164DAGISEL-NEXT: s_waitcnt_depctr depctr_sa_sdst(0) ; GFX1164DAGISEL-NEXT: s_clause 0x4 ; 28-byte Folded Reload ; GFX1164DAGISEL-NEXT: scratch_load_b64 v[4:5], off, s32 ; GFX1164DAGISEL-NEXT: scratch_load_b64 v[6:7], off, s32 offset:8 ; GFX1164DAGISEL-NEXT: scratch_load_b32 v8, off, s32 offset:16 ; GFX1164DAGISEL-NEXT: scratch_load_b32 v4, off, s32 offset:20 ; GFX1164DAGISEL-NEXT: scratch_load_b32 v5, off, s32 offset:24 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1164DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1164GISEL-LABEL: divergent_value_dpp_i64: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1164GISEL-NEXT: s_xor_saveexec_b64 s[0:1], -1 ; GFX1164GISEL-NEXT: s_clause 0x4 ; 28-byte Folded Spill ; GFX1164GISEL-NEXT: scratch_store_b64 off, v[4:5], s32 ; GFX1164GISEL-NEXT: scratch_store_b64 off, v[6:7], s32 offset:8 ; GFX1164GISEL-NEXT: scratch_store_b32 off, v8, s32 offset:16 ; GFX1164GISEL-NEXT: scratch_store_b32 off, v4, s32 offset:20 ; GFX1164GISEL-NEXT: scratch_store_b32 off, v5, s32 offset:24 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1164GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s[0:1] ; GFX1164GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s[0:1] ; GFX1164GISEL-NEXT: v_mbcnt_lo_u32_b32 v8, -1, 0 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164GISEL-NEXT: v_mbcnt_hi_u32_b32 v8, -1, v8 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1164GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_add_nc_u32_e32 v8, 32, v8 ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_mul_lo_u32 v8, 4, v8 ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: v_mov_b32_e32 v6, v4 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v7, v5 ; GFX1164GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1164GISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: ds_permute_b32 v6, v8, v4 ; GFX1164GISEL-NEXT: ds_permute_b32 v7, v8, v5 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[6:7] ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_va_vcc(0) ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc ; GFX1164GISEL-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_readlane_b32 s2, v4, 63 ; GFX1164GISEL-NEXT: v_readlane_b32 s3, v5, 63 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v3, s3 ; GFX1164GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1164GISEL-NEXT: s_xor_saveexec_b64 s[0:1], -1 ; GFX1164GISEL-NEXT: s_waitcnt_depctr depctr_sa_sdst(0) ; GFX1164GISEL-NEXT: s_clause 0x4 ; 28-byte Folded Reload ; GFX1164GISEL-NEXT: scratch_load_b64 v[4:5], off, s32 ; GFX1164GISEL-NEXT: scratch_load_b64 v[6:7], off, s32 offset:8 ; GFX1164GISEL-NEXT: scratch_load_b32 v8, off, s32 offset:16 ; GFX1164GISEL-NEXT: scratch_load_b32 v4, off, s32 offset:20 ; GFX1164GISEL-NEXT: scratch_load_b32 v5, off, s32 offset:24 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1164GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1132DAGISEL-LABEL: divergent_value_dpp_i64: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1132DAGISEL-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX1132DAGISEL-NEXT: s_clause 0x3 ; 24-byte Folded Spill ; GFX1132DAGISEL-NEXT: scratch_store_b64 off, v[4:5], s32 ; GFX1132DAGISEL-NEXT: scratch_store_b64 off, v[6:7], s32 offset:8 ; GFX1132DAGISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16 ; GFX1132DAGISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20 ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s2 ; GFX1132DAGISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s2 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132DAGISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132DAGISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132DAGISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132DAGISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132DAGISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1132DAGISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132DAGISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132DAGISEL-NEXT: v_readlane_b32 s0, v4, 31 ; GFX1132DAGISEL-NEXT: v_readlane_b32 s1, v5, 31 ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0 ; GFX1132DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1132DAGISEL-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX1132DAGISEL-NEXT: s_clause 0x3 ; 24-byte Folded Reload ; GFX1132DAGISEL-NEXT: scratch_load_b64 v[4:5], off, s32 ; GFX1132DAGISEL-NEXT: scratch_load_b64 v[6:7], off, s32 offset:8 ; GFX1132DAGISEL-NEXT: scratch_load_b32 v4, off, s32 offset:16 ; GFX1132DAGISEL-NEXT: scratch_load_b32 v5, off, s32 offset:20 ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1132DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1132GISEL-LABEL: divergent_value_dpp_i64: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1132GISEL-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX1132GISEL-NEXT: s_clause 0x3 ; 24-byte Folded Spill ; GFX1132GISEL-NEXT: scratch_store_b64 off, v[4:5], s32 ; GFX1132GISEL-NEXT: scratch_store_b64 off, v[6:7], s32 offset:8 ; GFX1132GISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16 ; GFX1132GISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v2, s2 ; GFX1132GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, v3, s2 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132GISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132GISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132GISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v7, v5 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132GISEL-NEXT: v_mov_b32_dpp v6, v6 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_mov_b32_dpp v7, v7 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132GISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132GISEL-NEXT: ds_swizzle_b32 v6, v4 offset:swizzle(BROADCAST,32,15) ; GFX1132GISEL-NEXT: ds_swizzle_b32 v7, v5 offset:swizzle(BROADCAST,32,15) ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, v[4:5], v[6:7] ; GFX1132GISEL-NEXT: v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v7, v5 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1132GISEL-NEXT: v_readlane_b32 s0, v4, 31 ; GFX1132GISEL-NEXT: v_readlane_b32 s1, v5, 31 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0 ; GFX1132GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1132GISEL-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX1132GISEL-NEXT: s_clause 0x3 ; 24-byte Folded Reload ; GFX1132GISEL-NEXT: scratch_load_b64 v[4:5], off, s32 ; GFX1132GISEL-NEXT: scratch_load_b64 v[6:7], off, s32 offset:8 ; GFX1132GISEL-NEXT: scratch_load_b32 v4, off, s32 offset:16 ; GFX1132GISEL-NEXT: scratch_load_b32 v5, off, s32 offset:20 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX1132GISEL-NEXT: s_setpc_b64 s[30:31] entry: %result = call i64 @llvm.amdgcn.wave.reduce.max.i64(i64 %in, i32 2) store i64 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 { ; GFX8DAGISEL-LABEL: default_stratergy: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX8DAGISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX8DAGISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: s_nop 1 ; GFX8DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX8DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8DAGISEL-NEXT: flat_store_dword v[2:3], v0 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: default_stratergy: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX8GISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX8GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: s_nop 1 ; GFX8GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX8GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX8GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8GISEL-NEXT: flat_store_dword v[2:3], v0 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: default_stratergy: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX9DAGISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX9DAGISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: s_nop 1 ; GFX9DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX9DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: global_store_dword v2, v0, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: default_stratergy: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX9GISEL-NEXT: v_bfrev_b32_e32 v1, 1 ; GFX9GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[2:3] ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:15 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: s_nop 1 ; GFX9GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_bcast:31 row_mask:0xf bank_mask:0xf ; GFX9GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX9GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: global_store_dword v2, v0, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX1064DAGISEL-LABEL: default_stratergy: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1064DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1064DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1064DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064DAGISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1064DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1064DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1064DAGISEL-NEXT: global_store_dword v0, v4, s[0:1] ; GFX1064DAGISEL-NEXT: s_endpgm ; ; GFX1064GISEL-LABEL: default_stratergy: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1064GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1064GISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1064GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1064GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064GISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1064GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1064GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1064GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v4, 0 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: global_store_dword v4, v0, s[0:1] ; GFX1064GISEL-NEXT: s_endpgm ; ; GFX1032DAGISEL-LABEL: default_stratergy: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1032DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1032DAGISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0) ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1032DAGISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s3 ; GFX1032DAGISEL-NEXT: global_store_dword v0, v3, s[0:1] ; GFX1032DAGISEL-NEXT: s_endpgm ; ; GFX1032GISEL-LABEL: default_stratergy: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1032GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1032GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1032GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1032GISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1032GISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s3 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, 0 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: global_store_dword v3, v0, s[0:1] ; GFX1032GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: default_stratergy: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1164DAGISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1164DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164DAGISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1164DAGISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1164DAGISEL-NEXT: global_store_b32 v0, v4, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: default_stratergy: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[0:1], -1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1164GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s[0:1] ; GFX1164GISEL-NEXT: v_mbcnt_lo_u32_b32 v3, -1, 0 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mbcnt_hi_u32_b32 v3, -1, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_add_nc_u32_e32 v3, 32, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: v_mul_lo_u32 v3, 4, v3 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1164GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1164GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164GISEL-NEXT: ds_permute_b32 v2, v3, v1 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[0:1] ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[2:3], -1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_readlane_b32 s4, v1, 63 ; GFX1164GISEL-NEXT: s_mov_b64 exec, s[2:3] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v4, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: global_store_b32 v4, v0, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: default_stratergy: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132DAGISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132DAGISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1132DAGISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s3 ; GFX1132DAGISEL-NEXT: global_store_b32 v0, v3, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: default_stratergy: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s0, -1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; GFX1132GISEL-NEXT: v_cndmask_b32_e64 v1, 0x80000000, v0, s0 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf ; GFX1132GISEL-NEXT: ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_max_i32_e32 v1, v1, v2 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s0 ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s2, -1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_readlane_b32 s3, v1, 31 ; GFX1132GISEL-NEXT: s_mov_b32 exec_lo, s2 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v3, 0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: global_store_b32 v3, v0, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %id.x = call i32 @llvm.amdgcn.workitem.id.x() %result = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %id.x, i32 0) store i32 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 { ; GFX8DAGISEL-LABEL: divergent_cfg: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX8DAGISEL-NEXT: ; implicit-def: $sgpr2 ; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX8DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX8DAGISEL-NEXT: ; %bb.1: ; %else ; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX8DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX8DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX8DAGISEL-NEXT: ; %bb.3: ; %if ; GFX8DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX8DAGISEL-NEXT: s_brev_b32 s6, 1 ; GFX8DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX8DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX8DAGISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX8DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX8DAGISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX8DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX8DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX8DAGISEL-NEXT: ; %bb.5: ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX8DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX8DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8DAGISEL-NEXT: flat_store_dword v[2:3], v1 ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: divergent_cfg: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX8GISEL-NEXT: ; implicit-def: $sgpr2 ; GFX8GISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX8GISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX8GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX8GISEL-NEXT: ; %bb.1: ; %else ; GFX8GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX8GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: s_mov_b32 s2, s2 ; GFX8GISEL-NEXT: .LBB6_2: ; %Flow ; GFX8GISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX8GISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX8GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX8GISEL-NEXT: ; %bb.3: ; %if ; GFX8GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX8GISEL-NEXT: s_brev_b32 s6, 1 ; GFX8GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX8GISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX8GISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX8GISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX8GISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX8GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX8GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX8GISEL-NEXT: ; %bb.5: ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX8GISEL-NEXT: .LBB6_6: ; %endif ; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8GISEL-NEXT: flat_store_dword v[2:3], v1 ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: divergent_cfg: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX9DAGISEL-NEXT: ; implicit-def: $sgpr2 ; GFX9DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX9DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX9DAGISEL-NEXT: ; %bb.1: ; %else ; GFX9DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX9DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX9DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX9DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX9DAGISEL-NEXT: ; %bb.3: ; %if ; GFX9DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX9DAGISEL-NEXT: s_brev_b32 s6, 1 ; GFX9DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX9DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX9DAGISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX9DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX9DAGISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX9DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX9DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX9DAGISEL-NEXT: ; %bb.5: ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX9DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX9DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: divergent_cfg: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX9GISEL-NEXT: ; implicit-def: $sgpr2 ; GFX9GISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX9GISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX9GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX9GISEL-NEXT: ; %bb.1: ; %else ; GFX9GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX9GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: s_mov_b32 s2, s2 ; GFX9GISEL-NEXT: .LBB6_2: ; %Flow ; GFX9GISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX9GISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX9GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX9GISEL-NEXT: ; %bb.3: ; %if ; GFX9GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX9GISEL-NEXT: s_brev_b32 s6, 1 ; GFX9GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX9GISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX9GISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX9GISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX9GISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX9GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX9GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX9GISEL-NEXT: ; %bb.5: ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX9GISEL-NEXT: .LBB6_6: ; %endif ; GFX9GISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX1064DAGISEL-LABEL: divergent_cfg: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX1064DAGISEL-NEXT: ; implicit-def: $sgpr2 ; GFX1064DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX1064DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX1064DAGISEL-NEXT: ; %bb.1: ; %else ; GFX1064DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX1064DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1064DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1064DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX1064DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1064DAGISEL-NEXT: ; %bb.3: ; %if ; GFX1064DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1064DAGISEL-NEXT: s_brev_b32 s6, 1 ; GFX1064DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1064DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX1064DAGISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX1064DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX1064DAGISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX1064DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1064DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1064DAGISEL-NEXT: ; %bb.5: ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX1064DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX1064DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX1064DAGISEL-NEXT: s_endpgm ; ; GFX1064GISEL-LABEL: divergent_cfg: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX1064GISEL-NEXT: ; implicit-def: $sgpr2 ; GFX1064GISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX1064GISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX1064GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX1064GISEL-NEXT: ; %bb.1: ; %else ; GFX1064GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c ; GFX1064GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: s_mov_b32 s2, s2 ; GFX1064GISEL-NEXT: .LBB6_2: ; %Flow ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1064GISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX1064GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1064GISEL-NEXT: ; %bb.3: ; %if ; GFX1064GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1064GISEL-NEXT: s_brev_b32 s6, 1 ; GFX1064GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1064GISEL-NEXT: s_ff1_i32_b64 s7, s[2:3] ; GFX1064GISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX1064GISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX1064GISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX1064GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1064GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1064GISEL-NEXT: ; %bb.5: ; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX1064GISEL-NEXT: .LBB6_6: ; %endif ; GFX1064GISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX1064GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX1064GISEL-NEXT: s_endpgm ; ; GFX1032DAGISEL-LABEL: divergent_cfg: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0 ; GFX1032DAGISEL-NEXT: ; implicit-def: $sgpr1 ; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX1032DAGISEL-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX1032DAGISEL-NEXT: ; %bb.1: ; %else ; GFX1032DAGISEL-NEXT: s_load_dword s1, s[4:5], 0x2c ; GFX1032DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1032DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s0, s0 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0 ; GFX1032DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1032DAGISEL-NEXT: ; %bb.3: ; %if ; GFX1032DAGISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1032DAGISEL-NEXT: s_brev_b32 s1, 1 ; GFX1032DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1032DAGISEL-NEXT: s_ff1_i32_b32 s3, s2 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s6, v0, s3 ; GFX1032DAGISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1032DAGISEL-NEXT: s_max_i32 s1, s1, s6 ; GFX1032DAGISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1032DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1032DAGISEL-NEXT: ; %bb.5: ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1032DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX1032DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX1032DAGISEL-NEXT: s_endpgm ; ; GFX1032GISEL-LABEL: divergent_cfg: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: v_cmp_le_u32_e32 vcc_lo, 16, v0 ; GFX1032GISEL-NEXT: ; implicit-def: $sgpr1 ; GFX1032GISEL-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX1032GISEL-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX1032GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX1032GISEL-NEXT: ; %bb.1: ; %else ; GFX1032GISEL-NEXT: s_load_dword s1, s[4:5], 0x2c ; GFX1032GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: s_mov_b32 s1, s1 ; GFX1032GISEL-NEXT: .LBB6_2: ; %Flow ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s0, s0 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1032GISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0 ; GFX1032GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1032GISEL-NEXT: ; %bb.3: ; %if ; GFX1032GISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1032GISEL-NEXT: s_brev_b32 s1, 1 ; GFX1032GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1032GISEL-NEXT: s_ff1_i32_b32 s3, s2 ; GFX1032GISEL-NEXT: v_readlane_b32 s6, v0, s3 ; GFX1032GISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1032GISEL-NEXT: s_max_i32 s1, s1, s6 ; GFX1032GISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1032GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1032GISEL-NEXT: ; %bb.5: ; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1032GISEL-NEXT: .LBB6_6: ; %endif ; GFX1032GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX1032GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: global_store_dword v0, v1, s[0:1] ; GFX1032GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: divergent_cfg: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164DAGISEL-NEXT: s_mov_b64 s[0:1], exec ; GFX1164DAGISEL-NEXT: ; implicit-def: $sgpr2 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0 ; GFX1164DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX1164DAGISEL-NEXT: ; %bb.1: ; %else ; GFX1164DAGISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1164DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1164DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1164DAGISEL-NEXT: ; %bb.3: ; %if ; GFX1164DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164DAGISEL-NEXT: s_brev_b32 s6, 1 ; GFX1164DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1164DAGISEL-NEXT: s_ctz_i32_b64 s7, s[2:3] ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1164DAGISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX1164DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX1164DAGISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX1164DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1164DAGISEL-NEXT: ; %bb.5: ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX1164DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX1164DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: divergent_cfg: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164GISEL-NEXT: s_mov_b64 s[0:1], exec ; GFX1164GISEL-NEXT: ; implicit-def: $sgpr2 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_cmpx_le_u32_e32 16, v0 ; GFX1164GISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1] ; GFX1164GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX1164GISEL-NEXT: ; %bb.1: ; %else ; GFX1164GISEL-NEXT: s_load_b32 s2, s[4:5], 0x2c ; GFX1164GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: s_mov_b32 s2, s2 ; GFX1164GISEL-NEXT: .LBB6_2: ; %Flow ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s2 ; GFX1164GISEL-NEXT: s_xor_b64 exec, exec, s[0:1] ; GFX1164GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1164GISEL-NEXT: ; %bb.3: ; %if ; GFX1164GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164GISEL-NEXT: s_brev_b32 s6, 1 ; GFX1164GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1164GISEL-NEXT: s_ctz_i32_b64 s7, s[2:3] ; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1164GISEL-NEXT: v_readlane_b32 s8, v0, s7 ; GFX1164GISEL-NEXT: s_bitset0_b64 s[2:3], s7 ; GFX1164GISEL-NEXT: s_max_i32 s6, s6, s8 ; GFX1164GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1164GISEL-NEXT: ; %bb.5: ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s6 ; GFX1164GISEL-NEXT: .LBB6_6: ; %endif ; GFX1164GISEL-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: divergent_cfg: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132DAGISEL-NEXT: s_mov_b32 s0, exec_lo ; GFX1132DAGISEL-NEXT: ; implicit-def: $sgpr1 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0 ; GFX1132DAGISEL-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX1132DAGISEL-NEXT: ; %bb.1: ; %else ; GFX1132DAGISEL-NEXT: s_load_b32 s1, s[4:5], 0x2c ; GFX1132DAGISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1132DAGISEL-NEXT: ; %bb.2: ; %Flow ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s0, s0 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1132DAGISEL-NEXT: ; %bb.3: ; %if ; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1132DAGISEL-NEXT: s_brev_b32 s1, 1 ; GFX1132DAGISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1132DAGISEL-NEXT: s_ctz_i32_b32 s3, s2 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1132DAGISEL-NEXT: v_readlane_b32 s6, v0, s3 ; GFX1132DAGISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1132DAGISEL-NEXT: s_max_i32 s1, s1, s6 ; GFX1132DAGISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1132DAGISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1132DAGISEL-NEXT: ; %bb.5: ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1132DAGISEL-NEXT: .LBB6_6: ; %endif ; GFX1132DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: divergent_cfg: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132GISEL-NEXT: s_mov_b32 s0, exec_lo ; GFX1132GISEL-NEXT: ; implicit-def: $sgpr1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmpx_le_u32_e32 16, v0 ; GFX1132GISEL-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX1132GISEL-NEXT: s_cbranch_execz .LBB6_2 ; GFX1132GISEL-NEXT: ; %bb.1: ; %else ; GFX1132GISEL-NEXT: s_load_b32 s1, s[4:5], 0x2c ; GFX1132GISEL-NEXT: ; implicit-def: $vgpr0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: s_mov_b32 s1, s1 ; GFX1132GISEL-NEXT: .LBB6_2: ; %Flow ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s0, s0 ; GFX1132GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1132GISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s0 ; GFX1132GISEL-NEXT: s_cbranch_execz .LBB6_6 ; GFX1132GISEL-NEXT: ; %bb.3: ; %if ; GFX1132GISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1132GISEL-NEXT: s_brev_b32 s1, 1 ; GFX1132GISEL-NEXT: .LBB6_4: ; =>This Inner Loop Header: Depth=1 ; GFX1132GISEL-NEXT: s_ctz_i32_b32 s3, s2 ; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1132GISEL-NEXT: v_readlane_b32 s6, v0, s3 ; GFX1132GISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1132GISEL-NEXT: s_max_i32 s1, s1, s6 ; GFX1132GISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1132GISEL-NEXT: s_cbranch_scc1 .LBB6_4 ; GFX1132GISEL-NEXT: ; %bb.5: ; GFX1132GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX1132GISEL-NEXT: .LBB6_6: ; %endif ; GFX1132GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 ; GFX1132GISEL-NEXT: v_mov_b32_e32 v0, 0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: global_store_b32 v0, v1, s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %tid = call i32 @llvm.amdgcn.workitem.id.x() %d_cmp = icmp ult i32 %tid, 16 br i1 %d_cmp, label %if, label %else if: %reducedValTid = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %tid, i32 1) br label %endif else: %reducedValIn = call i32 @llvm.amdgcn.wave.reduce.max.i32(i32 %in, i32 1) br label %endif endif: %combine = phi i32 [%reducedValTid, %if], [%reducedValIn, %else] store i32 %combine, ptr addrspace(1) %out ret void } define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 { ; GFX8DAGISEL-LABEL: uniform_value_i64: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s2 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s3 ; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: uniform_value_i64: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: uniform_value_i64: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: uniform_value_i64: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX10DAGISEL-LABEL: uniform_value_i64: ; GFX10DAGISEL: ; %bb.0: ; %entry ; GFX10DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX10DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX10DAGISEL-NEXT: s_endpgm ; ; GFX10GISEL-LABEL: uniform_value_i64: ; GFX10GISEL: ; %bb.0: ; %entry ; GFX10GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX10GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX10GISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX10GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX10GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: uniform_value_i64: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: uniform_value_i64: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: uniform_value_i64: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 ; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: uniform_value_i64: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 ; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %result = call i64 @llvm.amdgcn.wave.reduce.max.i64(i64 %in, i32 1) store i64 %result, ptr addrspace(1) %out ret void } define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 { ; GFX8DAGISEL-LABEL: divergent_value_i64: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8DAGISEL-NEXT: s_mov_b32 s4, 0 ; GFX8DAGISEL-NEXT: s_brev_b32 s5, 1 ; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX8DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX8DAGISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX8DAGISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX8DAGISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX8DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX8DAGISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX8DAGISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX8DAGISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX8DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX8DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX8DAGISEL-NEXT: ; %bb.2: ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX8GISEL-LABEL: divergent_value_i64: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8GISEL-NEXT: s_mov_b32 s4, 0 ; GFX8GISEL-NEXT: s_brev_b32 s5, 1 ; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX8GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX8GISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX8GISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX8GISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX8GISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX8GISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX8GISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX8GISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX8GISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX8GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX8GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX8GISEL-NEXT: ; %bb.2: ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX9DAGISEL-LABEL: divergent_value_i64: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9DAGISEL-NEXT: s_mov_b32 s4, 0 ; GFX9DAGISEL-NEXT: s_brev_b32 s5, 1 ; GFX9DAGISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX9DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX9DAGISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX9DAGISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX9DAGISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX9DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX9DAGISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX9DAGISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX9DAGISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX9DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX9DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX9DAGISEL-NEXT: ; %bb.2: ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) ; GFX9DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX9GISEL-LABEL: divergent_value_i64: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9GISEL-NEXT: s_mov_b32 s4, 0 ; GFX9GISEL-NEXT: s_brev_b32 s5, 1 ; GFX9GISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX9GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX9GISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX9GISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX9GISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX9GISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX9GISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX9GISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX9GISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX9GISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX9GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX9GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX9GISEL-NEXT: ; %bb.2: ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX9GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1064DAGISEL-LABEL: divergent_value_i64: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1064DAGISEL-NEXT: s_mov_b32 s4, 0 ; GFX1064DAGISEL-NEXT: s_brev_b32 s5, 1 ; GFX1064DAGISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX1064DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1064DAGISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX1064DAGISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX1064DAGISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX1064DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX1064DAGISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX1064DAGISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX1064DAGISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX1064DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX1064DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1064DAGISEL-NEXT: ; %bb.2: ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1064DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1064DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1064GISEL-LABEL: divergent_value_i64: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1064GISEL-NEXT: s_mov_b32 s4, 0 ; GFX1064GISEL-NEXT: s_brev_b32 s5, 1 ; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX1064GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1064GISEL-NEXT: s_ff1_i32_b64 s12, s[6:7] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX1064GISEL-NEXT: v_readlane_b32 s8, v2, s12 ; GFX1064GISEL-NEXT: v_readlane_b32 s9, v3, s12 ; GFX1064GISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[8:9], v[4:5] ; GFX1064GISEL-NEXT: s_and_b64 s[10:11], vcc, s[6:7] ; GFX1064GISEL-NEXT: s_bitset0_b64 s[6:7], s12 ; GFX1064GISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX1064GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0 ; GFX1064GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1064GISEL-NEXT: ; %bb.2: ; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1064GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1064GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1032DAGISEL-LABEL: divergent_value_i64: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1032DAGISEL-NEXT: s_mov_b32 s4, 0 ; GFX1032DAGISEL-NEXT: s_brev_b32 s5, 1 ; GFX1032DAGISEL-NEXT: s_mov_b32 s6, exec_lo ; GFX1032DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1032DAGISEL-NEXT: s_ff1_i32_b32 s7, s6 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s8, v2, s7 ; GFX1032DAGISEL-NEXT: v_readlane_b32 s9, v3, s7 ; GFX1032DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, s[8:9], v[4:5] ; GFX1032DAGISEL-NEXT: s_and_b32 s10, vcc_lo, s6 ; GFX1032DAGISEL-NEXT: s_bitset0_b32 s6, s7 ; GFX1032DAGISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX1032DAGISEL-NEXT: s_cmp_lg_u32 s6, 0 ; GFX1032DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1032DAGISEL-NEXT: ; %bb.2: ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1032DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1032DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1032GISEL-LABEL: divergent_value_i64: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1032GISEL-NEXT: s_mov_b32 s4, 0 ; GFX1032GISEL-NEXT: s_brev_b32 s5, 1 ; GFX1032GISEL-NEXT: s_mov_b32 s6, exec_lo ; GFX1032GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1032GISEL-NEXT: s_ff1_i32_b32 s7, s6 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v4, s4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v5, s5 ; GFX1032GISEL-NEXT: v_readlane_b32 s8, v2, s7 ; GFX1032GISEL-NEXT: v_readlane_b32 s9, v3, s7 ; GFX1032GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, s[8:9], v[4:5] ; GFX1032GISEL-NEXT: s_and_b32 s10, vcc_lo, s6 ; GFX1032GISEL-NEXT: s_bitset0_b32 s6, s7 ; GFX1032GISEL-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5] ; GFX1032GISEL-NEXT: s_cmp_lg_u32 s6, 0 ; GFX1032GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1032GISEL-NEXT: ; %bb.2: ; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, s4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, s5 ; GFX1032GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX1032GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1164DAGISEL-LABEL: divergent_value_i64: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1164DAGISEL-NEXT: s_mov_b32 s0, 0 ; GFX1164DAGISEL-NEXT: s_brev_b32 s1, 1 ; GFX1164DAGISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) ; GFX1164DAGISEL-NEXT: s_ctz_i32_b64 s8, s[2:3] ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v4, s0 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v5, s1 ; GFX1164DAGISEL-NEXT: v_readlane_b32 s4, v2, s8 ; GFX1164DAGISEL-NEXT: v_readlane_b32 s5, v3, s8 ; GFX1164DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[4:5], v[4:5] ; GFX1164DAGISEL-NEXT: s_and_b64 s[6:7], vcc, s[2:3] ; GFX1164DAGISEL-NEXT: s_bitset0_b64 s[2:3], s8 ; GFX1164DAGISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[0:1] ; GFX1164DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1164DAGISEL-NEXT: ; %bb.2: ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX1164DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1164DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1164GISEL-LABEL: divergent_value_i64: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1164GISEL-NEXT: s_mov_b32 s0, 0 ; GFX1164GISEL-NEXT: s_brev_b32 s1, 1 ; GFX1164GISEL-NEXT: s_mov_b64 s[2:3], exec ; GFX1164GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) ; GFX1164GISEL-NEXT: s_ctz_i32_b64 s8, s[2:3] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v4, s0 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v5, s1 ; GFX1164GISEL-NEXT: v_readlane_b32 s4, v2, s8 ; GFX1164GISEL-NEXT: v_readlane_b32 s5, v3, s8 ; GFX1164GISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[4:5], v[4:5] ; GFX1164GISEL-NEXT: s_and_b64 s[6:7], vcc, s[2:3] ; GFX1164GISEL-NEXT: s_bitset0_b64 s[2:3], s8 ; GFX1164GISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[0:1] ; GFX1164GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0 ; GFX1164GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1164GISEL-NEXT: ; %bb.2: ; GFX1164GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX1164GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1164GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1132DAGISEL-LABEL: divergent_value_i64: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1132DAGISEL-NEXT: s_mov_b32 s0, 0 ; GFX1132DAGISEL-NEXT: s_brev_b32 s1, 1 ; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1132DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; GFX1132DAGISEL-NEXT: s_ctz_i32_b32 s3, s2 ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v5, s1 ; GFX1132DAGISEL-NEXT: v_readlane_b32 s4, v2, s3 ; GFX1132DAGISEL-NEXT: v_readlane_b32 s5, v3, s3 ; GFX1132DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, s[4:5], v[4:5] ; GFX1132DAGISEL-NEXT: s_and_b32 s6, vcc_lo, s2 ; GFX1132DAGISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1132DAGISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[0:1] ; GFX1132DAGISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1132DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1132DAGISEL-NEXT: ; %bb.2: ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0 ; GFX1132DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1132DAGISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX1132GISEL-LABEL: divergent_value_i64: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1132GISEL-NEXT: s_mov_b32 s0, 0 ; GFX1132GISEL-NEXT: s_brev_b32 s1, 1 ; GFX1132GISEL-NEXT: s_mov_b32 s2, exec_lo ; GFX1132GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1 ; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; GFX1132GISEL-NEXT: s_ctz_i32_b32 s3, s2 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v5, s1 ; GFX1132GISEL-NEXT: v_readlane_b32 s4, v2, s3 ; GFX1132GISEL-NEXT: v_readlane_b32 s5, v3, s3 ; GFX1132GISEL-NEXT: v_cmp_gt_i64_e32 vcc_lo, s[4:5], v[4:5] ; GFX1132GISEL-NEXT: s_and_b32 s6, vcc_lo, s2 ; GFX1132GISEL-NEXT: s_bitset0_b32 s2, s3 ; GFX1132GISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[0:1] ; GFX1132GISEL-NEXT: s_cmp_lg_u32 s2, 0 ; GFX1132GISEL-NEXT: s_cbranch_scc1 .LBB8_1 ; GFX1132GISEL-NEXT: ; %bb.2: ; GFX1132GISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0 ; GFX1132GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off ; GFX1132GISEL-NEXT: s_setpc_b64 s[30:31] entry: %result = call i64 @llvm.amdgcn.wave.reduce.max.i64(i64 %id.x, i32 1) store i64 %result, ptr addrspace(1) %out ret void } define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 { ; GFX8DAGISEL-LABEL: divergent_cfg_i64: ; GFX8DAGISEL: ; %bb.0: ; %entry ; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX8DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34 ; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc ; GFX8DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7] ; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] ; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7] ; GFX8DAGISEL-NEXT: ; %bb.1: ; %if ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX8DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX8DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7] ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8DAGISEL-NEXT: s_endpgm ; ; GFX8GISEL-LABEL: divergent_cfg_i64: ; GFX8GISEL: ; %bb.0: ; %entry ; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX8GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX8GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX8GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc ; GFX8GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9] ; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX8GISEL-NEXT: ; %bb.1: ; %else ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX8GISEL-NEXT: .LBB9_2: ; %Flow ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9] ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX8GISEL-NEXT: s_xor_b64 exec, exec, s[2:3] ; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX8GISEL-NEXT: ; %bb.3: ; %if ; GFX8GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34 ; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX8GISEL-NEXT: s_mov_b64 s[4:5], s[4:5] ; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX8GISEL-NEXT: .LBB9_4: ; %endif ; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1 ; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0 ; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8GISEL-NEXT: s_endpgm ; ; GFX9DAGISEL-LABEL: divergent_cfg_i64: ; GFX9DAGISEL: ; %bb.0: ; %entry ; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX9DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX9DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] ; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX9DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5] ; GFX9DAGISEL-NEXT: ; %bb.1: ; %if ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX9DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX9DAGISEL-NEXT: s_endpgm ; ; GFX9GISEL-LABEL: divergent_cfg_i64: ; GFX9GISEL: ; %bb.0: ; %entry ; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX9GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX9GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX9GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc ; GFX9GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9] ; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX9GISEL-NEXT: ; %bb.1: ; %else ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX9GISEL-NEXT: .LBB9_2: ; %Flow ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9] ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9GISEL-NEXT: s_xor_b64 exec, exec, s[2:3] ; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX9GISEL-NEXT: ; %bb.3: ; %if ; GFX9GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9GISEL-NEXT: s_mov_b64 s[4:5], s[6:7] ; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX9GISEL-NEXT: .LBB9_4: ; %endif ; GFX9GISEL-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX9GISEL-NEXT: s_endpgm ; ; GFX1064DAGISEL-LABEL: divergent_cfg_i64: ; GFX1064DAGISEL: ; %bb.0: ; %entry ; GFX1064DAGISEL-NEXT: s_clause 0x1 ; GFX1064DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX1064DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0 ; GFX1064DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX1064DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] ; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX1064DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5] ; GFX1064DAGISEL-NEXT: ; %bb.1: ; %if ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX1064DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX1064DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1064DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX1064DAGISEL-NEXT: s_endpgm ; ; GFX1064GISEL-LABEL: divergent_cfg_i64: ; GFX1064GISEL: ; %bb.0: ; %entry ; GFX1064GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX1064GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0 ; GFX1064GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX1064GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc ; GFX1064GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9] ; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX1064GISEL-NEXT: ; %bb.1: ; %else ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX1064GISEL-NEXT: .LBB9_2: ; %Flow ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX1064GISEL-NEXT: s_xor_b64 exec, exec, s[2:3] ; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX1064GISEL-NEXT: ; %bb.3: ; %if ; GFX1064GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064GISEL-NEXT: s_mov_b64 s[4:5], s[6:7] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX1064GISEL-NEXT: .LBB9_4: ; %endif ; GFX1064GISEL-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1064GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX1064GISEL-NEXT: s_endpgm ; ; GFX1032DAGISEL-LABEL: divergent_cfg_i64: ; GFX1032DAGISEL: ; %bb.0: ; %entry ; GFX1032DAGISEL-NEXT: s_clause 0x1 ; GFX1032DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0 ; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s4, vcc_lo ; GFX1032DAGISEL-NEXT: s_xor_b32 s4, exec_lo, s4 ; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s4, s4 ; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s4 ; GFX1032DAGISEL-NEXT: ; %bb.1: ; %if ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX1032DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX1032DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4 ; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1032DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX1032DAGISEL-NEXT: s_endpgm ; ; GFX1032GISEL-LABEL: divergent_cfg_i64: ; GFX1032GISEL: ; %bb.0: ; %entry ; GFX1032GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX1032GISEL-NEXT: v_cmp_le_u32_e32 vcc_lo, 16, v0 ; GFX1032GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX1032GISEL-NEXT: s_and_saveexec_b32 s8, vcc_lo ; GFX1032GISEL-NEXT: s_xor_b32 s8, exec_lo, s8 ; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX1032GISEL-NEXT: ; %bb.1: ; %else ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX1032GISEL-NEXT: .LBB9_2: ; %Flow ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: s_or_saveexec_b32 s2, s8 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX1032GISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s2 ; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX1032GISEL-NEXT: ; %bb.3: ; %if ; GFX1032GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032GISEL-NEXT: s_mov_b64 s[4:5], s[6:7] ; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX1032GISEL-NEXT: .LBB9_4: ; %endif ; GFX1032GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2 ; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1032GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX1032GISEL-NEXT: s_endpgm ; ; GFX1164DAGISEL-LABEL: divergent_cfg_i64: ; GFX1164DAGISEL: ; %bb.0: ; %entry ; GFX1164DAGISEL-NEXT: s_clause 0x1 ; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1164DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 ; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164DAGISEL-NEXT: s_mov_b64 s[6:7], exec ; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) ; GFX1164DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0 ; GFX1164DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7] ; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7] ; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3 ; GFX1164DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7] ; GFX1164DAGISEL-NEXT: ; %bb.1: ; %if ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX1164DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX1164DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7] ; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1164DAGISEL-NEXT: s_endpgm ; ; GFX1164GISEL-LABEL: divergent_cfg_i64: ; GFX1164GISEL: ; %bb.0: ; %entry ; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1164GISEL-NEXT: s_mov_b64 s[8:9], exec ; GFX1164GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1164GISEL-NEXT: v_cmpx_le_u32_e32 16, v0 ; GFX1164GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9] ; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX1164GISEL-NEXT: ; %bb.1: ; %else ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX1164GISEL-NEXT: .LBB9_2: ; %Flow ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s6 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s7 ; GFX1164GISEL-NEXT: s_xor_b64 exec, exec, s[2:3] ; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX1164GISEL-NEXT: ; %bb.3: ; %if ; GFX1164GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 ; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1164GISEL-NEXT: s_mov_b64 s[4:5], s[4:5] ; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s4 ; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s5 ; GFX1164GISEL-NEXT: .LBB9_4: ; %endif ; GFX1164GISEL-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1164GISEL-NEXT: s_endpgm ; ; GFX1132DAGISEL-LABEL: divergent_cfg_i64: ; GFX1132DAGISEL: ; %bb.0: ; %entry ; GFX1132DAGISEL-NEXT: s_clause 0x1 ; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1132DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 ; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132DAGISEL-NEXT: s_mov_b32 s6, exec_lo ; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) ; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0 ; GFX1132DAGISEL-NEXT: s_xor_b32 s6, exec_lo, s6 ; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s6, s6 ; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 ; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s6 ; GFX1132DAGISEL-NEXT: ; %bb.1: ; %if ; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 ; GFX1132DAGISEL-NEXT: ; %bb.2: ; %endif ; GFX1132DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s6 ; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1132DAGISEL-NEXT: s_endpgm ; ; GFX1132GISEL-LABEL: divergent_cfg_i64: ; GFX1132GISEL: ; %bb.0: ; %entry ; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1132GISEL-NEXT: s_mov_b32 s8, exec_lo ; GFX1132GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7 ; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1132GISEL-NEXT: v_cmpx_le_u32_e32 16, v0 ; GFX1132GISEL-NEXT: s_xor_b32 s8, exec_lo, s8 ; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_2 ; GFX1132GISEL-NEXT: ; %bb.1: ; %else ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: s_mov_b64 s[6:7], s[2:3] ; GFX1132GISEL-NEXT: .LBB9_2: ; %Flow ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: s_or_saveexec_b32 s2, s8 ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7 ; GFX1132GISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s2 ; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_4 ; GFX1132GISEL-NEXT: ; %bb.3: ; %if ; GFX1132GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 ; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX1132GISEL-NEXT: s_mov_b64 s[4:5], s[4:5] ; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 ; GFX1132GISEL-NEXT: .LBB9_4: ; %endif ; GFX1132GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2 ; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0 ; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] ; GFX1132GISEL-NEXT: s_endpgm entry: %tid = call i32 @llvm.amdgcn.workitem.id.x() %d_cmp = icmp ult i32 %tid, 16 br i1 %d_cmp, label %if, label %else if: %reducedValTid = call i64 @llvm.amdgcn.wave.reduce.max.i64(i64 %in2, i32 1) br label %endif else: %reducedValIn = call i64 @llvm.amdgcn.wave.reduce.max.i64(i64 %in, i32 1) br label %endif endif: %combine = phi i64 [%reducedValTid, %if], [%reducedValIn, %else] store i64 %combine, ptr addrspace(1) %out ret void } attributes #0 = { nounwind }