; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=SI %s ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI %s ; RUN: llc -global-isel=0 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-TRUE16,GFX11-TRUE16-SDAG %s ; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-TRUE16,GFX11-TRUE16-GISEL %s ; RUN: llc -global-isel=0 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16,GFX11-FAKE16-SDAG %s ; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16,GFX11-FAKE16-GISEL %s ; RUN: llc -global-isel=0 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-TRUE16,GFX12-TRUE16-SDAG %s ; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-TRUE16,GFX12-TRUE16-GISEL %s ; RUN: llc -global-isel=0 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-FAKE16,GFX12-FAKE16-SDAG %s ; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12-FAKE16,GFX12-FAKE16-GISEL %s declare half @llvm.sqrt.f16(half %a) declare <2 x half> @llvm.sqrt.v2f16(<2 x half> %a) define amdgpu_kernel void @sqrt_f16( ; SI-LABEL: sqrt_f16: ; SI: ; %bb.0: ; %entry ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 s7, 0xf000 ; SI-NEXT: s_mov_b32 s6, -1 ; SI-NEXT: s_mov_b32 s10, s6 ; SI-NEXT: s_mov_b32 s11, s7 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_mov_b32 s8, s2 ; SI-NEXT: s_mov_b32 s9, s3 ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 ; SI-NEXT: s_mov_b32 s4, s0 ; SI-NEXT: s_mov_b32 s5, s1 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 ; SI-NEXT: v_sqrt_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: buffer_store_short v0, off, s[4:7], 0 ; SI-NEXT: s_endpgm ; ; VI-LABEL: sqrt_f16: ; VI: ; %bb.0: ; %entry ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; VI-NEXT: s_mov_b32 s7, 0xf000 ; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_mov_b32 s10, s6 ; VI-NEXT: s_mov_b32 s11, s7 ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_mov_b32 s8, s2 ; VI-NEXT: s_mov_b32 s9, s3 ; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 ; VI-NEXT: s_mov_b32 s4, s0 ; VI-NEXT: s_mov_b32 s5, s1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_sqrt_f16_e32 v0, v0 ; VI-NEXT: buffer_store_short v0, off, s[4:7], 0 ; VI-NEXT: s_endpgm ; ; GFX11-TRUE16-SDAG-LABEL: sqrt_f16: ; GFX11-TRUE16-SDAG: ; %bb.0: ; %entry ; GFX11-TRUE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX11-TRUE16-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX11-TRUE16-SDAG-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX11-TRUE16-SDAG-NEXT: buffer_store_b16 v0, off, s[4:7], 0 ; GFX11-TRUE16-SDAG-NEXT: s_endpgm ; ; GFX11-TRUE16-GISEL-LABEL: sqrt_f16: ; GFX11-TRUE16-GISEL: ; %bb.0: ; %entry ; GFX11-TRUE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-TRUE16-GISEL-NEXT: s_mov_b32 s6, -1 ; GFX11-TRUE16-GISEL-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-TRUE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-TRUE16-GISEL-NEXT: s_mov_b64 s[4:5], s[2:3] ; GFX11-TRUE16-GISEL-NEXT: s_mov_b64 s[2:3], s[6:7] ; GFX11-TRUE16-GISEL-NEXT: buffer_load_d16_b16 v0, off, s[4:7], 0 ; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-GISEL-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX11-TRUE16-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], 0 ; GFX11-TRUE16-GISEL-NEXT: s_endpgm ; ; GFX11-FAKE16-SDAG-LABEL: sqrt_f16: ; GFX11-FAKE16-SDAG: ; %bb.0: ; %entry ; GFX11-FAKE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX11-FAKE16-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX11-FAKE16-SDAG-NEXT: buffer_load_u16 v0, off, s[8:11], 0 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX11-FAKE16-SDAG-NEXT: buffer_store_b16 v0, off, s[4:7], 0 ; GFX11-FAKE16-SDAG-NEXT: s_endpgm ; ; GFX11-FAKE16-GISEL-LABEL: sqrt_f16: ; GFX11-FAKE16-GISEL: ; %bb.0: ; %entry ; GFX11-FAKE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-FAKE16-GISEL-NEXT: s_mov_b32 s6, -1 ; GFX11-FAKE16-GISEL-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-FAKE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-FAKE16-GISEL-NEXT: s_mov_b64 s[4:5], s[2:3] ; GFX11-FAKE16-GISEL-NEXT: buffer_load_u16 v0, off, s[4:7], 0 ; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s2, v0 ; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-FAKE16-GISEL-NEXT: v_sqrt_f16_e32 v0, s2 ; GFX11-FAKE16-GISEL-NEXT: s_mov_b64 s[2:3], s[6:7] ; GFX11-FAKE16-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], 0 ; GFX11-FAKE16-GISEL-NEXT: s_endpgm ; ; GFX12-TRUE16-SDAG-LABEL: sqrt_f16: ; GFX12-TRUE16-SDAG: ; %bb.0: ; %entry ; GFX12-TRUE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX12-TRUE16-SDAG-NEXT: buffer_load_d16_b16 v0, off, s[8:11], null ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt 0x0 ; GFX12-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX12-TRUE16-SDAG-NEXT: buffer_store_b16 v0, off, s[4:7], null ; GFX12-TRUE16-SDAG-NEXT: s_endpgm ; ; GFX12-TRUE16-GISEL-LABEL: sqrt_f16: ; GFX12-TRUE16-GISEL: ; %bb.0: ; %entry ; GFX12-TRUE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-GISEL-NEXT: s_load_u16 s2, s[2:3], 0x0 ; GFX12-TRUE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-GISEL-NEXT: v_s_sqrt_f16 s2, s2 ; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-TRUE16-GISEL-NEXT: v_mov_b16_e32 v0.l, s2 ; GFX12-TRUE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX12-TRUE16-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], null ; GFX12-TRUE16-GISEL-NEXT: s_endpgm ; ; GFX12-FAKE16-SDAG-LABEL: sqrt_f16: ; GFX12-FAKE16-SDAG: ; %bb.0: ; %entry ; GFX12-FAKE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX12-FAKE16-SDAG-NEXT: buffer_load_u16 v0, off, s[8:11], null ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt 0x0 ; GFX12-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX12-FAKE16-SDAG-NEXT: buffer_store_b16 v0, off, s[4:7], null ; GFX12-FAKE16-SDAG-NEXT: s_endpgm ; ; GFX12-FAKE16-GISEL-LABEL: sqrt_f16: ; GFX12-FAKE16-GISEL: ; %bb.0: ; %entry ; GFX12-FAKE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-GISEL-NEXT: s_load_u16 s2, s[2:3], 0x0 ; GFX12-FAKE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-GISEL-NEXT: v_s_sqrt_f16 s2, s2 ; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX12-FAKE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX12-FAKE16-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], null ; GFX12-FAKE16-GISEL-NEXT: s_endpgm ptr addrspace(1) %r, ptr addrspace(1) %a) { entry: %a.val = load half, ptr addrspace(1) %a %r.val = call half @llvm.sqrt.f16(half %a.val) store half %r.val, ptr addrspace(1) %r ret void } ; The original test with manual checks also had these NOT directives: ; COM: SI-DAG: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]] ; COM: SI-NOT: v_and_b32 ; COM: SI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_HI]] ; COM: VI-DAG: v_sqrt_f16_sdwa v[[R_F16_1:[0-9]+]], v[[A_V2_F16]] dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 ; COM: VI-NOT: v_and_b32 ; COM: VI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_1]] define amdgpu_kernel void @sqrt_v2f16( ; SI-LABEL: sqrt_v2f16: ; SI: ; %bb.0: ; %entry ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 s7, 0xf000 ; SI-NEXT: s_mov_b32 s6, -1 ; SI-NEXT: s_mov_b32 s10, s6 ; SI-NEXT: s_mov_b32 s11, s7 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_mov_b32 s8, s2 ; SI-NEXT: s_mov_b32 s9, s3 ; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; SI-NEXT: s_mov_b32 s4, s0 ; SI-NEXT: s_mov_b32 s5, s1 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 ; SI-NEXT: v_sqrt_f32_e32 v1, v1 ; SI-NEXT: v_sqrt_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 ; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; SI-NEXT: s_endpgm ; ; VI-LABEL: sqrt_v2f16: ; VI: ; %bb.0: ; %entry ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; VI-NEXT: s_mov_b32 s7, 0xf000 ; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_mov_b32 s10, s6 ; VI-NEXT: s_mov_b32 s11, s7 ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_mov_b32 s8, s2 ; VI-NEXT: s_mov_b32 s9, s3 ; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0 ; VI-NEXT: s_mov_b32 s4, s0 ; VI-NEXT: s_mov_b32 s5, s1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_sqrt_f16_e32 v0, v0 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 ; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; VI-NEXT: s_endpgm ; ; GFX11-TRUE16-SDAG-LABEL: sqrt_v2f16: ; GFX11-TRUE16-SDAG: ; %bb.0: ; %entry ; GFX11-TRUE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX11-TRUE16-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX11-TRUE16-SDAG-NEXT: buffer_load_b32 v0, off, s[8:11], 0 ; GFX11-TRUE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX11-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.h, v1.l ; GFX11-TRUE16-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], 0 ; GFX11-TRUE16-SDAG-NEXT: s_endpgm ; ; GFX11-TRUE16-GISEL-LABEL: sqrt_v2f16: ; GFX11-TRUE16-GISEL: ; %bb.0: ; %entry ; GFX11-TRUE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-TRUE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-TRUE16-GISEL-NEXT: s_load_b32 s2, s[2:3], 0x0 ; GFX11-TRUE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-TRUE16-GISEL-NEXT: s_lshr_b32 s3, s2, 16 ; GFX11-TRUE16-GISEL-NEXT: v_sqrt_f16_e32 v0.l, s2 ; GFX11-TRUE16-GISEL-NEXT: v_sqrt_f16_e32 v1.l, s3 ; GFX11-TRUE16-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0) ; GFX11-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s2, v0 ; GFX11-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s3, v1 ; GFX11-TRUE16-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 ; GFX11-TRUE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX11-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-TRUE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX11-TRUE16-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], 0 ; GFX11-TRUE16-GISEL-NEXT: s_endpgm ; ; GFX11-FAKE16-SDAG-LABEL: sqrt_v2f16: ; GFX11-FAKE16-SDAG: ; %bb.0: ; %entry ; GFX11-FAKE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX11-FAKE16-SDAG-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX11-FAKE16-SDAG-NEXT: buffer_load_b32 v0, off, s[8:11], 0 ; GFX11-FAKE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX11-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v1, v1 ; GFX11-FAKE16-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0) ; GFX11-FAKE16-SDAG-NEXT: v_pack_b32_f16 v0, v0, v1 ; GFX11-FAKE16-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], 0 ; GFX11-FAKE16-SDAG-NEXT: s_endpgm ; ; GFX11-FAKE16-GISEL-LABEL: sqrt_v2f16: ; GFX11-FAKE16-GISEL: ; %bb.0: ; %entry ; GFX11-FAKE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX11-FAKE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-FAKE16-GISEL-NEXT: s_load_b32 s2, s[2:3], 0x0 ; GFX11-FAKE16-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-FAKE16-GISEL-NEXT: s_lshr_b32 s3, s2, 16 ; GFX11-FAKE16-GISEL-NEXT: v_sqrt_f16_e32 v0, s2 ; GFX11-FAKE16-GISEL-NEXT: v_sqrt_f16_e32 v1, s3 ; GFX11-FAKE16-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0) ; GFX11-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s2, v0 ; GFX11-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s3, v1 ; GFX11-FAKE16-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 ; GFX11-FAKE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX11-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-FAKE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX11-FAKE16-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], 0 ; GFX11-FAKE16-GISEL-NEXT: s_endpgm ; ; GFX12-TRUE16-SDAG-LABEL: sqrt_v2f16: ; GFX12-TRUE16-SDAG: ; %bb.0: ; %entry ; GFX12-TRUE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX12-TRUE16-SDAG-NEXT: buffer_load_b32 v0, off, s[8:11], null ; GFX12-TRUE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt 0x0 ; GFX12-TRUE16-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX12-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX12-TRUE16-SDAG-NEXT: v_sqrt_f16_e32 v0.h, v1.l ; GFX12-TRUE16-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], null ; GFX12-TRUE16-SDAG-NEXT: s_endpgm ; ; GFX12-TRUE16-GISEL-LABEL: sqrt_v2f16: ; GFX12-TRUE16-GISEL: ; %bb.0: ; %entry ; GFX12-TRUE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-GISEL-NEXT: s_load_b32 s2, s[2:3], 0x0 ; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-TRUE16-GISEL-NEXT: s_lshr_b32 s3, s2, 16 ; GFX12-TRUE16-GISEL-NEXT: v_s_sqrt_f16 s2, s2 ; GFX12-TRUE16-GISEL-NEXT: v_s_sqrt_f16 s3, s3 ; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-TRUE16-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 ; GFX12-TRUE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0) ; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX12-TRUE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX12-TRUE16-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null ; GFX12-TRUE16-GISEL-NEXT: s_endpgm ; ; GFX12-FAKE16-SDAG-LABEL: sqrt_v2f16: ; GFX12-FAKE16-SDAG: ; %bb.0: ; %entry ; GFX12-FAKE16-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s6, -1 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s7, 0x31016000 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s10, s6 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s11, s7 ; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s8, s2 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s9, s3 ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s4, s0 ; GFX12-FAKE16-SDAG-NEXT: buffer_load_b32 v0, off, s[8:11], null ; GFX12-FAKE16-SDAG-NEXT: s_mov_b32 s5, s1 ; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt 0x0 ; GFX12-FAKE16-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX12-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX12-FAKE16-SDAG-NEXT: v_sqrt_f16_e32 v1, v1 ; GFX12-FAKE16-SDAG-NEXT: v_pack_b32_f16 v0, v0, v1 ; GFX12-FAKE16-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], null ; GFX12-FAKE16-SDAG-NEXT: s_endpgm ; ; GFX12-FAKE16-GISEL-LABEL: sqrt_v2f16: ; GFX12-FAKE16-GISEL: ; %bb.0: ; %entry ; GFX12-FAKE16-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 ; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-GISEL-NEXT: s_load_b32 s2, s[2:3], 0x0 ; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX12-FAKE16-GISEL-NEXT: s_lshr_b32 s3, s2, 16 ; GFX12-FAKE16-GISEL-NEXT: v_s_sqrt_f16 s2, s2 ; GFX12-FAKE16-GISEL-NEXT: v_s_sqrt_f16 s3, s3 ; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-FAKE16-GISEL-NEXT: s_pack_ll_b32_b16 s2, s2, s3 ; GFX12-FAKE16-GISEL-NEXT: s_mov_b32 s3, 0x31016000 ; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0) ; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GFX12-FAKE16-GISEL-NEXT: s_mov_b32 s2, -1 ; GFX12-FAKE16-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null ; GFX12-FAKE16-GISEL-NEXT: s_endpgm ptr addrspace(1) %r, ptr addrspace(1) %a) { entry: %a.val = load <2 x half>, ptr addrspace(1) %a %r.val = call <2 x half> @llvm.sqrt.v2f16(<2 x half> %a.val) store <2 x half> %r.val, ptr addrspace(1) %r ret void } define amdgpu_ps half @sqrt_f16_s(half inreg %x) { ; SI-LABEL: sqrt_f16_s: ; SI: ; %bb.0: ; SI-NEXT: v_cvt_f32_f16_e32 v0, s0 ; SI-NEXT: v_sqrt_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: ; return to shader part epilog ; ; VI-LABEL: sqrt_f16_s: ; VI: ; %bb.0: ; VI-NEXT: v_sqrt_f16_e32 v0, s0 ; VI-NEXT: ; return to shader part epilog ; ; GFX11-TRUE16-LABEL: sqrt_f16_s: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, s0 ; GFX11-TRUE16-NEXT: ; return to shader part epilog ; ; GFX11-FAKE16-LABEL: sqrt_f16_s: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v0, s0 ; GFX11-FAKE16-NEXT: ; return to shader part epilog ; ; GFX12-TRUE16-LABEL: sqrt_f16_s: ; GFX12-TRUE16: ; %bb.0: ; GFX12-TRUE16-NEXT: v_s_sqrt_f16 s0, s0 ; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX12-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-TRUE16-NEXT: v_mov_b32_e32 v0, s0 ; GFX12-TRUE16-NEXT: ; return to shader part epilog ; ; GFX12-FAKE16-LABEL: sqrt_f16_s: ; GFX12-FAKE16: ; %bb.0: ; GFX12-FAKE16-NEXT: v_s_sqrt_f16 s0, s0 ; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX12-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) ; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0 ; GFX12-FAKE16-NEXT: ; return to shader part epilog %result = call half @llvm.sqrt.f16(half %x) ret half %result } define amdgpu_ps half @sqrt_f16_v(half %x) { ; SI-LABEL: sqrt_f16_v: ; SI: ; %bb.0: ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 ; SI-NEXT: v_sqrt_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: ; return to shader part epilog ; ; VI-LABEL: sqrt_f16_v: ; VI: ; %bb.0: ; VI-NEXT: v_sqrt_f16_e32 v0, v0 ; VI-NEXT: ; return to shader part epilog ; ; GFX11-TRUE16-LABEL: sqrt_f16_v: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX11-TRUE16-NEXT: ; return to shader part epilog ; ; GFX11-FAKE16-LABEL: sqrt_f16_v: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX11-FAKE16-NEXT: ; return to shader part epilog ; ; GFX12-TRUE16-LABEL: sqrt_f16_v: ; GFX12-TRUE16: ; %bb.0: ; GFX12-TRUE16-NEXT: v_sqrt_f16_e32 v0.l, v0.l ; GFX12-TRUE16-NEXT: ; return to shader part epilog ; ; GFX12-FAKE16-LABEL: sqrt_f16_v: ; GFX12-FAKE16: ; %bb.0: ; GFX12-FAKE16-NEXT: v_sqrt_f16_e32 v0, v0 ; GFX12-FAKE16-NEXT: ; return to shader part epilog %result = call half @llvm.sqrt.f16(half %x) ret half %result }