//===----------------------------------------------------------------------===// // // Part of libcu++, the C++ Standard Library for your entire system, // under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. // //===----------------------------------------------------------------------===// // MIT License // // Modifications Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved. // // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: // // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE // SOFTWARE. #ifndef _LIBCUDACXX___BIT_INTEGRAL_H #define _LIBCUDACXX___BIT_INTEGRAL_H #include #if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC) # pragma GCC system_header #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG) # pragma clang system_header #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC) # pragma system_header #endif // no system header // #include // #include // #include #include #include #include #include #include #include #include #include _LIBCUDACXX_BEGIN_NAMESPACE_STD template _LIBCUDACXX_HIDE_FROM_ABI constexpr uint32_t __bit_log2(_Tp __t) noexcept { // Note(HIP/AMD): bfind uses ptx which is not available for AMD hardware /* if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { if constexpr (sizeof(_Tp) <= 8) { using _Up [[maybe_unused]] = _If; NV_IF_TARGET_LIBHIPCXX(NV_IS_DEVICE_LIBHIPCXX, (return _CUDA_VPTX::bfind(static_cast<_Up>(__t));)) } else { NV_IF_TARGET_LIBHIPCXX(NV_IS_DEVICE_LIBHIPCXX, (auto __high = _CUDA_VPTX::bfind(static_cast(__t >> 64)); return __high == ~uint32_t{0} ? _CUDA_VPTX::bfind(static_cast(__t)) : __high + 64;)) } } */ return numeric_limits<_Tp>::digits - 1 - _CUDA_VSTD::countl_zero(__t); } _CCCL_TEMPLATE(class _Tp) _CCCL_REQUIRES(_CCCL_TRAIT(_CUDA_VSTD::__cccl_is_unsigned_integer, _Tp)) _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int bit_width(_Tp __t) noexcept { // if __t == 0, __bit_log2(0) returns 0xFFFFFFFF. Since unsigned overflow is well-defined, the result is -1 + 1 = 0 auto __ret = _CUDA_VSTD::__bit_log2(__t) + 1; _CCCL_BUILTIN_ASSUME(__ret <= numeric_limits<_Tp>::digits); return static_cast(__ret); } _CCCL_TEMPLATE(class _Tp) _CCCL_REQUIRES(_CCCL_TRAIT(_CUDA_VSTD::__cccl_is_unsigned_integer, _Tp)) _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr _Tp bit_ceil(_Tp __t) noexcept { using _Up = _If; _CCCL_ASSERT(__t <= numeric_limits<_Tp>::max() / 2, "bit_ceil overflow"); // if __t == 0, __t - 1 == 0xFFFFFFFF, bit_width(0xFFFFFFFF) returns 32 auto __width = _CUDA_VSTD::bit_width(static_cast<_Up>(__t) - 1); if constexpr (sizeof(_Tp) <= 8) { // Note(HIP/AMD): bfind uses ptx which is not available for AMD hardware /* if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { // CUDA right shift (ptx::shr) returns 0 if the right operand is larger than the number of bits of the type // The result is computed as max(1, bit_width(__t - 1)) because it is more efficient than the ternary operator NV_IF_TARGET_LIBHIPCXX(NV_IS_DEVICE_LIBHIPCXX, // (auto __shift = _CUDA_VPTX::shl(_Up{1}, __width); // 2^(ceil(log2(__t - 1))) auto __ret = static_cast<_Tp>(_CUDA_VSTD::max(_Up{1}, __shift)); // _CCCL_BUILTIN_ASSUME(__ret >= __t); return __ret;)) } */ } auto __ret = static_cast<_Tp>(__t <= 1 ? _Up{1} : _Up{1} << __width); _CCCL_BUILTIN_ASSUME(__ret >= __t); return __ret; } _CCCL_TEMPLATE(class _Tp) _CCCL_REQUIRES(_CCCL_TRAIT(_CUDA_VSTD::__cccl_is_unsigned_integer, _Tp)) _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr _Tp bit_floor(_Tp __t) noexcept { using _Up = _If; auto __log2 = _CUDA_VSTD::__bit_log2(static_cast<_Up>(__t)); // __bit_log2 returns 0xFFFFFFFF if __t == 0 if constexpr (sizeof(_Tp) <= 8) { // Note(HIP/AMD): bfind uses ptx which is not available for AMD hardware /* if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { // CUDA left shift (ptx::shl) returns 0 if the right operand is larger than the number of bits of the type // -> the result is 0 if __t == 0 NV_IF_TARGET_LIBHIPCXX(NV_IS_DEVICE_LIBHIPCXX, // (auto __ret = static_cast<_Tp>(_CUDA_VPTX::shl(_Up{1}, __log2)); // 2^(log2(t)) _CCCL_BUILTIN_ASSUME(__ret >= __t / 2 && __ret <= __t); return __ret;)) } */ } auto __ret = static_cast<_Tp>(__t == 0 ? _Up{0} : _Up{1} << __log2); _CCCL_BUILTIN_ASSUME(__ret >= __t / 2 && __ret <= __t); return __ret; } _LIBCUDACXX_END_NAMESPACE_STD #endif // _LIBCUDACXX___BIT_INTEGRAL_H