Architectures: gfx1250rev0: Capabilities: CMPXWritesSGPR: 0 DefaultRemapXCCValue: 8 DefaultScaleBlockSize: 32 DefaultWavefrontSize: 32 HasAddLshl: 0 HasBlockScaling16: 0 HasBlockScaling32: 0 HasBufferFormatSpecInSOffsetField: 0 HasBufferOutOfBoundsCheckOption: 0 HasCodeObjectV4: 0 HasCodeObjectV5: 0 HasDSReadTransposeB16: 0 HasDSReadTransposeB4: 0 HasDSReadTransposeB6: 0 HasDSReadTransposeB8: 0 HasE4M3Scale: 0 HasE5M3Scale: 0 HasE8M0Scale: 0 HasExplicitNC: 0 HasExplicitScalarCO: 0 HasExplicitScalarCOCI: 0 HasExplicitVectorCO: 0 HasExplicitVectorCOCI: 0 HasExplicitVectorRevCO: 0 HasExplicitVectorRevCOCI: 0 HasExplicitVectorRevNC: 0 HasGlobalOffset: 0 HasLshlOr: 0 HasPermLanes16: 0 HasSMulHi: 0 HasSplitWaitCounters: 0 HasTDM: 0 HasTensorcnt: 0 HasVGPRIndexing: 0 HasWMMA: 0 HasWMMA_32x16x128_f4: 0 HasWMMA_F16_ACC: 0 HasWMMA_bf16_16x16x32_bf16: 0 HasWMMA_f16_16x16x128_f8: 0 HasWMMA_f16_16x16x32_f16: 0 HasWMMA_f16_16x16x64_f8: 0 HasWMMA_f32_16x16x128_f8: 0 HasWMMA_f32_16x16x32_f16: 0 HasWMMA_f32_16x16x4_f32: 0 HasWMMA_f32_16x16x64_f8: 0 HasWMMA_f8f6f4: 0 HasWMMA_scale16_32x16x128_f4: 0 HasWMMA_scale16_f8f6f4: 0 HasWMMA_scale_32x16x128_f4: 0 HasWMMA_scale_f8f6f4: 0 HasWave32: 0 HasWave64: 0 HasWorkgroupClusters: 0 HasXCC: 0 MaxExpcnt: 7 MaxLdsSize: 65536 MaxLgkmcnt: 31 MaxPreloadedKernargs: 32 MaxTensorcnt: 63 MaxVmcnt: 63 PackedWorkitemIDs: 0 PartiallyActiveWaveSize: 16 SupportedISA: 0 SupportedSource: 0 WorkgroupIdxViaTTMP: 0 ds_load_tr16_b128: 0 ds_load_tr4_b64: 0 ds_load_tr6_b96: 0 ds_load_tr8_b64: 0 s_barrier_signal: 0 v_add3_u32: 0 v_fma_f16: 0 v_fma_f32: 0 v_fma_mix_f32: 0 v_fmac_f32: 0 v_mov_b64: 0 v_pk_fma_f16: 0 ISAVersion: ArchString: gfx1250 AsicRevisionId: 0 Sramecc: false Xnack: false InstructionInfos: buffer_atomic_add: ImplicitAccess: false Instruction: buffer_atomic_add IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_add_f32: ImplicitAccess: false Instruction: buffer_atomic_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_add_f64: ImplicitAccess: false Instruction: buffer_atomic_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_add_u32: ImplicitAccess: false Instruction: buffer_atomic_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_add_u64: ImplicitAccess: false Instruction: buffer_atomic_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_add_x2: ImplicitAccess: false Instruction: buffer_atomic_add_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_and: ImplicitAccess: false Instruction: buffer_atomic_and IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_and_b32: ImplicitAccess: false Instruction: buffer_atomic_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_and_b64: ImplicitAccess: false Instruction: buffer_atomic_and_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_and_x2: ImplicitAccess: false Instruction: buffer_atomic_and_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_cmpswap: ImplicitAccess: false Instruction: buffer_atomic_cmpswap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_cmpswap_b32: ImplicitAccess: false Instruction: buffer_atomic_cmpswap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_cmpswap_b64: ImplicitAccess: false Instruction: buffer_atomic_cmpswap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_cmpswap_x2: ImplicitAccess: false Instruction: buffer_atomic_cmpswap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_cond_sub_u32: ImplicitAccess: false Instruction: buffer_atomic_cond_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_csub: ImplicitAccess: false Instruction: buffer_atomic_csub IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_csub_u32: ImplicitAccess: false Instruction: buffer_atomic_csub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_dec: ImplicitAccess: false Instruction: buffer_atomic_dec IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_dec_u32: ImplicitAccess: false Instruction: buffer_atomic_dec_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_dec_u64: ImplicitAccess: false Instruction: buffer_atomic_dec_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_dec_x2: ImplicitAccess: false Instruction: buffer_atomic_dec_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_fmax: ImplicitAccess: false Instruction: buffer_atomic_fmax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_fmin: ImplicitAccess: false Instruction: buffer_atomic_fmin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_inc: ImplicitAccess: false Instruction: buffer_atomic_inc IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_inc_u32: ImplicitAccess: false Instruction: buffer_atomic_inc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_inc_u64: ImplicitAccess: false Instruction: buffer_atomic_inc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_inc_x2: ImplicitAccess: false Instruction: buffer_atomic_inc_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_f32: ImplicitAccess: false Instruction: buffer_atomic_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_i32: ImplicitAccess: false Instruction: buffer_atomic_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_i64: ImplicitAccess: false Instruction: buffer_atomic_max_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_num_f32: ImplicitAccess: false Instruction: buffer_atomic_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_num_f64: ImplicitAccess: false Instruction: buffer_atomic_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_u32: ImplicitAccess: false Instruction: buffer_atomic_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_max_u64: ImplicitAccess: false Instruction: buffer_atomic_max_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_f32: ImplicitAccess: false Instruction: buffer_atomic_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_i32: ImplicitAccess: false Instruction: buffer_atomic_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_i64: ImplicitAccess: false Instruction: buffer_atomic_min_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_num_f32: ImplicitAccess: false Instruction: buffer_atomic_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_num_f64: ImplicitAccess: false Instruction: buffer_atomic_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_u32: ImplicitAccess: false Instruction: buffer_atomic_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_min_u64: ImplicitAccess: false Instruction: buffer_atomic_min_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_or: ImplicitAccess: false Instruction: buffer_atomic_or IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_or_b32: ImplicitAccess: false Instruction: buffer_atomic_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_or_b64: ImplicitAccess: false Instruction: buffer_atomic_or_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_or_x2: ImplicitAccess: false Instruction: buffer_atomic_or_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_pk_add_bf16: ImplicitAccess: false Instruction: buffer_atomic_pk_add_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_pk_add_f16: ImplicitAccess: false Instruction: buffer_atomic_pk_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_smax: ImplicitAccess: false Instruction: buffer_atomic_smax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_smax_x2: ImplicitAccess: false Instruction: buffer_atomic_smax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_smin: ImplicitAccess: false Instruction: buffer_atomic_smin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_smin_x2: ImplicitAccess: false Instruction: buffer_atomic_smin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_sub: ImplicitAccess: false Instruction: buffer_atomic_sub IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_sub_clamp_u32: ImplicitAccess: false Instruction: buffer_atomic_sub_clamp_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_sub_u32: ImplicitAccess: false Instruction: buffer_atomic_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_sub_u64: ImplicitAccess: false Instruction: buffer_atomic_sub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_sub_x2: ImplicitAccess: false Instruction: buffer_atomic_sub_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_swap: ImplicitAccess: false Instruction: buffer_atomic_swap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_swap_b32: ImplicitAccess: false Instruction: buffer_atomic_swap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_swap_b64: ImplicitAccess: false Instruction: buffer_atomic_swap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_swap_x2: ImplicitAccess: false Instruction: buffer_atomic_swap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_umax: ImplicitAccess: false Instruction: buffer_atomic_umax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_umax_x2: ImplicitAccess: false Instruction: buffer_atomic_umax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_umin: ImplicitAccess: false Instruction: buffer_atomic_umin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_umin_x2: ImplicitAccess: false Instruction: buffer_atomic_umin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_xor: ImplicitAccess: false Instruction: buffer_atomic_xor IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_xor_b32: ImplicitAccess: false Instruction: buffer_atomic_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_xor_b64: ImplicitAccess: false Instruction: buffer_atomic_xor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_atomic_xor_x2: ImplicitAccess: false Instruction: buffer_atomic_xor_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_b128: ImplicitAccess: false Instruction: buffer_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_b32: ImplicitAccess: false Instruction: buffer_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_b64: ImplicitAccess: false Instruction: buffer_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_b96: ImplicitAccess: false Instruction: buffer_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_b16: ImplicitAccess: false Instruction: buffer_load_d16_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_hi_b16: ImplicitAccess: false Instruction: buffer_load_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_hi_i8: ImplicitAccess: false Instruction: buffer_load_d16_hi_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_hi_u8: ImplicitAccess: false Instruction: buffer_load_d16_hi_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_i8: ImplicitAccess: false Instruction: buffer_load_d16_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_d16_u8: ImplicitAccess: false Instruction: buffer_load_d16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_dword: ImplicitAccess: false Instruction: buffer_load_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_dwordx2: ImplicitAccess: false Instruction: buffer_load_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_dwordx3: ImplicitAccess: false Instruction: buffer_load_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_dwordx4: ImplicitAccess: false Instruction: buffer_load_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_i16: ImplicitAccess: false Instruction: buffer_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_i8: ImplicitAccess: false Instruction: buffer_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_sbyte: ImplicitAccess: false Instruction: buffer_load_sbyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_sbyte_d16: ImplicitAccess: false Instruction: buffer_load_sbyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_sbyte_d16_hi: ImplicitAccess: false Instruction: buffer_load_sbyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_short_d16: ImplicitAccess: false Instruction: buffer_load_short_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_short_d16_hi: ImplicitAccess: false Instruction: buffer_load_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_sshort: ImplicitAccess: false Instruction: buffer_load_sshort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_u16: ImplicitAccess: false Instruction: buffer_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_u8: ImplicitAccess: false Instruction: buffer_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_load_ubyte: ImplicitAccess: false Instruction: buffer_load_ubyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_ubyte_d16: ImplicitAccess: false Instruction: buffer_load_ubyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_ubyte_d16_hi: ImplicitAccess: false Instruction: buffer_load_ubyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_load_ushort: ImplicitAccess: false Instruction: buffer_load_ushort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - LoadQueue buffer_store_b128: ImplicitAccess: false Instruction: buffer_store_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_b16: ImplicitAccess: false Instruction: buffer_store_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_b32: ImplicitAccess: false Instruction: buffer_store_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_b64: ImplicitAccess: false Instruction: buffer_store_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_b8: ImplicitAccess: false Instruction: buffer_store_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_b96: ImplicitAccess: false Instruction: buffer_store_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_byte: ImplicitAccess: false Instruction: buffer_store_byte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_byte_d16_hi: ImplicitAccess: false Instruction: buffer_store_byte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_d16_hi_b16: ImplicitAccess: false Instruction: buffer_store_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_d16_hi_b8: ImplicitAccess: false Instruction: buffer_store_d16_hi_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] buffer_store_dword: ImplicitAccess: false Instruction: buffer_store_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_dwordx2: ImplicitAccess: false Instruction: buffer_store_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_dwordx3: ImplicitAccess: false Instruction: buffer_store_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_dwordx4: ImplicitAccess: false Instruction: buffer_store_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_short: ImplicitAccess: false Instruction: buffer_store_short IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue buffer_store_short_d16_hi: ImplicitAccess: false Instruction: buffer_store_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 1 WaitQueues: - StoreQueue cluster_load_async_to_lds_b128: ImplicitAccess: false Instruction: cluster_load_async_to_lds_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_async_to_lds_b32: ImplicitAccess: false Instruction: cluster_load_async_to_lds_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_async_to_lds_b64: ImplicitAccess: false Instruction: cluster_load_async_to_lds_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_async_to_lds_b8: ImplicitAccess: false Instruction: cluster_load_async_to_lds_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_b128: ImplicitAccess: false Instruction: cluster_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_b32: ImplicitAccess: false Instruction: cluster_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] cluster_load_b64: ImplicitAccess: false Instruction: cluster_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_f32: ImplicitAccess: false Instruction: ds_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_f64: ImplicitAccess: false Instruction: ds_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_rtn_f32: ImplicitAccess: false Instruction: ds_add_rtn_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_rtn_f64: ImplicitAccess: false Instruction: ds_add_rtn_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_rtn_u32: ImplicitAccess: false Instruction: ds_add_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_rtn_u64: ImplicitAccess: false Instruction: ds_add_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_u32: ImplicitAccess: false Instruction: ds_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_add_u64: ImplicitAccess: false Instruction: ds_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_and_b32: ImplicitAccess: false Instruction: ds_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_and_b64: ImplicitAccess: false Instruction: ds_and_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_and_rtn_b32: ImplicitAccess: false Instruction: ds_and_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_and_rtn_b64: ImplicitAccess: false Instruction: ds_and_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_append: ImplicitAccess: false Instruction: ds_append IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_atomic_async_barrier_arrive_b64: ImplicitAccess: false Instruction: ds_atomic_async_barrier_arrive_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_atomic_barrier_arrive_rtn_b64: ImplicitAccess: false Instruction: ds_atomic_barrier_arrive_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_bpermute_b32: ImplicitAccess: false Instruction: ds_bpermute_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_bpermute_fi_b32: ImplicitAccess: false Instruction: ds_bpermute_fi_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpst_b32: ImplicitAccess: false Instruction: ds_cmpst_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpst_b64: ImplicitAccess: false Instruction: ds_cmpst_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpst_rtn_b32: ImplicitAccess: false Instruction: ds_cmpst_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpst_rtn_b64: ImplicitAccess: false Instruction: ds_cmpst_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpstore_b32: ImplicitAccess: false Instruction: ds_cmpstore_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpstore_b64: ImplicitAccess: false Instruction: ds_cmpstore_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpstore_rtn_b32: ImplicitAccess: false Instruction: ds_cmpstore_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cmpstore_rtn_b64: ImplicitAccess: false Instruction: ds_cmpstore_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cond_sub_rtn_u32: ImplicitAccess: false Instruction: ds_cond_sub_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_cond_sub_u32: ImplicitAccess: false Instruction: ds_cond_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_condxchg32_rtn_b64: ImplicitAccess: false Instruction: ds_condxchg32_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_consume: ImplicitAccess: false Instruction: ds_consume IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_dec_rtn_u32: ImplicitAccess: false Instruction: ds_dec_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_dec_rtn_u64: ImplicitAccess: false Instruction: ds_dec_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_dec_u32: ImplicitAccess: false Instruction: ds_dec_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_dec_u64: ImplicitAccess: false Instruction: ds_dec_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_inc_rtn_u32: ImplicitAccess: false Instruction: ds_inc_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_inc_rtn_u64: ImplicitAccess: false Instruction: ds_inc_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_inc_u32: ImplicitAccess: false Instruction: ds_inc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_inc_u64: ImplicitAccess: false Instruction: ds_inc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_2addr_b32: ImplicitAccess: false Instruction: ds_load_2addr_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_2addr_b64: ImplicitAccess: false Instruction: ds_load_2addr_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_2addr_stride64_b32: ImplicitAccess: false Instruction: ds_load_2addr_stride64_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_2addr_stride64_b64: ImplicitAccess: false Instruction: ds_load_2addr_stride64_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_addtid_b32: ImplicitAccess: false Instruction: ds_load_addtid_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b128: ImplicitAccess: false Instruction: ds_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b128_tr_b16: ImplicitAccess: false Instruction: ds_load_b128_tr_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b128_tr_b6: ImplicitAccess: false Instruction: ds_load_b128_tr_b6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b32: ImplicitAccess: false Instruction: ds_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b64: ImplicitAccess: false Instruction: ds_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b64_tr_b4: ImplicitAccess: false Instruction: ds_load_b64_tr_b4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b64_tr_b8: ImplicitAccess: false Instruction: ds_load_b64_tr_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_b96: ImplicitAccess: false Instruction: ds_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_i16: ImplicitAccess: false Instruction: ds_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_i8: ImplicitAccess: false Instruction: ds_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_i8_d16: ImplicitAccess: false Instruction: ds_load_i8_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_i8_d16_hi: ImplicitAccess: false Instruction: ds_load_i8_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_tr16_b128: ImplicitAccess: false Instruction: ds_load_tr16_b128 IsBranch: false Latency: 8 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_load_tr4_b64: ImplicitAccess: false Instruction: ds_load_tr4_b64 IsBranch: false Latency: 4 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_load_tr6_b96: ImplicitAccess: false Instruction: ds_load_tr6_b96 IsBranch: false Latency: 8 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_load_tr8_b64: ImplicitAccess: false Instruction: ds_load_tr8_b64 IsBranch: false Latency: 4 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_load_tr_b128: ImplicitAccess: false Instruction: ds_load_tr_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_tr_b64: ImplicitAccess: false Instruction: ds_load_tr_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u16: ImplicitAccess: false Instruction: ds_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u16_d16: ImplicitAccess: false Instruction: ds_load_u16_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u16_d16_hi: ImplicitAccess: false Instruction: ds_load_u16_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u8: ImplicitAccess: false Instruction: ds_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u8_d16: ImplicitAccess: false Instruction: ds_load_u8_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_load_u8_d16_hi: ImplicitAccess: false Instruction: ds_load_u8_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_f32: ImplicitAccess: false Instruction: ds_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_f64: ImplicitAccess: false Instruction: ds_max_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_i32: ImplicitAccess: false Instruction: ds_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_i64: ImplicitAccess: false Instruction: ds_max_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_num_f32: ImplicitAccess: false Instruction: ds_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_num_f64: ImplicitAccess: false Instruction: ds_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_num_rtn_f32: ImplicitAccess: false Instruction: ds_max_num_rtn_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_num_rtn_f64: ImplicitAccess: false Instruction: ds_max_num_rtn_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_f32: ImplicitAccess: false Instruction: ds_max_rtn_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_f64: ImplicitAccess: false Instruction: ds_max_rtn_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_i32: ImplicitAccess: false Instruction: ds_max_rtn_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_i64: ImplicitAccess: false Instruction: ds_max_rtn_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_u32: ImplicitAccess: false Instruction: ds_max_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_rtn_u64: ImplicitAccess: false Instruction: ds_max_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_u32: ImplicitAccess: false Instruction: ds_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_max_u64: ImplicitAccess: false Instruction: ds_max_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_f32: ImplicitAccess: false Instruction: ds_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_f64: ImplicitAccess: false Instruction: ds_min_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_i32: ImplicitAccess: false Instruction: ds_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_i64: ImplicitAccess: false Instruction: ds_min_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_num_f32: ImplicitAccess: false Instruction: ds_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_num_f64: ImplicitAccess: false Instruction: ds_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_num_rtn_f32: ImplicitAccess: false Instruction: ds_min_num_rtn_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_num_rtn_f64: ImplicitAccess: false Instruction: ds_min_num_rtn_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_f32: ImplicitAccess: false Instruction: ds_min_rtn_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_f64: ImplicitAccess: false Instruction: ds_min_rtn_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_i32: ImplicitAccess: false Instruction: ds_min_rtn_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_i64: ImplicitAccess: false Instruction: ds_min_rtn_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_u32: ImplicitAccess: false Instruction: ds_min_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_rtn_u64: ImplicitAccess: false Instruction: ds_min_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_u32: ImplicitAccess: false Instruction: ds_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_min_u64: ImplicitAccess: false Instruction: ds_min_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_mskor_b32: ImplicitAccess: false Instruction: ds_mskor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_mskor_b64: ImplicitAccess: false Instruction: ds_mskor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_mskor_rtn_b32: ImplicitAccess: false Instruction: ds_mskor_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_mskor_rtn_b64: ImplicitAccess: false Instruction: ds_mskor_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_nop: ImplicitAccess: false Instruction: ds_nop IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_or_b32: ImplicitAccess: false Instruction: ds_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_or_b64: ImplicitAccess: false Instruction: ds_or_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_or_rtn_b32: ImplicitAccess: false Instruction: ds_or_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_or_rtn_b64: ImplicitAccess: false Instruction: ds_or_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_permute_b32: ImplicitAccess: false Instruction: ds_permute_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_pk_add_bf16: ImplicitAccess: false Instruction: ds_pk_add_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_pk_add_f16: ImplicitAccess: false Instruction: ds_pk_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_pk_add_rtn_bf16: ImplicitAccess: false Instruction: ds_pk_add_rtn_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_pk_add_rtn_f16: ImplicitAccess: false Instruction: ds_pk_add_rtn_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_read2_b32: ImplicitAccess: false Instruction: ds_read2_b32 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_read2_b64: ImplicitAccess: false Instruction: ds_read2_b64 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_read2st64_b32: ImplicitAccess: false Instruction: ds_read2st64_b32 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_read2st64_b64: ImplicitAccess: false Instruction: ds_read2st64_b64 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_read_addtid_b32: ImplicitAccess: false Instruction: ds_read_addtid_b32 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_b128: ImplicitAccess: false Instruction: ds_read_b128 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_b32: ImplicitAccess: false Instruction: ds_read_b32 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_b64: ImplicitAccess: false Instruction: ds_read_b64 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_b96: ImplicitAccess: false Instruction: ds_read_b96 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_i16: ImplicitAccess: false Instruction: ds_read_i16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_i8: ImplicitAccess: false Instruction: ds_read_i8 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_i8_d16: ImplicitAccess: false Instruction: ds_read_i8_d16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_i8_d16_hi: ImplicitAccess: false Instruction: ds_read_i8_d16_hi IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u16: ImplicitAccess: false Instruction: ds_read_u16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u16_d16: ImplicitAccess: false Instruction: ds_read_u16_d16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u16_d16_hi: ImplicitAccess: false Instruction: ds_read_u16_d16_hi IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u8: ImplicitAccess: false Instruction: ds_read_u8 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u8_d16: ImplicitAccess: false Instruction: ds_read_u8_d16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_read_u8_d16_hi: ImplicitAccess: false Instruction: ds_read_u8_d16_hi IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_rsub_rtn_u32: ImplicitAccess: false Instruction: ds_rsub_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_rsub_rtn_u64: ImplicitAccess: false Instruction: ds_rsub_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_rsub_u32: ImplicitAccess: false Instruction: ds_rsub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_rsub_u64: ImplicitAccess: false Instruction: ds_rsub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_2addr_b32: ImplicitAccess: false Instruction: ds_store_2addr_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_2addr_b64: ImplicitAccess: false Instruction: ds_store_2addr_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_2addr_stride64_b32: ImplicitAccess: false Instruction: ds_store_2addr_stride64_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_2addr_stride64_b64: ImplicitAccess: false Instruction: ds_store_2addr_stride64_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_addtid_b32: ImplicitAccess: false Instruction: ds_store_addtid_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b128: ImplicitAccess: false Instruction: ds_store_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b16: ImplicitAccess: false Instruction: ds_store_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b16_d16_hi: ImplicitAccess: false Instruction: ds_store_b16_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b32: ImplicitAccess: false Instruction: ds_store_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b64: ImplicitAccess: false Instruction: ds_store_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b8: ImplicitAccess: false Instruction: ds_store_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b8_d16_hi: ImplicitAccess: false Instruction: ds_store_b8_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_store_b96: ImplicitAccess: false Instruction: ds_store_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_2addr_rtn_b32: ImplicitAccess: false Instruction: ds_storexchg_2addr_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_2addr_rtn_b64: ImplicitAccess: false Instruction: ds_storexchg_2addr_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_2addr_stride64_rtn_b32: ImplicitAccess: false Instruction: ds_storexchg_2addr_stride64_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_2addr_stride64_rtn_b64: ImplicitAccess: false Instruction: ds_storexchg_2addr_stride64_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_rtn_b32: ImplicitAccess: false Instruction: ds_storexchg_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_storexchg_rtn_b64: ImplicitAccess: false Instruction: ds_storexchg_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_clamp_rtn_u32: ImplicitAccess: false Instruction: ds_sub_clamp_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_clamp_u32: ImplicitAccess: false Instruction: ds_sub_clamp_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_rtn_u32: ImplicitAccess: false Instruction: ds_sub_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_rtn_u64: ImplicitAccess: false Instruction: ds_sub_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_u32: ImplicitAccess: false Instruction: ds_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_sub_u64: ImplicitAccess: false Instruction: ds_sub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_subrev_rtn_u32: ImplicitAccess: false Instruction: ds_subrev_rtn_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_subrev_rtn_u64: ImplicitAccess: false Instruction: ds_subrev_rtn_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_subrev_u32: ImplicitAccess: false Instruction: ds_subrev_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_subrev_u64: ImplicitAccess: false Instruction: ds_subrev_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_swizzle_b32: ImplicitAccess: false Instruction: ds_swizzle_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_write2_b32: ImplicitAccess: false Instruction: ds_write2_b32 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_write2_b64: ImplicitAccess: false Instruction: ds_write2_b64 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_write2st64_b32: ImplicitAccess: false Instruction: ds_write2st64_b32 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_write2st64_b64: ImplicitAccess: false Instruction: ds_write2st64_b64 IsBranch: false Latency: -1 MaxLiteral: 255 WaitCount: 1 WaitQueues: - DSQueue ds_write_addtid_b32: ImplicitAccess: false Instruction: ds_write_addtid_b32 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b128: ImplicitAccess: false Instruction: ds_write_b128 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b16: ImplicitAccess: false Instruction: ds_write_b16 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b16_d16_hi: ImplicitAccess: false Instruction: ds_write_b16_d16_hi IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b32: ImplicitAccess: false Instruction: ds_write_b32 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b64: ImplicitAccess: false Instruction: ds_write_b64 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b8: ImplicitAccess: false Instruction: ds_write_b8 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b8_d16_hi: ImplicitAccess: false Instruction: ds_write_b8_d16_hi IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_write_b96: ImplicitAccess: false Instruction: ds_write_b96 IsBranch: false Latency: -1 MaxLiteral: 65535 WaitCount: 1 WaitQueues: - DSQueue ds_wrxchg2_rtn_b32: ImplicitAccess: false Instruction: ds_wrxchg2_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_wrxchg2_rtn_b64: ImplicitAccess: false Instruction: ds_wrxchg2_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_wrxchg2st64_rtn_b32: ImplicitAccess: false Instruction: ds_wrxchg2st64_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_wrxchg2st64_rtn_b64: ImplicitAccess: false Instruction: ds_wrxchg2st64_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_wrxchg_rtn_b32: ImplicitAccess: false Instruction: ds_wrxchg_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_wrxchg_rtn_b64: ImplicitAccess: false Instruction: ds_wrxchg_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_xor_b32: ImplicitAccess: false Instruction: ds_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_xor_b64: ImplicitAccess: false Instruction: ds_xor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_xor_rtn_b32: ImplicitAccess: false Instruction: ds_xor_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] ds_xor_rtn_b64: ImplicitAccess: false Instruction: ds_xor_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add: ImplicitAccess: false Instruction: flat_atomic_add IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add_f32: ImplicitAccess: false Instruction: flat_atomic_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add_f64: ImplicitAccess: false Instruction: flat_atomic_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add_u32: ImplicitAccess: false Instruction: flat_atomic_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add_u64: ImplicitAccess: false Instruction: flat_atomic_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_add_x2: ImplicitAccess: false Instruction: flat_atomic_add_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_and: ImplicitAccess: false Instruction: flat_atomic_and IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_and_b32: ImplicitAccess: false Instruction: flat_atomic_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_and_b64: ImplicitAccess: false Instruction: flat_atomic_and_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_and_x2: ImplicitAccess: false Instruction: flat_atomic_and_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_cmpswap: ImplicitAccess: false Instruction: flat_atomic_cmpswap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_cmpswap_b32: ImplicitAccess: false Instruction: flat_atomic_cmpswap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_cmpswap_b64: ImplicitAccess: false Instruction: flat_atomic_cmpswap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_cmpswap_x2: ImplicitAccess: false Instruction: flat_atomic_cmpswap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_cond_sub_u32: ImplicitAccess: false Instruction: flat_atomic_cond_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_csub_u32: ImplicitAccess: false Instruction: flat_atomic_csub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_dec: ImplicitAccess: false Instruction: flat_atomic_dec IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_dec_u32: ImplicitAccess: false Instruction: flat_atomic_dec_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_dec_u64: ImplicitAccess: false Instruction: flat_atomic_dec_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_dec_x2: ImplicitAccess: false Instruction: flat_atomic_dec_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_fmax: ImplicitAccess: false Instruction: flat_atomic_fmax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_fmin: ImplicitAccess: false Instruction: flat_atomic_fmin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_inc: ImplicitAccess: false Instruction: flat_atomic_inc IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_inc_u32: ImplicitAccess: false Instruction: flat_atomic_inc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_inc_u64: ImplicitAccess: false Instruction: flat_atomic_inc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_inc_x2: ImplicitAccess: false Instruction: flat_atomic_inc_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_f32: ImplicitAccess: false Instruction: flat_atomic_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_i32: ImplicitAccess: false Instruction: flat_atomic_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_i64: ImplicitAccess: false Instruction: flat_atomic_max_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_num_f32: ImplicitAccess: false Instruction: flat_atomic_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_num_f64: ImplicitAccess: false Instruction: flat_atomic_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_u32: ImplicitAccess: false Instruction: flat_atomic_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_max_u64: ImplicitAccess: false Instruction: flat_atomic_max_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_f32: ImplicitAccess: false Instruction: flat_atomic_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_i32: ImplicitAccess: false Instruction: flat_atomic_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_i64: ImplicitAccess: false Instruction: flat_atomic_min_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_num_f32: ImplicitAccess: false Instruction: flat_atomic_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_num_f64: ImplicitAccess: false Instruction: flat_atomic_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_u32: ImplicitAccess: false Instruction: flat_atomic_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_min_u64: ImplicitAccess: false Instruction: flat_atomic_min_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_or: ImplicitAccess: false Instruction: flat_atomic_or IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_or_b32: ImplicitAccess: false Instruction: flat_atomic_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_or_b64: ImplicitAccess: false Instruction: flat_atomic_or_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_or_x2: ImplicitAccess: false Instruction: flat_atomic_or_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_pk_add_bf16: ImplicitAccess: false Instruction: flat_atomic_pk_add_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_pk_add_f16: ImplicitAccess: false Instruction: flat_atomic_pk_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_smax: ImplicitAccess: false Instruction: flat_atomic_smax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_smax_x2: ImplicitAccess: false Instruction: flat_atomic_smax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_smin: ImplicitAccess: false Instruction: flat_atomic_smin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_smin_x2: ImplicitAccess: false Instruction: flat_atomic_smin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_sub: ImplicitAccess: false Instruction: flat_atomic_sub IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_sub_clamp_u32: ImplicitAccess: false Instruction: flat_atomic_sub_clamp_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_sub_u32: ImplicitAccess: false Instruction: flat_atomic_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_sub_u64: ImplicitAccess: false Instruction: flat_atomic_sub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_sub_x2: ImplicitAccess: false Instruction: flat_atomic_sub_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_swap: ImplicitAccess: false Instruction: flat_atomic_swap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_swap_b32: ImplicitAccess: false Instruction: flat_atomic_swap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_swap_b64: ImplicitAccess: false Instruction: flat_atomic_swap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_swap_x2: ImplicitAccess: false Instruction: flat_atomic_swap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_umax: ImplicitAccess: false Instruction: flat_atomic_umax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_umax_x2: ImplicitAccess: false Instruction: flat_atomic_umax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_umin: ImplicitAccess: false Instruction: flat_atomic_umin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_umin_x2: ImplicitAccess: false Instruction: flat_atomic_umin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_xor: ImplicitAccess: false Instruction: flat_atomic_xor IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_xor_b32: ImplicitAccess: false Instruction: flat_atomic_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_xor_b64: ImplicitAccess: false Instruction: flat_atomic_xor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_atomic_xor_x2: ImplicitAccess: false Instruction: flat_atomic_xor_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_b128: ImplicitAccess: false Instruction: flat_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_b32: ImplicitAccess: false Instruction: flat_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_b64: ImplicitAccess: false Instruction: flat_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_b96: ImplicitAccess: false Instruction: flat_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_b16: ImplicitAccess: false Instruction: flat_load_d16_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_hi_b16: ImplicitAccess: false Instruction: flat_load_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_hi_i8: ImplicitAccess: false Instruction: flat_load_d16_hi_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_hi_u8: ImplicitAccess: false Instruction: flat_load_d16_hi_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_i8: ImplicitAccess: false Instruction: flat_load_d16_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_d16_u8: ImplicitAccess: false Instruction: flat_load_d16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_dword: ImplicitAccess: false Instruction: flat_load_dword IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_dwordx2: ImplicitAccess: false Instruction: flat_load_dwordx2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_dwordx3: ImplicitAccess: false Instruction: flat_load_dwordx3 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_dwordx4: ImplicitAccess: false Instruction: flat_load_dwordx4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_i16: ImplicitAccess: false Instruction: flat_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_i8: ImplicitAccess: false Instruction: flat_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_monitor_b128: ImplicitAccess: false Instruction: flat_load_monitor_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_monitor_b32: ImplicitAccess: false Instruction: flat_load_monitor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_monitor_b64: ImplicitAccess: false Instruction: flat_load_monitor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_sbyte: ImplicitAccess: false Instruction: flat_load_sbyte IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_sbyte_d16: ImplicitAccess: false Instruction: flat_load_sbyte_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_sbyte_d16_hi: ImplicitAccess: false Instruction: flat_load_sbyte_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_short_d16: ImplicitAccess: false Instruction: flat_load_short_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_short_d16_hi: ImplicitAccess: false Instruction: flat_load_short_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_sshort: ImplicitAccess: false Instruction: flat_load_sshort IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_u16: ImplicitAccess: false Instruction: flat_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_u8: ImplicitAccess: false Instruction: flat_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_ubyte: ImplicitAccess: false Instruction: flat_load_ubyte IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_ubyte_d16: ImplicitAccess: false Instruction: flat_load_ubyte_d16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_ubyte_d16_hi: ImplicitAccess: false Instruction: flat_load_ubyte_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_load_ushort: ImplicitAccess: false Instruction: flat_load_ushort IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_prefetch_b8: ImplicitAccess: false Instruction: flat_prefetch_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b128: ImplicitAccess: false Instruction: flat_store_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b16: ImplicitAccess: false Instruction: flat_store_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b32: ImplicitAccess: false Instruction: flat_store_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b64: ImplicitAccess: false Instruction: flat_store_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b8: ImplicitAccess: false Instruction: flat_store_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_b96: ImplicitAccess: false Instruction: flat_store_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_byte: ImplicitAccess: false Instruction: flat_store_byte IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_byte_d16_hi: ImplicitAccess: false Instruction: flat_store_byte_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_d16_hi_b16: ImplicitAccess: false Instruction: flat_store_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_d16_hi_b8: ImplicitAccess: false Instruction: flat_store_d16_hi_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_dword: ImplicitAccess: false Instruction: flat_store_dword IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_dwordx2: ImplicitAccess: false Instruction: flat_store_dwordx2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_dwordx3: ImplicitAccess: false Instruction: flat_store_dwordx3 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_dwordx4: ImplicitAccess: false Instruction: flat_store_dwordx4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_short: ImplicitAccess: false Instruction: flat_store_short IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] flat_store_short_d16_hi: ImplicitAccess: false Instruction: flat_store_short_d16_hi IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add: ImplicitAccess: false Instruction: global_atomic_add IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add_f32: ImplicitAccess: false Instruction: global_atomic_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add_f64: ImplicitAccess: false Instruction: global_atomic_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add_u32: ImplicitAccess: false Instruction: global_atomic_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add_u64: ImplicitAccess: false Instruction: global_atomic_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_add_x2: ImplicitAccess: false Instruction: global_atomic_add_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_and: ImplicitAccess: false Instruction: global_atomic_and IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_and_b32: ImplicitAccess: false Instruction: global_atomic_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_and_b64: ImplicitAccess: false Instruction: global_atomic_and_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_and_x2: ImplicitAccess: false Instruction: global_atomic_and_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_cmpswap: ImplicitAccess: false Instruction: global_atomic_cmpswap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_cmpswap_b32: ImplicitAccess: false Instruction: global_atomic_cmpswap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_cmpswap_b64: ImplicitAccess: false Instruction: global_atomic_cmpswap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_cmpswap_x2: ImplicitAccess: false Instruction: global_atomic_cmpswap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_cond_sub_u32: ImplicitAccess: false Instruction: global_atomic_cond_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_csub: ImplicitAccess: false Instruction: global_atomic_csub IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_csub_u32: ImplicitAccess: false Instruction: global_atomic_csub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_dec: ImplicitAccess: false Instruction: global_atomic_dec IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_dec_u32: ImplicitAccess: false Instruction: global_atomic_dec_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_dec_u64: ImplicitAccess: false Instruction: global_atomic_dec_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_dec_x2: ImplicitAccess: false Instruction: global_atomic_dec_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_fmax: ImplicitAccess: false Instruction: global_atomic_fmax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_fmin: ImplicitAccess: false Instruction: global_atomic_fmin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_inc: ImplicitAccess: false Instruction: global_atomic_inc IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_inc_u32: ImplicitAccess: false Instruction: global_atomic_inc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_inc_u64: ImplicitAccess: false Instruction: global_atomic_inc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_inc_x2: ImplicitAccess: false Instruction: global_atomic_inc_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_f32: ImplicitAccess: false Instruction: global_atomic_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_i32: ImplicitAccess: false Instruction: global_atomic_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_i64: ImplicitAccess: false Instruction: global_atomic_max_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_num_f32: ImplicitAccess: false Instruction: global_atomic_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_num_f64: ImplicitAccess: false Instruction: global_atomic_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_u32: ImplicitAccess: false Instruction: global_atomic_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_max_u64: ImplicitAccess: false Instruction: global_atomic_max_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_f32: ImplicitAccess: false Instruction: global_atomic_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_i32: ImplicitAccess: false Instruction: global_atomic_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_i64: ImplicitAccess: false Instruction: global_atomic_min_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_num_f32: ImplicitAccess: false Instruction: global_atomic_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_num_f64: ImplicitAccess: false Instruction: global_atomic_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_u32: ImplicitAccess: false Instruction: global_atomic_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_min_u64: ImplicitAccess: false Instruction: global_atomic_min_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_or: ImplicitAccess: false Instruction: global_atomic_or IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_or_b32: ImplicitAccess: false Instruction: global_atomic_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_or_b64: ImplicitAccess: false Instruction: global_atomic_or_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_or_x2: ImplicitAccess: false Instruction: global_atomic_or_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_pk_add_bf16: ImplicitAccess: false Instruction: global_atomic_pk_add_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_pk_add_f16: ImplicitAccess: false Instruction: global_atomic_pk_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_smax: ImplicitAccess: false Instruction: global_atomic_smax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_smax_x2: ImplicitAccess: false Instruction: global_atomic_smax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_smin: ImplicitAccess: false Instruction: global_atomic_smin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_smin_x2: ImplicitAccess: false Instruction: global_atomic_smin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_sub: ImplicitAccess: false Instruction: global_atomic_sub IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_sub_clamp_u32: ImplicitAccess: false Instruction: global_atomic_sub_clamp_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_sub_u32: ImplicitAccess: false Instruction: global_atomic_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_sub_u64: ImplicitAccess: false Instruction: global_atomic_sub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_sub_x2: ImplicitAccess: false Instruction: global_atomic_sub_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_swap: ImplicitAccess: false Instruction: global_atomic_swap IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_swap_b32: ImplicitAccess: false Instruction: global_atomic_swap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_swap_b64: ImplicitAccess: false Instruction: global_atomic_swap_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_swap_x2: ImplicitAccess: false Instruction: global_atomic_swap_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_umax: ImplicitAccess: false Instruction: global_atomic_umax IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_umax_x2: ImplicitAccess: false Instruction: global_atomic_umax_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_umin: ImplicitAccess: false Instruction: global_atomic_umin IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_umin_x2: ImplicitAccess: false Instruction: global_atomic_umin_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_xor: ImplicitAccess: false Instruction: global_atomic_xor IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_xor_b32: ImplicitAccess: false Instruction: global_atomic_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_xor_b64: ImplicitAccess: false Instruction: global_atomic_xor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_atomic_xor_x2: ImplicitAccess: false Instruction: global_atomic_xor_x2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_inv: ImplicitAccess: false Instruction: global_inv IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_addtid_b32: ImplicitAccess: false Instruction: global_load_addtid_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_async_to_lds_b128: ImplicitAccess: false Instruction: global_load_async_to_lds_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_async_to_lds_b32: ImplicitAccess: false Instruction: global_load_async_to_lds_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_async_to_lds_b64: ImplicitAccess: false Instruction: global_load_async_to_lds_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_async_to_lds_b8: ImplicitAccess: false Instruction: global_load_async_to_lds_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b128: ImplicitAccess: false Instruction: global_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b128_tr_b16: ImplicitAccess: false Instruction: global_load_b128_tr_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b128_tr_b6: ImplicitAccess: false Instruction: global_load_b128_tr_b6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b32: ImplicitAccess: false Instruction: global_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b64: ImplicitAccess: false Instruction: global_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b64_tr_b4: ImplicitAccess: false Instruction: global_load_b64_tr_b4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b64_tr_b8: ImplicitAccess: false Instruction: global_load_b64_tr_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_b96: ImplicitAccess: false Instruction: global_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_block: ImplicitAccess: false Instruction: global_load_block IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_b16: ImplicitAccess: false Instruction: global_load_d16_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_hi_b16: ImplicitAccess: false Instruction: global_load_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_hi_i8: ImplicitAccess: false Instruction: global_load_d16_hi_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_hi_u8: ImplicitAccess: false Instruction: global_load_d16_hi_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_i8: ImplicitAccess: false Instruction: global_load_d16_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_d16_u8: ImplicitAccess: false Instruction: global_load_d16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_dword: ImplicitAccess: false Instruction: global_load_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_dword_addtid: ImplicitAccess: false Instruction: global_load_dword_addtid IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_dwordx2: ImplicitAccess: false Instruction: global_load_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_dwordx3: ImplicitAccess: false Instruction: global_load_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_dwordx4: ImplicitAccess: false Instruction: global_load_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_i16: ImplicitAccess: false Instruction: global_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_i8: ImplicitAccess: false Instruction: global_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_monitor_b128: ImplicitAccess: false Instruction: global_load_monitor_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_monitor_b32: ImplicitAccess: false Instruction: global_load_monitor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_monitor_b64: ImplicitAccess: false Instruction: global_load_monitor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_sbyte: ImplicitAccess: false Instruction: global_load_sbyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_sbyte_d16: ImplicitAccess: false Instruction: global_load_sbyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_sbyte_d16_hi: ImplicitAccess: false Instruction: global_load_sbyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_short_d16: ImplicitAccess: false Instruction: global_load_short_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_short_d16_hi: ImplicitAccess: false Instruction: global_load_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_sshort: ImplicitAccess: false Instruction: global_load_sshort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_tr16_b128: ImplicitAccess: false Instruction: global_load_tr16_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_tr4_b64: ImplicitAccess: false Instruction: global_load_tr4_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_tr6_b96: ImplicitAccess: false Instruction: global_load_tr6_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_tr8_b64: ImplicitAccess: false Instruction: global_load_tr8_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_tr_b128: ImplicitAccess: false Instruction: global_load_tr_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_tr_b64: ImplicitAccess: false Instruction: global_load_tr_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_u16: ImplicitAccess: false Instruction: global_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_u8: ImplicitAccess: false Instruction: global_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_load_ubyte: ImplicitAccess: false Instruction: global_load_ubyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_ubyte_d16: ImplicitAccess: false Instruction: global_load_ubyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_ubyte_d16_hi: ImplicitAccess: false Instruction: global_load_ubyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_load_ushort: ImplicitAccess: false Instruction: global_load_ushort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue global_prefetch_b8: ImplicitAccess: false Instruction: global_prefetch_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_addtid_b32: ImplicitAccess: false Instruction: global_store_addtid_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_async_from_lds_b128: ImplicitAccess: false Instruction: global_store_async_from_lds_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_async_from_lds_b32: ImplicitAccess: false Instruction: global_store_async_from_lds_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_async_from_lds_b64: ImplicitAccess: false Instruction: global_store_async_from_lds_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_async_from_lds_b8: ImplicitAccess: false Instruction: global_store_async_from_lds_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b128: ImplicitAccess: false Instruction: global_store_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b16: ImplicitAccess: false Instruction: global_store_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b32: ImplicitAccess: false Instruction: global_store_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b64: ImplicitAccess: false Instruction: global_store_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b8: ImplicitAccess: false Instruction: global_store_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_b96: ImplicitAccess: false Instruction: global_store_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_block: ImplicitAccess: false Instruction: global_store_block IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_byte: ImplicitAccess: false Instruction: global_store_byte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_byte_d16_hi: ImplicitAccess: false Instruction: global_store_byte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_d16_hi_b16: ImplicitAccess: false Instruction: global_store_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_d16_hi_b8: ImplicitAccess: false Instruction: global_store_d16_hi_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_dword: ImplicitAccess: false Instruction: global_store_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_dword_addtid: ImplicitAccess: false Instruction: global_store_dword_addtid IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_store_dwordx2: ImplicitAccess: false Instruction: global_store_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_dwordx3: ImplicitAccess: false Instruction: global_store_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_dwordx4: ImplicitAccess: false Instruction: global_store_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_short: ImplicitAccess: false Instruction: global_store_short IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_store_short_d16_hi: ImplicitAccess: false Instruction: global_store_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue global_wb: ImplicitAccess: false Instruction: global_wb IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] global_wbinv: ImplicitAccess: false Instruction: global_wbinv IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_abs_i32: ImplicitAccess: false Instruction: s_abs_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_absdiff_i32: ImplicitAccess: false Instruction: s_absdiff_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_co_ci_u32: ImplicitAccess: false Instruction: s_add_co_ci_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_co_i32: ImplicitAccess: false Instruction: s_add_co_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_co_u32: ImplicitAccess: false Instruction: s_add_co_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_f16: ImplicitAccess: false Instruction: s_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_f32: ImplicitAccess: false Instruction: s_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_i32: ImplicitAccess: false Instruction: s_add_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_nc_u64: ImplicitAccess: false Instruction: s_add_nc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_pc_i64: ImplicitAccess: false Instruction: s_add_pc_i64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_u32: ImplicitAccess: false Instruction: s_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_add_u64: ImplicitAccess: false Instruction: s_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_addc_u32: ImplicitAccess: false Instruction: s_addc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_addk_co_i32: ImplicitAccess: false Instruction: s_addk_co_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_addk_i32: ImplicitAccess: false Instruction: s_addk_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_alloc_vgpr: ImplicitAccess: false Instruction: s_alloc_vgpr IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_b32: ImplicitAccess: false Instruction: s_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_b64: ImplicitAccess: false Instruction: s_and_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not0_saveexec_b32: ImplicitAccess: false Instruction: s_and_not0_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not0_saveexec_b64: ImplicitAccess: false Instruction: s_and_not0_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not0_wrexec_b32: ImplicitAccess: false Instruction: s_and_not0_wrexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not0_wrexec_b64: ImplicitAccess: false Instruction: s_and_not0_wrexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_b32: ImplicitAccess: false Instruction: s_and_not1_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_b64: ImplicitAccess: false Instruction: s_and_not1_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_saveexec_b32: ImplicitAccess: false Instruction: s_and_not1_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_saveexec_b64: ImplicitAccess: false Instruction: s_and_not1_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_wrexec_b32: ImplicitAccess: false Instruction: s_and_not1_wrexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_not1_wrexec_b64: ImplicitAccess: false Instruction: s_and_not1_wrexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_saveexec_b32: ImplicitAccess: false Instruction: s_and_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_and_saveexec_b64: ImplicitAccess: false Instruction: s_and_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn1_saveexec_b32: ImplicitAccess: false Instruction: s_andn1_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn1_saveexec_b64: ImplicitAccess: false Instruction: s_andn1_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn1_wrexec_b32: ImplicitAccess: false Instruction: s_andn1_wrexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn1_wrexec_b64: ImplicitAccess: false Instruction: s_andn1_wrexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_b32: ImplicitAccess: false Instruction: s_andn2_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_b64: ImplicitAccess: false Instruction: s_andn2_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_saveexec_b32: ImplicitAccess: false Instruction: s_andn2_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_saveexec_b64: ImplicitAccess: false Instruction: s_andn2_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_wrexec_b32: ImplicitAccess: false Instruction: s_andn2_wrexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_andn2_wrexec_b64: ImplicitAccess: false Instruction: s_andn2_wrexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ashr_i32: ImplicitAccess: false Instruction: s_ashr_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ashr_i64: ImplicitAccess: false Instruction: s_ashr_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_atc_probe: ImplicitAccess: false Instruction: s_atc_probe IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_atc_probe_buffer: ImplicitAccess: false Instruction: s_atc_probe_buffer IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_barrier_signal: ImplicitAccess: false Instruction: s_barrier_signal IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_barrier_signal_isfirst: ImplicitAccess: false Instruction: s_barrier_signal_isfirst IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_barrier_wait: ImplicitAccess: false Instruction: s_barrier_wait IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bcnt0_i32_b32: ImplicitAccess: false Instruction: s_bcnt0_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bcnt0_i32_b64: ImplicitAccess: false Instruction: s_bcnt0_i32_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bcnt1_i32_b32: ImplicitAccess: false Instruction: s_bcnt1_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bcnt1_i32_b64: ImplicitAccess: false Instruction: s_bcnt1_i32_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfe_i32: ImplicitAccess: false Instruction: s_bfe_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfe_i64: ImplicitAccess: false Instruction: s_bfe_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfe_u32: ImplicitAccess: false Instruction: s_bfe_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfe_u64: ImplicitAccess: false Instruction: s_bfe_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfm_b32: ImplicitAccess: false Instruction: s_bfm_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bfm_b64: ImplicitAccess: false Instruction: s_bfm_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitcmp0_b32: ImplicitAccess: false Instruction: s_bitcmp0_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitcmp0_b64: ImplicitAccess: false Instruction: s_bitcmp0_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitcmp1_b32: ImplicitAccess: false Instruction: s_bitcmp1_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitcmp1_b64: ImplicitAccess: false Instruction: s_bitcmp1_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitreplicate_b64_b32: ImplicitAccess: false Instruction: s_bitreplicate_b64_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitset0_b32: ImplicitAccess: false Instruction: s_bitset0_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitset0_b64: ImplicitAccess: false Instruction: s_bitset0_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitset1_b32: ImplicitAccess: false Instruction: s_bitset1_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_bitset1_b64: ImplicitAccess: false Instruction: s_bitset1_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_branch: ImplicitAccess: false Instruction: s_branch IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_brev_b32: ImplicitAccess: false Instruction: s_brev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_brev_b64: ImplicitAccess: false Instruction: s_brev_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b128: ImplicitAccess: false Instruction: s_buffer_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b256: ImplicitAccess: false Instruction: s_buffer_load_b256 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b32: ImplicitAccess: false Instruction: s_buffer_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b512: ImplicitAccess: false Instruction: s_buffer_load_b512 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b64: ImplicitAccess: false Instruction: s_buffer_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_b96: ImplicitAccess: false Instruction: s_buffer_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_dword: ImplicitAccess: false Instruction: s_buffer_load_dword IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 1 WaitQueues: - SMemQueue s_buffer_load_dwordx16: ImplicitAccess: false Instruction: s_buffer_load_dwordx16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 2 WaitQueues: - SMemQueue s_buffer_load_dwordx2: ImplicitAccess: false Instruction: s_buffer_load_dwordx2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 2 WaitQueues: - SMemQueue s_buffer_load_dwordx4: ImplicitAccess: false Instruction: s_buffer_load_dwordx4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 2 WaitQueues: - SMemQueue s_buffer_load_dwordx8: ImplicitAccess: false Instruction: s_buffer_load_dwordx8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 2 WaitQueues: - SMemQueue s_buffer_load_i16: ImplicitAccess: false Instruction: s_buffer_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_i8: ImplicitAccess: false Instruction: s_buffer_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_u16: ImplicitAccess: false Instruction: s_buffer_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_load_u8: ImplicitAccess: false Instruction: s_buffer_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_buffer_prefetch_data: ImplicitAccess: false Instruction: s_buffer_prefetch_data IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_call_b64: ImplicitAccess: false Instruction: s_call_b64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_call_i64: ImplicitAccess: false Instruction: s_call_i64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_execnz: ImplicitAccess: false Instruction: s_cbranch_execnz IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_execz: ImplicitAccess: false Instruction: s_cbranch_execz IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_scc0: ImplicitAccess: false Instruction: s_cbranch_scc0 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_scc1: ImplicitAccess: false Instruction: s_cbranch_scc1 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_vccnz: ImplicitAccess: false Instruction: s_cbranch_vccnz IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cbranch_vccz: ImplicitAccess: false Instruction: s_cbranch_vccz IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ceil_f16: ImplicitAccess: false Instruction: s_ceil_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ceil_f32: ImplicitAccess: false Instruction: s_ceil_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_clause: ImplicitAccess: false Instruction: s_clause IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cls_i32: ImplicitAccess: false Instruction: s_cls_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cls_i32_i64: ImplicitAccess: false Instruction: s_cls_i32_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_clz_i32_u32: ImplicitAccess: false Instruction: s_clz_i32_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_clz_i32_u64: ImplicitAccess: false Instruction: s_clz_i32_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmov_b32: ImplicitAccess: false Instruction: s_cmov_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmov_b64: ImplicitAccess: false Instruction: s_cmov_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmovk_i32: ImplicitAccess: false Instruction: s_cmovk_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_eq_f16: ImplicitAccess: false Instruction: s_cmp_eq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_eq_f32: ImplicitAccess: false Instruction: s_cmp_eq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_eq_i32: ImplicitAccess: false Instruction: s_cmp_eq_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_eq_u32: ImplicitAccess: false Instruction: s_cmp_eq_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_eq_u64: ImplicitAccess: false Instruction: s_cmp_eq_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ge_f16: ImplicitAccess: false Instruction: s_cmp_ge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ge_f32: ImplicitAccess: false Instruction: s_cmp_ge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ge_i32: ImplicitAccess: false Instruction: s_cmp_ge_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ge_u32: ImplicitAccess: false Instruction: s_cmp_ge_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_gt_f16: ImplicitAccess: false Instruction: s_cmp_gt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_gt_f32: ImplicitAccess: false Instruction: s_cmp_gt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_gt_i32: ImplicitAccess: false Instruction: s_cmp_gt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_gt_u32: ImplicitAccess: false Instruction: s_cmp_gt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_le_f16: ImplicitAccess: false Instruction: s_cmp_le_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_le_f32: ImplicitAccess: false Instruction: s_cmp_le_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_le_i32: ImplicitAccess: false Instruction: s_cmp_le_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_le_u32: ImplicitAccess: false Instruction: s_cmp_le_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lg_f16: ImplicitAccess: false Instruction: s_cmp_lg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lg_f32: ImplicitAccess: false Instruction: s_cmp_lg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lg_i32: ImplicitAccess: false Instruction: s_cmp_lg_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lg_u32: ImplicitAccess: false Instruction: s_cmp_lg_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lg_u64: ImplicitAccess: false Instruction: s_cmp_lg_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lt_f16: ImplicitAccess: false Instruction: s_cmp_lt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lt_f32: ImplicitAccess: false Instruction: s_cmp_lt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lt_i32: ImplicitAccess: false Instruction: s_cmp_lt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_lt_u32: ImplicitAccess: false Instruction: s_cmp_lt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_neq_f16: ImplicitAccess: false Instruction: s_cmp_neq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_neq_f32: ImplicitAccess: false Instruction: s_cmp_neq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nge_f16: ImplicitAccess: false Instruction: s_cmp_nge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nge_f32: ImplicitAccess: false Instruction: s_cmp_nge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ngt_f16: ImplicitAccess: false Instruction: s_cmp_ngt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_ngt_f32: ImplicitAccess: false Instruction: s_cmp_ngt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nle_f16: ImplicitAccess: false Instruction: s_cmp_nle_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nle_f32: ImplicitAccess: false Instruction: s_cmp_nle_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nlg_f16: ImplicitAccess: false Instruction: s_cmp_nlg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nlg_f32: ImplicitAccess: false Instruction: s_cmp_nlg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nlt_f16: ImplicitAccess: false Instruction: s_cmp_nlt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_nlt_f32: ImplicitAccess: false Instruction: s_cmp_nlt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_o_f16: ImplicitAccess: false Instruction: s_cmp_o_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_o_f32: ImplicitAccess: false Instruction: s_cmp_o_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_u_f16: ImplicitAccess: false Instruction: s_cmp_u_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cmp_u_f32: ImplicitAccess: false Instruction: s_cmp_u_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_code_end: ImplicitAccess: false Instruction: s_code_end IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cselect_b32: ImplicitAccess: false Instruction: s_cselect_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cselect_b64: ImplicitAccess: false Instruction: s_cselect_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ctz_i32_b32: ImplicitAccess: false Instruction: s_ctz_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ctz_i32_b64: ImplicitAccess: false Instruction: s_ctz_i32_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_f16_f32: ImplicitAccess: false Instruction: s_cvt_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_f32_f16: ImplicitAccess: false Instruction: s_cvt_f32_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_f32_i32: ImplicitAccess: false Instruction: s_cvt_f32_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_f32_u32: ImplicitAccess: false Instruction: s_cvt_f32_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_hi_f32_f16: ImplicitAccess: false Instruction: s_cvt_hi_f32_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_i32_f32: ImplicitAccess: false Instruction: s_cvt_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_pk_rtz_f16_f32: ImplicitAccess: false Instruction: s_cvt_pk_rtz_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_cvt_u32_f32: ImplicitAccess: false Instruction: s_cvt_u32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_dcache_inv: ImplicitAccess: false Instruction: s_dcache_inv IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_decperflevel: ImplicitAccess: false Instruction: s_decperflevel IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_delay_alu: ImplicitAccess: false Instruction: s_delay_alu IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_denorm_mode: ImplicitAccess: false Instruction: s_denorm_mode IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_endpgm: ImplicitAccess: false Instruction: s_endpgm IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: - FinalInstruction s_endpgm_saved: ImplicitAccess: false Instruction: s_endpgm_saved IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ff1_i32_b32: ImplicitAccess: false Instruction: s_ff1_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ff1_i32_b64: ImplicitAccess: false Instruction: s_ff1_i32_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_flbit_i32: ImplicitAccess: false Instruction: s_flbit_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_flbit_i32_b32: ImplicitAccess: false Instruction: s_flbit_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_flbit_i32_b64: ImplicitAccess: false Instruction: s_flbit_i32_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_flbit_i32_i64: ImplicitAccess: false Instruction: s_flbit_i32_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_floor_f16: ImplicitAccess: false Instruction: s_floor_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_floor_f32: ImplicitAccess: false Instruction: s_floor_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_fmaak_f32: ImplicitAccess: false Instruction: s_fmaak_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_fmac_f16: ImplicitAccess: false Instruction: s_fmac_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_fmac_f32: ImplicitAccess: false Instruction: s_fmac_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_fmamk_f32: ImplicitAccess: false Instruction: s_fmamk_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_get_pc_i64: ImplicitAccess: false Instruction: s_get_pc_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_get_shader_cycles_u64: ImplicitAccess: false Instruction: s_get_shader_cycles_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_getpc_b64: ImplicitAccess: false Instruction: s_getpc_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_getreg_b32: ImplicitAccess: false Instruction: s_getreg_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_icache_inv: ImplicitAccess: false Instruction: s_icache_inv IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_incperflevel: ImplicitAccess: false Instruction: s_incperflevel IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b128: ImplicitAccess: false Instruction: s_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b256: ImplicitAccess: false Instruction: s_load_b256 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b32: ImplicitAccess: false Instruction: s_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b512: ImplicitAccess: false Instruction: s_load_b512 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b64: ImplicitAccess: false Instruction: s_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_b96: ImplicitAccess: false Instruction: s_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_dword: ImplicitAccess: false Instruction: s_load_dword IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 0 WaitQueues: - SMemQueue s_load_dwordx16: ImplicitAccess: false Instruction: s_load_dwordx16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 0 WaitQueues: - SMemQueue s_load_dwordx2: ImplicitAccess: false Instruction: s_load_dwordx2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 0 WaitQueues: - SMemQueue s_load_dwordx4: ImplicitAccess: false Instruction: s_load_dwordx4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 0 WaitQueues: - SMemQueue s_load_dwordx8: ImplicitAccess: false Instruction: s_load_dwordx8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 0 WaitQueues: - SMemQueue s_load_i16: ImplicitAccess: false Instruction: s_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_i8: ImplicitAccess: false Instruction: s_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_u16: ImplicitAccess: false Instruction: s_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_load_u8: ImplicitAccess: false Instruction: s_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl1_add_u32: ImplicitAccess: false Instruction: s_lshl1_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl2_add_u32: ImplicitAccess: false Instruction: s_lshl2_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl3_add_u32: ImplicitAccess: false Instruction: s_lshl3_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl4_add_u32: ImplicitAccess: false Instruction: s_lshl4_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl_b32: ImplicitAccess: false Instruction: s_lshl_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshl_b64: ImplicitAccess: false Instruction: s_lshl_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshr_b32: ImplicitAccess: false Instruction: s_lshr_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_lshr_b64: ImplicitAccess: false Instruction: s_lshr_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_f16: ImplicitAccess: false Instruction: s_max_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_f32: ImplicitAccess: false Instruction: s_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_i32: ImplicitAccess: false Instruction: s_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_num_f16: ImplicitAccess: false Instruction: s_max_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_num_f32: ImplicitAccess: false Instruction: s_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_max_u32: ImplicitAccess: false Instruction: s_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_maximum_f16: ImplicitAccess: false Instruction: s_maximum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_maximum_f32: ImplicitAccess: false Instruction: s_maximum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_f16: ImplicitAccess: false Instruction: s_min_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_f32: ImplicitAccess: false Instruction: s_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_i32: ImplicitAccess: false Instruction: s_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_num_f16: ImplicitAccess: false Instruction: s_min_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_num_f32: ImplicitAccess: false Instruction: s_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_min_u32: ImplicitAccess: false Instruction: s_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_minimum_f16: ImplicitAccess: false Instruction: s_minimum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_minimum_f32: ImplicitAccess: false Instruction: s_minimum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_monitor_sleep: ImplicitAccess: false Instruction: s_monitor_sleep IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mov_b32: ImplicitAccess: false Instruction: s_mov_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mov_b64: ImplicitAccess: false Instruction: s_mov_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movk_i32: ImplicitAccess: false Instruction: s_movk_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movreld_b32: ImplicitAccess: false Instruction: s_movreld_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movreld_b64: ImplicitAccess: false Instruction: s_movreld_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movrels_b32: ImplicitAccess: false Instruction: s_movrels_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movrels_b64: ImplicitAccess: false Instruction: s_movrels_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_movrelsd_2_b32: ImplicitAccess: false Instruction: s_movrelsd_2_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_f16: ImplicitAccess: false Instruction: s_mul_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_f32: ImplicitAccess: false Instruction: s_mul_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_hi_i32: ImplicitAccess: false Instruction: s_mul_hi_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_hi_u32: ImplicitAccess: false Instruction: s_mul_hi_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_i32: ImplicitAccess: false Instruction: s_mul_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mul_u64: ImplicitAccess: false Instruction: s_mul_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_mulk_i32: ImplicitAccess: false Instruction: s_mulk_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nand_b32: ImplicitAccess: false Instruction: s_nand_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nand_b64: ImplicitAccess: false Instruction: s_nand_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nand_saveexec_b32: ImplicitAccess: false Instruction: s_nand_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nand_saveexec_b64: ImplicitAccess: false Instruction: s_nand_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nop: ImplicitAccess: false Instruction: s_nop IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nor_b32: ImplicitAccess: false Instruction: s_nor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nor_b64: ImplicitAccess: false Instruction: s_nor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nor_saveexec_b32: ImplicitAccess: false Instruction: s_nor_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_nor_saveexec_b64: ImplicitAccess: false Instruction: s_nor_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_not_b32: ImplicitAccess: false Instruction: s_not_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_not_b64: ImplicitAccess: false Instruction: s_not_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_b32: ImplicitAccess: false Instruction: s_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_b64: ImplicitAccess: false Instruction: s_or_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not0_saveexec_b32: ImplicitAccess: false Instruction: s_or_not0_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not0_saveexec_b64: ImplicitAccess: false Instruction: s_or_not0_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not1_b32: ImplicitAccess: false Instruction: s_or_not1_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not1_b64: ImplicitAccess: false Instruction: s_or_not1_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not1_saveexec_b32: ImplicitAccess: false Instruction: s_or_not1_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_not1_saveexec_b64: ImplicitAccess: false Instruction: s_or_not1_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_saveexec_b32: ImplicitAccess: false Instruction: s_or_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_or_saveexec_b64: ImplicitAccess: false Instruction: s_or_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn1_saveexec_b32: ImplicitAccess: false Instruction: s_orn1_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn1_saveexec_b64: ImplicitAccess: false Instruction: s_orn1_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn2_b32: ImplicitAccess: false Instruction: s_orn2_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn2_b64: ImplicitAccess: false Instruction: s_orn2_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn2_saveexec_b32: ImplicitAccess: false Instruction: s_orn2_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_orn2_saveexec_b64: ImplicitAccess: false Instruction: s_orn2_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_pack_hh_b32_b16: ImplicitAccess: false Instruction: s_pack_hh_b32_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_pack_hl_b32_b16: ImplicitAccess: false Instruction: s_pack_hl_b32_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_pack_lh_b32_b16: ImplicitAccess: false Instruction: s_pack_lh_b32_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_pack_ll_b32_b16: ImplicitAccess: false Instruction: s_pack_ll_b32_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_prefetch_data: ImplicitAccess: false Instruction: s_prefetch_data IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_prefetch_data_pc_rel: ImplicitAccess: false Instruction: s_prefetch_data_pc_rel IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_prefetch_inst: ImplicitAccess: false Instruction: s_prefetch_inst IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_prefetch_inst_pc_rel: ImplicitAccess: false Instruction: s_prefetch_inst_pc_rel IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_quadmask_b32: ImplicitAccess: false Instruction: s_quadmask_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_quadmask_b64: ImplicitAccess: false Instruction: s_quadmask_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_rfe_b64: ImplicitAccess: false Instruction: s_rfe_b64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_rfe_i64: ImplicitAccess: false Instruction: s_rfe_i64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_rndne_f16: ImplicitAccess: false Instruction: s_rndne_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_rndne_f32: ImplicitAccess: false Instruction: s_rndne_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_round_mode: ImplicitAccess: false Instruction: s_round_mode IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sendmsg: ImplicitAccess: false Instruction: s_sendmsg IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 1 WaitQueues: - SendMsgQueue s_sendmsg_rtn_b32: ImplicitAccess: false Instruction: s_sendmsg_rtn_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sendmsg_rtn_b64: ImplicitAccess: false Instruction: s_sendmsg_rtn_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sendmsghalt: ImplicitAccess: false Instruction: s_sendmsghalt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_set_pc_i64: ImplicitAccess: false Instruction: s_set_pc_i64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_set_vgpr_msb: ImplicitAccess: false Instruction: s_set_vgpr_msb IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sethalt: ImplicitAccess: false Instruction: s_sethalt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_setpc_b64: ImplicitAccess: false Instruction: s_setpc_b64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_setprio: ImplicitAccess: false Instruction: s_setprio IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_setprio_inc_wg: ImplicitAccess: false Instruction: s_setprio_inc_wg IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_setreg_b32: ImplicitAccess: false Instruction: s_setreg_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_setreg_imm32_b32: ImplicitAccess: false Instruction: s_setreg_imm32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sext_i32_i16: ImplicitAccess: false Instruction: s_sext_i32_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sext_i32_i8: ImplicitAccess: false Instruction: s_sext_i32_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sleep: ImplicitAccess: false Instruction: s_sleep IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sleep_var: ImplicitAccess: false Instruction: s_sleep_var IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_co_ci_u32: ImplicitAccess: false Instruction: s_sub_co_ci_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_co_i32: ImplicitAccess: false Instruction: s_sub_co_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_co_u32: ImplicitAccess: false Instruction: s_sub_co_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_f16: ImplicitAccess: false Instruction: s_sub_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_f32: ImplicitAccess: false Instruction: s_sub_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_i32: ImplicitAccess: false Instruction: s_sub_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_nc_u64: ImplicitAccess: false Instruction: s_sub_nc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_u32: ImplicitAccess: false Instruction: s_sub_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_sub_u64: ImplicitAccess: false Instruction: s_sub_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_subb_u32: ImplicitAccess: false Instruction: s_subb_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_swap_pc_i64: ImplicitAccess: false Instruction: s_swap_pc_i64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_swappc_b64: ImplicitAccess: false Instruction: s_swappc_b64 IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_trap: ImplicitAccess: false Instruction: s_trap IsBranch: true Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_trunc_f16: ImplicitAccess: false Instruction: s_trunc_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_trunc_f32: ImplicitAccess: false Instruction: s_trunc_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ttracedata: ImplicitAccess: false Instruction: s_ttracedata IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_ttracedata_imm: ImplicitAccess: false Instruction: s_ttracedata_imm IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_version: ImplicitAccess: false Instruction: s_version IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_alu: ImplicitAccess: false Instruction: s_wait_alu IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_asynccnt: ImplicitAccess: false Instruction: s_wait_asynccnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_dscnt: ImplicitAccess: false Instruction: s_wait_dscnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_idle: ImplicitAccess: false Instruction: s_wait_idle IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_kmcnt: ImplicitAccess: false Instruction: s_wait_kmcnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_loadcnt: ImplicitAccess: false Instruction: s_wait_loadcnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_loadcnt_dscnt: ImplicitAccess: false Instruction: s_wait_loadcnt_dscnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_storecnt: ImplicitAccess: false Instruction: s_wait_storecnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_storecnt_dscnt: ImplicitAccess: false Instruction: s_wait_storecnt_dscnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_tensorcnt: ImplicitAccess: false Instruction: s_wait_tensorcnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wait_xcnt: ImplicitAccess: false Instruction: s_wait_xcnt IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_waitcnt_depctr: ImplicitAccess: false Instruction: s_waitcnt_depctr IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wakeup: ImplicitAccess: false Instruction: s_wakeup IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wqm_b32: ImplicitAccess: false Instruction: s_wqm_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_wqm_b64: ImplicitAccess: false Instruction: s_wqm_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xnor_b32: ImplicitAccess: false Instruction: s_xnor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xnor_b64: ImplicitAccess: false Instruction: s_xnor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xnor_saveexec_b32: ImplicitAccess: false Instruction: s_xnor_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xnor_saveexec_b64: ImplicitAccess: false Instruction: s_xnor_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xor_b32: ImplicitAccess: false Instruction: s_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xor_b64: ImplicitAccess: false Instruction: s_xor_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xor_saveexec_b32: ImplicitAccess: false Instruction: s_xor_saveexec_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] s_xor_saveexec_b64: ImplicitAccess: false Instruction: s_xor_saveexec_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_b128: ImplicitAccess: false Instruction: scratch_load_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_b32: ImplicitAccess: false Instruction: scratch_load_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_b64: ImplicitAccess: false Instruction: scratch_load_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_b96: ImplicitAccess: false Instruction: scratch_load_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_block: ImplicitAccess: false Instruction: scratch_load_block IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_b16: ImplicitAccess: false Instruction: scratch_load_d16_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_hi_b16: ImplicitAccess: false Instruction: scratch_load_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_hi_i8: ImplicitAccess: false Instruction: scratch_load_d16_hi_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_hi_u8: ImplicitAccess: false Instruction: scratch_load_d16_hi_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_i8: ImplicitAccess: false Instruction: scratch_load_d16_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_d16_u8: ImplicitAccess: false Instruction: scratch_load_d16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_dword: ImplicitAccess: false Instruction: scratch_load_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_dwordx2: ImplicitAccess: false Instruction: scratch_load_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_dwordx3: ImplicitAccess: false Instruction: scratch_load_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_dwordx4: ImplicitAccess: false Instruction: scratch_load_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_i16: ImplicitAccess: false Instruction: scratch_load_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_i8: ImplicitAccess: false Instruction: scratch_load_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_sbyte: ImplicitAccess: false Instruction: scratch_load_sbyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_sbyte_d16: ImplicitAccess: false Instruction: scratch_load_sbyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_sbyte_d16_hi: ImplicitAccess: false Instruction: scratch_load_sbyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_short_d16: ImplicitAccess: false Instruction: scratch_load_short_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_short_d16_hi: ImplicitAccess: false Instruction: scratch_load_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_sshort: ImplicitAccess: false Instruction: scratch_load_sshort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_u16: ImplicitAccess: false Instruction: scratch_load_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_u8: ImplicitAccess: false Instruction: scratch_load_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_load_ubyte: ImplicitAccess: false Instruction: scratch_load_ubyte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_ubyte_d16: ImplicitAccess: false Instruction: scratch_load_ubyte_d16 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_ubyte_d16_hi: ImplicitAccess: false Instruction: scratch_load_ubyte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_load_ushort: ImplicitAccess: false Instruction: scratch_load_ushort IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - LoadQueue scratch_store_b128: ImplicitAccess: false Instruction: scratch_store_b128 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_b16: ImplicitAccess: false Instruction: scratch_store_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_b32: ImplicitAccess: false Instruction: scratch_store_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_b64: ImplicitAccess: false Instruction: scratch_store_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_b8: ImplicitAccess: false Instruction: scratch_store_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_b96: ImplicitAccess: false Instruction: scratch_store_b96 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_block: ImplicitAccess: false Instruction: scratch_store_block IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_byte: ImplicitAccess: false Instruction: scratch_store_byte IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_byte_d16_hi: ImplicitAccess: false Instruction: scratch_store_byte_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_d16_hi_b16: ImplicitAccess: false Instruction: scratch_store_d16_hi_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_d16_hi_b8: ImplicitAccess: false Instruction: scratch_store_d16_hi_b8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] scratch_store_dword: ImplicitAccess: false Instruction: scratch_store_dword IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_dwordx2: ImplicitAccess: false Instruction: scratch_store_dwordx2 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_dwordx3: ImplicitAccess: false Instruction: scratch_store_dwordx3 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_dwordx4: ImplicitAccess: false Instruction: scratch_store_dwordx4 IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_short: ImplicitAccess: false Instruction: scratch_store_short IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue scratch_store_short_d16_hi: ImplicitAccess: false Instruction: scratch_store_short_d16_hi IsBranch: false Latency: -1 MaxLiteral: 4095 WaitCount: 0 WaitQueues: - StoreQueue tensor_load_to_lds: ImplicitAccess: false Instruction: tensor_load_to_lds IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 1 WaitQueues: - TensorQueue tensor_save: ImplicitAccess: false Instruction: tensor_save IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] tensor_stop: ImplicitAccess: false Instruction: tensor_stop IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] tensor_store_from_lds: ImplicitAccess: false Instruction: tensor_store_from_lds IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: 1 WaitQueues: - TensorQueue v_add3_nc_u32: ImplicitAccess: false Instruction: v_add3_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add3_u32: ImplicitAccess: false Instruction: v_add3_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_co_ci_u32: ImplicitAccess: false Instruction: v_add_co_ci_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_co_u32: ImplicitAccess: false Instruction: v_add_co_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_f16: ImplicitAccess: false Instruction: v_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_f32: ImplicitAccess: false Instruction: v_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_f64: ImplicitAccess: false Instruction: v_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_lshl_u32: ImplicitAccess: false Instruction: v_add_lshl_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_max_i32: ImplicitAccess: false Instruction: v_add_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_max_u32: ImplicitAccess: false Instruction: v_add_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_min_i32: ImplicitAccess: false Instruction: v_add_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_min_u32: ImplicitAccess: false Instruction: v_add_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_nc_i16: ImplicitAccess: false Instruction: v_add_nc_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_nc_i32: ImplicitAccess: false Instruction: v_add_nc_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_nc_u16: ImplicitAccess: false Instruction: v_add_nc_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_nc_u32: ImplicitAccess: false Instruction: v_add_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_add_nc_u64: ImplicitAccess: false Instruction: v_add_nc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_alignbit_b32: ImplicitAccess: false Instruction: v_alignbit_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_alignbyte_b32: ImplicitAccess: false Instruction: v_alignbyte_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_and_b16: ImplicitAccess: false Instruction: v_and_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_and_b32: ImplicitAccess: false Instruction: v_and_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_and_or_b32: ImplicitAccess: false Instruction: v_and_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ashr_pk_i8_i32: ImplicitAccess: false Instruction: v_ashr_pk_i8_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ashr_pk_u8_i32: ImplicitAccess: false Instruction: v_ashr_pk_u8_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ashrrev_i16: ImplicitAccess: false Instruction: v_ashrrev_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ashrrev_i32: ImplicitAccess: false Instruction: v_ashrrev_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ashrrev_i64: ImplicitAccess: false Instruction: v_ashrrev_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bcnt_u32_b32: ImplicitAccess: false Instruction: v_bcnt_u32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bfe_i32: ImplicitAccess: false Instruction: v_bfe_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bfe_u32: ImplicitAccess: false Instruction: v_bfe_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bfi_b32: ImplicitAccess: false Instruction: v_bfi_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bfm_b32: ImplicitAccess: false Instruction: v_bfm_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bfrev_b32: ImplicitAccess: false Instruction: v_bfrev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bitop3_b16: ImplicitAccess: false Instruction: v_bitop3_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_bitop3_b32: ImplicitAccess: false Instruction: v_bitop3_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ceil_f16: ImplicitAccess: false Instruction: v_ceil_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ceil_f32: ImplicitAccess: false Instruction: v_ceil_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ceil_f64: ImplicitAccess: false Instruction: v_ceil_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cls_i32: ImplicitAccess: false Instruction: v_cls_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_clz_i32_u32: ImplicitAccess: false Instruction: v_clz_i32_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_class_f16: ImplicitAccess: false Instruction: v_cmp_class_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_class_f32: ImplicitAccess: false Instruction: v_cmp_class_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_class_f64: ImplicitAccess: false Instruction: v_cmp_class_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_f16: ImplicitAccess: false Instruction: v_cmp_eq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_f32: ImplicitAccess: false Instruction: v_cmp_eq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_f64: ImplicitAccess: false Instruction: v_cmp_eq_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_i16: ImplicitAccess: false Instruction: v_cmp_eq_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_i32: ImplicitAccess: false Instruction: v_cmp_eq_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_i64: ImplicitAccess: false Instruction: v_cmp_eq_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_u16: ImplicitAccess: false Instruction: v_cmp_eq_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_u32: ImplicitAccess: false Instruction: v_cmp_eq_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_eq_u64: ImplicitAccess: false Instruction: v_cmp_eq_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_f16: ImplicitAccess: false Instruction: v_cmp_ge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_f32: ImplicitAccess: false Instruction: v_cmp_ge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_f64: ImplicitAccess: false Instruction: v_cmp_ge_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_i16: ImplicitAccess: false Instruction: v_cmp_ge_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_i32: ImplicitAccess: false Instruction: v_cmp_ge_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_i64: ImplicitAccess: false Instruction: v_cmp_ge_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_u16: ImplicitAccess: false Instruction: v_cmp_ge_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_u32: ImplicitAccess: false Instruction: v_cmp_ge_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ge_u64: ImplicitAccess: false Instruction: v_cmp_ge_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_f16: ImplicitAccess: false Instruction: v_cmp_gt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_f32: ImplicitAccess: false Instruction: v_cmp_gt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_f64: ImplicitAccess: false Instruction: v_cmp_gt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_i16: ImplicitAccess: false Instruction: v_cmp_gt_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_i32: ImplicitAccess: false Instruction: v_cmp_gt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_i64: ImplicitAccess: false Instruction: v_cmp_gt_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_u16: ImplicitAccess: false Instruction: v_cmp_gt_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_u32: ImplicitAccess: false Instruction: v_cmp_gt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_gt_u64: ImplicitAccess: false Instruction: v_cmp_gt_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_f16: ImplicitAccess: false Instruction: v_cmp_le_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_f32: ImplicitAccess: false Instruction: v_cmp_le_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_f64: ImplicitAccess: false Instruction: v_cmp_le_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_i16: ImplicitAccess: false Instruction: v_cmp_le_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_i32: ImplicitAccess: false Instruction: v_cmp_le_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_i64: ImplicitAccess: false Instruction: v_cmp_le_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_u16: ImplicitAccess: false Instruction: v_cmp_le_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_u32: ImplicitAccess: false Instruction: v_cmp_le_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_le_u64: ImplicitAccess: false Instruction: v_cmp_le_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lg_f16: ImplicitAccess: false Instruction: v_cmp_lg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lg_f32: ImplicitAccess: false Instruction: v_cmp_lg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lg_f64: ImplicitAccess: false Instruction: v_cmp_lg_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_f16: ImplicitAccess: false Instruction: v_cmp_lt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_f32: ImplicitAccess: false Instruction: v_cmp_lt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_f64: ImplicitAccess: false Instruction: v_cmp_lt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_i16: ImplicitAccess: false Instruction: v_cmp_lt_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_i32: ImplicitAccess: false Instruction: v_cmp_lt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_i64: ImplicitAccess: false Instruction: v_cmp_lt_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_u16: ImplicitAccess: false Instruction: v_cmp_lt_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_u32: ImplicitAccess: false Instruction: v_cmp_lt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_lt_u64: ImplicitAccess: false Instruction: v_cmp_lt_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_i16: ImplicitAccess: false Instruction: v_cmp_ne_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_i32: ImplicitAccess: false Instruction: v_cmp_ne_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_i64: ImplicitAccess: false Instruction: v_cmp_ne_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_u16: ImplicitAccess: false Instruction: v_cmp_ne_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_u32: ImplicitAccess: false Instruction: v_cmp_ne_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ne_u64: ImplicitAccess: false Instruction: v_cmp_ne_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_neq_f16: ImplicitAccess: false Instruction: v_cmp_neq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_neq_f32: ImplicitAccess: false Instruction: v_cmp_neq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_neq_f64: ImplicitAccess: false Instruction: v_cmp_neq_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nge_f16: ImplicitAccess: false Instruction: v_cmp_nge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nge_f32: ImplicitAccess: false Instruction: v_cmp_nge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nge_f64: ImplicitAccess: false Instruction: v_cmp_nge_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ngt_f16: ImplicitAccess: false Instruction: v_cmp_ngt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ngt_f32: ImplicitAccess: false Instruction: v_cmp_ngt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_ngt_f64: ImplicitAccess: false Instruction: v_cmp_ngt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nle_f16: ImplicitAccess: false Instruction: v_cmp_nle_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nle_f32: ImplicitAccess: false Instruction: v_cmp_nle_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nle_f64: ImplicitAccess: false Instruction: v_cmp_nle_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlg_f16: ImplicitAccess: false Instruction: v_cmp_nlg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlg_f32: ImplicitAccess: false Instruction: v_cmp_nlg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlg_f64: ImplicitAccess: false Instruction: v_cmp_nlg_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlt_f16: ImplicitAccess: false Instruction: v_cmp_nlt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlt_f32: ImplicitAccess: false Instruction: v_cmp_nlt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_nlt_f64: ImplicitAccess: false Instruction: v_cmp_nlt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_o_f16: ImplicitAccess: false Instruction: v_cmp_o_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_o_f32: ImplicitAccess: false Instruction: v_cmp_o_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_o_f64: ImplicitAccess: false Instruction: v_cmp_o_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_u_f16: ImplicitAccess: false Instruction: v_cmp_u_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_u_f32: ImplicitAccess: false Instruction: v_cmp_u_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmp_u_f64: ImplicitAccess: false Instruction: v_cmp_u_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_class_f16: ImplicitAccess: false Instruction: v_cmpx_class_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_class_f32: ImplicitAccess: false Instruction: v_cmpx_class_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_class_f64: ImplicitAccess: false Instruction: v_cmpx_class_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_f16: ImplicitAccess: false Instruction: v_cmpx_eq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_f32: ImplicitAccess: false Instruction: v_cmpx_eq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_f64: ImplicitAccess: false Instruction: v_cmpx_eq_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_i16: ImplicitAccess: false Instruction: v_cmpx_eq_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_i32: ImplicitAccess: false Instruction: v_cmpx_eq_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_i64: ImplicitAccess: false Instruction: v_cmpx_eq_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_u16: ImplicitAccess: false Instruction: v_cmpx_eq_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_u32: ImplicitAccess: false Instruction: v_cmpx_eq_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_eq_u64: ImplicitAccess: false Instruction: v_cmpx_eq_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_f16: ImplicitAccess: false Instruction: v_cmpx_ge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_f32: ImplicitAccess: false Instruction: v_cmpx_ge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_f64: ImplicitAccess: false Instruction: v_cmpx_ge_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_i16: ImplicitAccess: false Instruction: v_cmpx_ge_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_i32: ImplicitAccess: false Instruction: v_cmpx_ge_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_i64: ImplicitAccess: false Instruction: v_cmpx_ge_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_u16: ImplicitAccess: false Instruction: v_cmpx_ge_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_u32: ImplicitAccess: false Instruction: v_cmpx_ge_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ge_u64: ImplicitAccess: false Instruction: v_cmpx_ge_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_f16: ImplicitAccess: false Instruction: v_cmpx_gt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_f32: ImplicitAccess: false Instruction: v_cmpx_gt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_f64: ImplicitAccess: false Instruction: v_cmpx_gt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_i16: ImplicitAccess: false Instruction: v_cmpx_gt_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_i32: ImplicitAccess: false Instruction: v_cmpx_gt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_i64: ImplicitAccess: false Instruction: v_cmpx_gt_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_u16: ImplicitAccess: false Instruction: v_cmpx_gt_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_u32: ImplicitAccess: false Instruction: v_cmpx_gt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_gt_u64: ImplicitAccess: false Instruction: v_cmpx_gt_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_f16: ImplicitAccess: false Instruction: v_cmpx_le_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_f32: ImplicitAccess: false Instruction: v_cmpx_le_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_f64: ImplicitAccess: false Instruction: v_cmpx_le_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_i16: ImplicitAccess: false Instruction: v_cmpx_le_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_i32: ImplicitAccess: false Instruction: v_cmpx_le_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_i64: ImplicitAccess: false Instruction: v_cmpx_le_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_u16: ImplicitAccess: false Instruction: v_cmpx_le_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_u32: ImplicitAccess: false Instruction: v_cmpx_le_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_le_u64: ImplicitAccess: false Instruction: v_cmpx_le_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lg_f16: ImplicitAccess: false Instruction: v_cmpx_lg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lg_f32: ImplicitAccess: false Instruction: v_cmpx_lg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lg_f64: ImplicitAccess: false Instruction: v_cmpx_lg_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_f16: ImplicitAccess: false Instruction: v_cmpx_lt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_f32: ImplicitAccess: false Instruction: v_cmpx_lt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_f64: ImplicitAccess: false Instruction: v_cmpx_lt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_i16: ImplicitAccess: false Instruction: v_cmpx_lt_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_i32: ImplicitAccess: false Instruction: v_cmpx_lt_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_i64: ImplicitAccess: false Instruction: v_cmpx_lt_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_u16: ImplicitAccess: false Instruction: v_cmpx_lt_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_u32: ImplicitAccess: false Instruction: v_cmpx_lt_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_lt_u64: ImplicitAccess: false Instruction: v_cmpx_lt_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_i16: ImplicitAccess: false Instruction: v_cmpx_ne_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_i32: ImplicitAccess: false Instruction: v_cmpx_ne_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_i64: ImplicitAccess: false Instruction: v_cmpx_ne_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_u16: ImplicitAccess: false Instruction: v_cmpx_ne_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_u32: ImplicitAccess: false Instruction: v_cmpx_ne_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ne_u64: ImplicitAccess: false Instruction: v_cmpx_ne_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_neq_f16: ImplicitAccess: false Instruction: v_cmpx_neq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_neq_f32: ImplicitAccess: false Instruction: v_cmpx_neq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_neq_f64: ImplicitAccess: false Instruction: v_cmpx_neq_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nge_f16: ImplicitAccess: false Instruction: v_cmpx_nge_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nge_f32: ImplicitAccess: false Instruction: v_cmpx_nge_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nge_f64: ImplicitAccess: false Instruction: v_cmpx_nge_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ngt_f16: ImplicitAccess: false Instruction: v_cmpx_ngt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ngt_f32: ImplicitAccess: false Instruction: v_cmpx_ngt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_ngt_f64: ImplicitAccess: false Instruction: v_cmpx_ngt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nle_f16: ImplicitAccess: false Instruction: v_cmpx_nle_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nle_f32: ImplicitAccess: false Instruction: v_cmpx_nle_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nle_f64: ImplicitAccess: false Instruction: v_cmpx_nle_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlg_f16: ImplicitAccess: false Instruction: v_cmpx_nlg_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlg_f32: ImplicitAccess: false Instruction: v_cmpx_nlg_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlg_f64: ImplicitAccess: false Instruction: v_cmpx_nlg_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlt_f16: ImplicitAccess: false Instruction: v_cmpx_nlt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlt_f32: ImplicitAccess: false Instruction: v_cmpx_nlt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_nlt_f64: ImplicitAccess: false Instruction: v_cmpx_nlt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_o_f16: ImplicitAccess: false Instruction: v_cmpx_o_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_o_f32: ImplicitAccess: false Instruction: v_cmpx_o_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_o_f64: ImplicitAccess: false Instruction: v_cmpx_o_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_u_f16: ImplicitAccess: false Instruction: v_cmpx_u_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_u_f32: ImplicitAccess: false Instruction: v_cmpx_u_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cmpx_u_f64: ImplicitAccess: false Instruction: v_cmpx_u_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cndmask_b16: ImplicitAccess: false Instruction: v_cndmask_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cndmask_b32: ImplicitAccess: false Instruction: v_cndmask_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cos_bf16: ImplicitAccess: false Instruction: v_cos_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cos_f16: ImplicitAccess: false Instruction: v_cos_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cos_f32: ImplicitAccess: false Instruction: v_cos_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ctz_i32_b32: ImplicitAccess: false Instruction: v_ctz_i32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cubeid_f32: ImplicitAccess: false Instruction: v_cubeid_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cubema_f32: ImplicitAccess: false Instruction: v_cubema_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cubesc_f32: ImplicitAccess: false Instruction: v_cubesc_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cubetc_f32: ImplicitAccess: false Instruction: v_cubetc_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f16_bf8: ImplicitAccess: false Instruction: v_cvt_f16_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f16_f32: ImplicitAccess: false Instruction: v_cvt_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f16_fp8: ImplicitAccess: false Instruction: v_cvt_f16_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f16_i16: ImplicitAccess: false Instruction: v_cvt_f16_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f16_u16: ImplicitAccess: false Instruction: v_cvt_f16_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_bf16: ImplicitAccess: false Instruction: v_cvt_f32_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_bf8: ImplicitAccess: false Instruction: v_cvt_f32_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_f16: ImplicitAccess: false Instruction: v_cvt_f32_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_f64: ImplicitAccess: false Instruction: v_cvt_f32_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_fp8: ImplicitAccess: false Instruction: v_cvt_f32_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_i32: ImplicitAccess: false Instruction: v_cvt_f32_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_u32: ImplicitAccess: false Instruction: v_cvt_f32_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_ubyte0: ImplicitAccess: false Instruction: v_cvt_f32_ubyte0 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_ubyte1: ImplicitAccess: false Instruction: v_cvt_f32_ubyte1 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_ubyte2: ImplicitAccess: false Instruction: v_cvt_f32_ubyte2 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f32_ubyte3: ImplicitAccess: false Instruction: v_cvt_f32_ubyte3 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f64_f32: ImplicitAccess: false Instruction: v_cvt_f64_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f64_i32: ImplicitAccess: false Instruction: v_cvt_f64_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_f64_u32: ImplicitAccess: false Instruction: v_cvt_f64_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_floor_i32_f32: ImplicitAccess: false Instruction: v_cvt_floor_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_flr_i32_f32: ImplicitAccess: false Instruction: v_cvt_flr_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_i16_f16: ImplicitAccess: false Instruction: v_cvt_i16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_i32_f32: ImplicitAccess: false Instruction: v_cvt_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_i32_f64: ImplicitAccess: false Instruction: v_cvt_i32_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_i32_i16: ImplicitAccess: false Instruction: v_cvt_i32_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_nearest_i32_f32: ImplicitAccess: false Instruction: v_cvt_nearest_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_norm_i16_f16: ImplicitAccess: false Instruction: v_cvt_norm_i16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_norm_u16_f16: ImplicitAccess: false Instruction: v_cvt_norm_u16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_off_f32_i4: ImplicitAccess: false Instruction: v_cvt_off_f32_i4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_bf16_f32: ImplicitAccess: false Instruction: v_cvt_pk_bf16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_bf8_f16: ImplicitAccess: false Instruction: v_cvt_pk_bf8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_bf8_f32: ImplicitAccess: false Instruction: v_cvt_pk_bf8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_f16_bf8: ImplicitAccess: false Instruction: v_cvt_pk_f16_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_f16_f32: ImplicitAccess: false Instruction: v_cvt_pk_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_f16_fp8: ImplicitAccess: false Instruction: v_cvt_pk_f16_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_f32_bf8: ImplicitAccess: false Instruction: v_cvt_pk_f32_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_f32_fp8: ImplicitAccess: false Instruction: v_cvt_pk_f32_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_fp8_f16: ImplicitAccess: false Instruction: v_cvt_pk_fp8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_fp8_f32: ImplicitAccess: false Instruction: v_cvt_pk_fp8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_i16_f32: ImplicitAccess: false Instruction: v_cvt_pk_i16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_i16_i32: ImplicitAccess: false Instruction: v_cvt_pk_i16_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_norm_i16_f16: ImplicitAccess: false Instruction: v_cvt_pk_norm_i16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_norm_i16_f32: ImplicitAccess: false Instruction: v_cvt_pk_norm_i16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_norm_u16_f16: ImplicitAccess: false Instruction: v_cvt_pk_norm_u16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_norm_u16_f32: ImplicitAccess: false Instruction: v_cvt_pk_norm_u16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_rtz_f16_f32: ImplicitAccess: false Instruction: v_cvt_pk_rtz_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_u16_f32: ImplicitAccess: false Instruction: v_cvt_pk_u16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_u16_u32: ImplicitAccess: false Instruction: v_cvt_pk_u16_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pk_u8_f32: ImplicitAccess: false Instruction: v_cvt_pk_u8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pknorm_i16_f16: ImplicitAccess: false Instruction: v_cvt_pknorm_i16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pknorm_i16_f32: ImplicitAccess: false Instruction: v_cvt_pknorm_i16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pknorm_u16_f16: ImplicitAccess: false Instruction: v_cvt_pknorm_u16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pknorm_u16_f32: ImplicitAccess: false Instruction: v_cvt_pknorm_u16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_pkrtz_f16_f32: ImplicitAccess: false Instruction: v_cvt_pkrtz_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_rpi_i32_f32: ImplicitAccess: false Instruction: v_cvt_rpi_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_bf16_bf6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_bf16_bf6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_bf16_fp6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_bf16_fp6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_f16_bf6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_f16_bf6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_f16_fp6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_f16_fp6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_f32_bf6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_f32_bf6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk16_f32_fp6: ImplicitAccess: false Instruction: v_cvt_scale_pk16_f32_fp6 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_bf16_bf8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_bf16_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_bf16_fp4: ImplicitAccess: false Instruction: v_cvt_scale_pk8_bf16_fp4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_bf16_fp8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_bf16_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f16_bf8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f16_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f16_fp4: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f16_fp4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f16_fp8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f16_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f32_bf8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f32_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f32_fp4: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f32_fp4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scale_pk8_f32_fp8: ImplicitAccess: false Instruction: v_cvt_scale_pk8_f32_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_bf6_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_bf6_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_bf6_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_bf6_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_bf6_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_bf6_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_fp6_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_fp6_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_fp6_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_fp6_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk16_fp6_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_pk16_fp6_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_bf8_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_bf8_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_bf8_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_bf8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_bf8_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_bf8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp4_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp4_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp4_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp4_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp4_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp4_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp8_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp8_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp8_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_pk8_fp8_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_pk8_fp8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_bf6_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_bf6_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_bf6_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_bf6_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_bf6_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_bf6_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_fp6_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_fp6_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_fp6_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_fp6_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk16_fp6_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk16_fp6_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_bf8_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_bf8_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_bf8_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_bf8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_bf8_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_bf8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp4_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp4_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp4_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp4_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp4_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp4_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp8_bf16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp8_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp8_f16: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_scalef32_sr_pk8_fp8_f32: ImplicitAccess: false Instruction: v_cvt_scalef32_sr_pk8_fp8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_bf8_f16: ImplicitAccess: false Instruction: v_cvt_sr_bf8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_bf8_f32: ImplicitAccess: false Instruction: v_cvt_sr_bf8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_fp8_f16: ImplicitAccess: false Instruction: v_cvt_sr_fp8_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_fp8_f32: ImplicitAccess: false Instruction: v_cvt_sr_fp8_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_pk_bf16_f32: ImplicitAccess: false Instruction: v_cvt_sr_pk_bf16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_sr_pk_f16_f32: ImplicitAccess: false Instruction: v_cvt_sr_pk_f16_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_u16_f16: ImplicitAccess: false Instruction: v_cvt_u16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_u32_f32: ImplicitAccess: false Instruction: v_cvt_u32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_u32_f64: ImplicitAccess: false Instruction: v_cvt_u32_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_cvt_u32_u16: ImplicitAccess: false Instruction: v_cvt_u32_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_fixup_f16: ImplicitAccess: false Instruction: v_div_fixup_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_fixup_f32: ImplicitAccess: false Instruction: v_div_fixup_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_fixup_f64: ImplicitAccess: false Instruction: v_div_fixup_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_fmas_f32: ImplicitAccess: false Instruction: v_div_fmas_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_fmas_f64: ImplicitAccess: false Instruction: v_div_fmas_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_scale_f32: ImplicitAccess: false Instruction: v_div_scale_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_div_scale_f64: ImplicitAccess: false Instruction: v_div_scale_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot4_i32_i8: ImplicitAccess: false Instruction: v_dot4_i32_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot4_i32_iu8: ImplicitAccess: false Instruction: v_dot4_i32_iu8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot4_u32_u8: ImplicitAccess: false Instruction: v_dot4_u32_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot8_i32_i4: ImplicitAccess: false Instruction: v_dot8_i32_i4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot8_i32_iu4: ImplicitAccess: false Instruction: v_dot8_i32_iu4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dot8_u32_u4: ImplicitAccess: false Instruction: v_dot8_u32_u4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_add_f32: ImplicitAccess: false Instruction: v_dual_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_add_f64: ImplicitAccess: false Instruction: v_dual_add_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_add_nc_u32: ImplicitAccess: false Instruction: v_dual_add_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_ashrrev_i32: ImplicitAccess: false Instruction: v_dual_ashrrev_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_bitop2_b32: ImplicitAccess: false Instruction: v_dual_bitop2_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_cndmask_b32: ImplicitAccess: false Instruction: v_dual_cndmask_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_fma_f32: ImplicitAccess: false Instruction: v_dual_fma_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_fma_f64: ImplicitAccess: false Instruction: v_dual_fma_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_fmaak_f32: ImplicitAccess: false Instruction: v_dual_fmaak_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_fmac_f32: ImplicitAccess: false Instruction: v_dual_fmac_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_fmamk_f32: ImplicitAccess: false Instruction: v_dual_fmamk_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_lshlrev_b32: ImplicitAccess: false Instruction: v_dual_lshlrev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_lshrrev_b32: ImplicitAccess: false Instruction: v_dual_lshrrev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_max_i32: ImplicitAccess: false Instruction: v_dual_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_max_num_f32: ImplicitAccess: false Instruction: v_dual_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_max_num_f64: ImplicitAccess: false Instruction: v_dual_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_min_i32: ImplicitAccess: false Instruction: v_dual_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_min_num_f32: ImplicitAccess: false Instruction: v_dual_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_min_num_f64: ImplicitAccess: false Instruction: v_dual_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_mov_b32: ImplicitAccess: false Instruction: v_dual_mov_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_mul_dx9_zero_f32: ImplicitAccess: false Instruction: v_dual_mul_dx9_zero_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_mul_f32: ImplicitAccess: false Instruction: v_dual_mul_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_mul_f64: ImplicitAccess: false Instruction: v_dual_mul_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_sub_f32: ImplicitAccess: false Instruction: v_dual_sub_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_sub_nc_u32: ImplicitAccess: false Instruction: v_dual_sub_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_dual_subrev_f32: ImplicitAccess: false Instruction: v_dual_subrev_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_exp_bf16: ImplicitAccess: false Instruction: v_exp_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_exp_f16: ImplicitAccess: false Instruction: v_exp_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_exp_f32: ImplicitAccess: false Instruction: v_exp_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ffbh_i32: ImplicitAccess: false Instruction: v_ffbh_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ffbh_u32: ImplicitAccess: false Instruction: v_ffbh_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ffbl_b32: ImplicitAccess: false Instruction: v_ffbl_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_floor_f16: ImplicitAccess: false Instruction: v_floor_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_floor_f32: ImplicitAccess: false Instruction: v_floor_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_floor_f64: ImplicitAccess: false Instruction: v_floor_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_dx9_zero_f32: ImplicitAccess: false Instruction: v_fma_dx9_zero_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_f16: ImplicitAccess: false Instruction: v_fma_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_f32: ImplicitAccess: false Instruction: v_fma_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_f64: ImplicitAccess: false Instruction: v_fma_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_legacy_f32: ImplicitAccess: false Instruction: v_fma_legacy_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mix_f32: ImplicitAccess: false Instruction: v_fma_mix_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mix_f32_bf16: ImplicitAccess: false Instruction: v_fma_mix_f32_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mix_f32_f16: ImplicitAccess: false Instruction: v_fma_mix_f32_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mixhi_bf16: ImplicitAccess: false Instruction: v_fma_mixhi_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mixhi_f16: ImplicitAccess: false Instruction: v_fma_mixhi_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mixlo_bf16: ImplicitAccess: false Instruction: v_fma_mixlo_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fma_mixlo_f16: ImplicitAccess: false Instruction: v_fma_mixlo_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmaak_f16: ImplicitAccess: false Instruction: v_fmaak_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmaak_f32: ImplicitAccess: false Instruction: v_fmaak_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmaak_f64: ImplicitAccess: false Instruction: v_fmaak_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmac_f16: ImplicitAccess: false Instruction: v_fmac_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmac_f32: ImplicitAccess: false Instruction: v_fmac_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmac_f64: ImplicitAccess: false Instruction: v_fmac_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmamk_f16: ImplicitAccess: false Instruction: v_fmamk_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmamk_f32: ImplicitAccess: false Instruction: v_fmamk_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fmamk_f64: ImplicitAccess: false Instruction: v_fmamk_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fract_f16: ImplicitAccess: false Instruction: v_fract_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fract_f32: ImplicitAccess: false Instruction: v_fract_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_fract_f64: ImplicitAccess: false Instruction: v_fract_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_exp_i16_f16: ImplicitAccess: false Instruction: v_frexp_exp_i16_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_exp_i32_f32: ImplicitAccess: false Instruction: v_frexp_exp_i32_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_exp_i32_f64: ImplicitAccess: false Instruction: v_frexp_exp_i32_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_mant_f16: ImplicitAccess: false Instruction: v_frexp_mant_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_mant_f32: ImplicitAccess: false Instruction: v_frexp_mant_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_frexp_mant_f64: ImplicitAccess: false Instruction: v_frexp_mant_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ldexp_f16: ImplicitAccess: false Instruction: v_ldexp_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ldexp_f32: ImplicitAccess: false Instruction: v_ldexp_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_ldexp_f64: ImplicitAccess: false Instruction: v_ldexp_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lerp_u8: ImplicitAccess: false Instruction: v_lerp_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_log_bf16: ImplicitAccess: false Instruction: v_log_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_log_f16: ImplicitAccess: false Instruction: v_log_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_log_f32: ImplicitAccess: false Instruction: v_log_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshl_add_u32: ImplicitAccess: false Instruction: v_lshl_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshl_add_u64: ImplicitAccess: false Instruction: v_lshl_add_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshl_or_b32: ImplicitAccess: false Instruction: v_lshl_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshlrev_b16: ImplicitAccess: false Instruction: v_lshlrev_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshlrev_b32: ImplicitAccess: false Instruction: v_lshlrev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshlrev_b64: ImplicitAccess: false Instruction: v_lshlrev_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshrrev_b16: ImplicitAccess: false Instruction: v_lshrrev_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshrrev_b32: ImplicitAccess: false Instruction: v_lshrrev_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_lshrrev_b64: ImplicitAccess: false Instruction: v_lshrrev_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_co_i64_i32: ImplicitAccess: false Instruction: v_mad_co_i64_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_co_u64_u32: ImplicitAccess: false Instruction: v_mad_co_u64_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_i16: ImplicitAccess: false Instruction: v_mad_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_i32_i16: ImplicitAccess: false Instruction: v_mad_i32_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_i32_i24: ImplicitAccess: false Instruction: v_mad_i32_i24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_i64_i32: ImplicitAccess: false Instruction: v_mad_i64_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_nc_i64_i32: ImplicitAccess: false Instruction: v_mad_nc_i64_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_nc_u64_u32: ImplicitAccess: false Instruction: v_mad_nc_u64_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_u16: ImplicitAccess: false Instruction: v_mad_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_u32: ImplicitAccess: false Instruction: v_mad_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_u32_u16: ImplicitAccess: false Instruction: v_mad_u32_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_u32_u24: ImplicitAccess: false Instruction: v_mad_u32_u24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mad_u64_u32: ImplicitAccess: false Instruction: v_mad_u64_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_f16: ImplicitAccess: false Instruction: v_max3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_f32: ImplicitAccess: false Instruction: v_max3_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_i16: ImplicitAccess: false Instruction: v_max3_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_i32: ImplicitAccess: false Instruction: v_max3_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_num_f16: ImplicitAccess: false Instruction: v_max3_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_num_f32: ImplicitAccess: false Instruction: v_max3_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_u16: ImplicitAccess: false Instruction: v_max3_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max3_u32: ImplicitAccess: false Instruction: v_max3_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_f16: ImplicitAccess: false Instruction: v_max_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_f32: ImplicitAccess: false Instruction: v_max_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_f64: ImplicitAccess: false Instruction: v_max_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_i16: ImplicitAccess: false Instruction: v_max_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_i32: ImplicitAccess: false Instruction: v_max_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_i64: ImplicitAccess: false Instruction: v_max_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_num_f16: ImplicitAccess: false Instruction: v_max_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_num_f32: ImplicitAccess: false Instruction: v_max_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_num_f64: ImplicitAccess: false Instruction: v_max_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_u16: ImplicitAccess: false Instruction: v_max_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_u32: ImplicitAccess: false Instruction: v_max_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_max_u64: ImplicitAccess: false Instruction: v_max_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximum3_f16: ImplicitAccess: false Instruction: v_maximum3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximum3_f32: ImplicitAccess: false Instruction: v_maximum3_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximum_f16: ImplicitAccess: false Instruction: v_maximum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximum_f32: ImplicitAccess: false Instruction: v_maximum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximum_f64: ImplicitAccess: false Instruction: v_maximum_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximumminimum_f16: ImplicitAccess: false Instruction: v_maximumminimum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maximumminimum_f32: ImplicitAccess: false Instruction: v_maximumminimum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_f16: ImplicitAccess: false Instruction: v_maxmin_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_f32: ImplicitAccess: false Instruction: v_maxmin_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_i32: ImplicitAccess: false Instruction: v_maxmin_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_num_f16: ImplicitAccess: false Instruction: v_maxmin_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_num_f32: ImplicitAccess: false Instruction: v_maxmin_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_maxmin_u32: ImplicitAccess: false Instruction: v_maxmin_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mbcnt_hi_u32_b32: ImplicitAccess: false Instruction: v_mbcnt_hi_u32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mbcnt_lo_u32_b32: ImplicitAccess: false Instruction: v_mbcnt_lo_u32_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_f16: ImplicitAccess: false Instruction: v_med3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_f32: ImplicitAccess: false Instruction: v_med3_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_i16: ImplicitAccess: false Instruction: v_med3_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_i32: ImplicitAccess: false Instruction: v_med3_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_num_f16: ImplicitAccess: false Instruction: v_med3_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_num_f32: ImplicitAccess: false Instruction: v_med3_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_u16: ImplicitAccess: false Instruction: v_med3_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_med3_u32: ImplicitAccess: false Instruction: v_med3_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_f16: ImplicitAccess: false Instruction: v_min3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_f32: ImplicitAccess: false Instruction: v_min3_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_i16: ImplicitAccess: false Instruction: v_min3_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_i32: ImplicitAccess: false Instruction: v_min3_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_num_f16: ImplicitAccess: false Instruction: v_min3_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_num_f32: ImplicitAccess: false Instruction: v_min3_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_u16: ImplicitAccess: false Instruction: v_min3_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min3_u32: ImplicitAccess: false Instruction: v_min3_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_f16: ImplicitAccess: false Instruction: v_min_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_f32: ImplicitAccess: false Instruction: v_min_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_f64: ImplicitAccess: false Instruction: v_min_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_i16: ImplicitAccess: false Instruction: v_min_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_i32: ImplicitAccess: false Instruction: v_min_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_i64: ImplicitAccess: false Instruction: v_min_i64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_num_f16: ImplicitAccess: false Instruction: v_min_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_num_f32: ImplicitAccess: false Instruction: v_min_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_num_f64: ImplicitAccess: false Instruction: v_min_num_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_u16: ImplicitAccess: false Instruction: v_min_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_u32: ImplicitAccess: false Instruction: v_min_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_min_u64: ImplicitAccess: false Instruction: v_min_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimum3_f16: ImplicitAccess: false Instruction: v_minimum3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimum3_f32: ImplicitAccess: false Instruction: v_minimum3_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimum_f16: ImplicitAccess: false Instruction: v_minimum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimum_f32: ImplicitAccess: false Instruction: v_minimum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimum_f64: ImplicitAccess: false Instruction: v_minimum_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimummaximum_f16: ImplicitAccess: false Instruction: v_minimummaximum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minimummaximum_f32: ImplicitAccess: false Instruction: v_minimummaximum_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_f16: ImplicitAccess: false Instruction: v_minmax_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_f32: ImplicitAccess: false Instruction: v_minmax_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_i32: ImplicitAccess: false Instruction: v_minmax_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_num_f16: ImplicitAccess: false Instruction: v_minmax_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_num_f32: ImplicitAccess: false Instruction: v_minmax_num_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_minmax_u32: ImplicitAccess: false Instruction: v_minmax_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mov_b16: ImplicitAccess: false Instruction: v_mov_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mov_b32: ImplicitAccess: false Instruction: v_mov_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mov_b64: ImplicitAccess: false Instruction: v_mov_b64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_movreld_b32: ImplicitAccess: false Instruction: v_movreld_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_movrels_b32: ImplicitAccess: false Instruction: v_movrels_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_movrelsd_2_b32: ImplicitAccess: false Instruction: v_movrelsd_2_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_movrelsd_b32: ImplicitAccess: false Instruction: v_movrelsd_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mqsad_pk_u16_u8: ImplicitAccess: false Instruction: v_mqsad_pk_u16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mqsad_u32_u8: ImplicitAccess: false Instruction: v_mqsad_u32_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_msad_u8: ImplicitAccess: false Instruction: v_msad_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_dx9_zero_f32: ImplicitAccess: false Instruction: v_mul_dx9_zero_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_f16: ImplicitAccess: false Instruction: v_mul_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_f32: ImplicitAccess: false Instruction: v_mul_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_f64: ImplicitAccess: false Instruction: v_mul_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_hi_i32: ImplicitAccess: false Instruction: v_mul_hi_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_hi_i32_i24: ImplicitAccess: false Instruction: v_mul_hi_i32_i24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_hi_u32: ImplicitAccess: false Instruction: v_mul_hi_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_hi_u32_u24: ImplicitAccess: false Instruction: v_mul_hi_u32_u24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_i32_i24: ImplicitAccess: false Instruction: v_mul_i32_i24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_legacy_f32: ImplicitAccess: false Instruction: v_mul_legacy_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_lo_u16: ImplicitAccess: false Instruction: v_mul_lo_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_lo_u32: ImplicitAccess: false Instruction: v_mul_lo_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_u32_u24: ImplicitAccess: false Instruction: v_mul_u32_u24 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mul_u64: ImplicitAccess: false Instruction: v_mul_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_mullit_f32: ImplicitAccess: false Instruction: v_mullit_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_nop: ImplicitAccess: false Instruction: v_nop IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_not_b16: ImplicitAccess: false Instruction: v_not_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_not_b32: ImplicitAccess: false Instruction: v_not_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_or3_b32: ImplicitAccess: false Instruction: v_or3_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_or_b16: ImplicitAccess: false Instruction: v_or_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_or_b32: ImplicitAccess: false Instruction: v_or_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pack_b32_f16: ImplicitAccess: false Instruction: v_pack_b32_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_perm_b32: ImplicitAccess: false Instruction: v_perm_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_perm_pk16_b4_u4: ImplicitAccess: false Instruction: v_perm_pk16_b4_u4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_perm_pk16_b6_u4: ImplicitAccess: false Instruction: v_perm_pk16_b6_u4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_perm_pk16_b8_u4: ImplicitAccess: false Instruction: v_perm_pk16_b8_u4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane16_b32: ImplicitAccess: false Instruction: v_permlane16_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane16_swap_b32: ImplicitAccess: false Instruction: v_permlane16_swap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane16_var_b32: ImplicitAccess: false Instruction: v_permlane16_var_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane64_b32: ImplicitAccess: false Instruction: v_permlane64_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane_bcast_b32: ImplicitAccess: false Instruction: v_permlane_bcast_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane_down_b32: ImplicitAccess: false Instruction: v_permlane_down_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane_idx_gen_b32: ImplicitAccess: false Instruction: v_permlane_idx_gen_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane_up_b32: ImplicitAccess: false Instruction: v_permlane_up_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlane_xor_b32: ImplicitAccess: false Instruction: v_permlane_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlanex16_b32: ImplicitAccess: false Instruction: v_permlanex16_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_permlanex16_var_b32: ImplicitAccess: false Instruction: v_permlanex16_var_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pipeflush: ImplicitAccess: false Instruction: v_pipeflush IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_bf16: ImplicitAccess: false Instruction: v_pk_add_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_f16: ImplicitAccess: false Instruction: v_pk_add_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_f32: ImplicitAccess: false Instruction: v_pk_add_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_i16: ImplicitAccess: false Instruction: v_pk_add_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_max_i16: ImplicitAccess: false Instruction: v_pk_add_max_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_max_u16: ImplicitAccess: false Instruction: v_pk_add_max_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_min_i16: ImplicitAccess: false Instruction: v_pk_add_min_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_min_u16: ImplicitAccess: false Instruction: v_pk_add_min_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_add_u16: ImplicitAccess: false Instruction: v_pk_add_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_ashrrev_i16: ImplicitAccess: false Instruction: v_pk_ashrrev_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_fma_bf16: ImplicitAccess: false Instruction: v_pk_fma_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_fma_f16: ImplicitAccess: false Instruction: v_pk_fma_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_fma_f32: ImplicitAccess: false Instruction: v_pk_fma_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_fmac_f16: ImplicitAccess: false Instruction: v_pk_fmac_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_lshlrev_b16: ImplicitAccess: false Instruction: v_pk_lshlrev_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_lshrrev_b16: ImplicitAccess: false Instruction: v_pk_lshrrev_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mad_i16: ImplicitAccess: false Instruction: v_pk_mad_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mad_u16: ImplicitAccess: false Instruction: v_pk_mad_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max3_i16: ImplicitAccess: false Instruction: v_pk_max3_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max3_num_f16: ImplicitAccess: false Instruction: v_pk_max3_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max3_u16: ImplicitAccess: false Instruction: v_pk_max3_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max_f16: ImplicitAccess: false Instruction: v_pk_max_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max_i16: ImplicitAccess: false Instruction: v_pk_max_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max_num_bf16: ImplicitAccess: false Instruction: v_pk_max_num_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max_num_f16: ImplicitAccess: false Instruction: v_pk_max_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_max_u16: ImplicitAccess: false Instruction: v_pk_max_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_maximum3_f16: ImplicitAccess: false Instruction: v_pk_maximum3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_maximum_f16: ImplicitAccess: false Instruction: v_pk_maximum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min3_i16: ImplicitAccess: false Instruction: v_pk_min3_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min3_num_f16: ImplicitAccess: false Instruction: v_pk_min3_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min3_u16: ImplicitAccess: false Instruction: v_pk_min3_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min_f16: ImplicitAccess: false Instruction: v_pk_min_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min_i16: ImplicitAccess: false Instruction: v_pk_min_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min_num_bf16: ImplicitAccess: false Instruction: v_pk_min_num_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min_num_f16: ImplicitAccess: false Instruction: v_pk_min_num_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_min_u16: ImplicitAccess: false Instruction: v_pk_min_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_minimum3_f16: ImplicitAccess: false Instruction: v_pk_minimum3_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_minimum_f16: ImplicitAccess: false Instruction: v_pk_minimum_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mul_bf16: ImplicitAccess: false Instruction: v_pk_mul_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mul_f16: ImplicitAccess: false Instruction: v_pk_mul_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mul_f32: ImplicitAccess: false Instruction: v_pk_mul_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_mul_lo_u16: ImplicitAccess: false Instruction: v_pk_mul_lo_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_sub_i16: ImplicitAccess: false Instruction: v_pk_sub_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_pk_sub_u16: ImplicitAccess: false Instruction: v_pk_sub_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_prng_b32: ImplicitAccess: false Instruction: v_prng_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_qsad_pk_u16_u8: ImplicitAccess: false Instruction: v_qsad_pk_u16_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rcp_bf16: ImplicitAccess: false Instruction: v_rcp_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rcp_f16: ImplicitAccess: false Instruction: v_rcp_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rcp_f32: ImplicitAccess: false Instruction: v_rcp_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rcp_f64: ImplicitAccess: false Instruction: v_rcp_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rcp_iflag_f32: ImplicitAccess: false Instruction: v_rcp_iflag_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_readfirstlane_b32: ImplicitAccess: false Instruction: v_readfirstlane_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_readlane_b32: ImplicitAccess: false Instruction: v_readlane_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rndne_f16: ImplicitAccess: false Instruction: v_rndne_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rndne_f32: ImplicitAccess: false Instruction: v_rndne_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rndne_f64: ImplicitAccess: false Instruction: v_rndne_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rsq_bf16: ImplicitAccess: false Instruction: v_rsq_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rsq_f16: ImplicitAccess: false Instruction: v_rsq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rsq_f32: ImplicitAccess: false Instruction: v_rsq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_rsq_f64: ImplicitAccess: false Instruction: v_rsq_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_exp_f16: ImplicitAccess: false Instruction: v_s_exp_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_exp_f32: ImplicitAccess: false Instruction: v_s_exp_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_log_f16: ImplicitAccess: false Instruction: v_s_log_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_log_f32: ImplicitAccess: false Instruction: v_s_log_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_rcp_f16: ImplicitAccess: false Instruction: v_s_rcp_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_rcp_f32: ImplicitAccess: false Instruction: v_s_rcp_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_rsq_f16: ImplicitAccess: false Instruction: v_s_rsq_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_rsq_f32: ImplicitAccess: false Instruction: v_s_rsq_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_sqrt_f16: ImplicitAccess: false Instruction: v_s_sqrt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_s_sqrt_f32: ImplicitAccess: false Instruction: v_s_sqrt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sad_hi_u8: ImplicitAccess: false Instruction: v_sad_hi_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sad_u16: ImplicitAccess: false Instruction: v_sad_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sad_u32: ImplicitAccess: false Instruction: v_sad_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sad_u8: ImplicitAccess: false Instruction: v_sad_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sat_pk4_i4_i8: ImplicitAccess: false Instruction: v_sat_pk4_i4_i8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sat_pk4_u4_u8: ImplicitAccess: false Instruction: v_sat_pk4_u4_u8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sat_pk_u8_i16: ImplicitAccess: false Instruction: v_sat_pk_u8_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sin_bf16: ImplicitAccess: false Instruction: v_sin_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sin_f16: ImplicitAccess: false Instruction: v_sin_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sin_f32: ImplicitAccess: false Instruction: v_sin_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sqrt_bf16: ImplicitAccess: false Instruction: v_sqrt_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sqrt_f16: ImplicitAccess: false Instruction: v_sqrt_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sqrt_f32: ImplicitAccess: false Instruction: v_sqrt_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sqrt_f64: ImplicitAccess: false Instruction: v_sqrt_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_co_ci_u32: ImplicitAccess: false Instruction: v_sub_co_ci_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_co_u32: ImplicitAccess: false Instruction: v_sub_co_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_f16: ImplicitAccess: false Instruction: v_sub_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_f32: ImplicitAccess: false Instruction: v_sub_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_nc_i16: ImplicitAccess: false Instruction: v_sub_nc_i16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_nc_i32: ImplicitAccess: false Instruction: v_sub_nc_i32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_nc_u16: ImplicitAccess: false Instruction: v_sub_nc_u16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_nc_u32: ImplicitAccess: false Instruction: v_sub_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_sub_nc_u64: ImplicitAccess: false Instruction: v_sub_nc_u64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_subrev_co_ci_u32: ImplicitAccess: false Instruction: v_subrev_co_ci_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_subrev_co_u32: ImplicitAccess: false Instruction: v_subrev_co_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_subrev_f16: ImplicitAccess: false Instruction: v_subrev_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_subrev_f32: ImplicitAccess: false Instruction: v_subrev_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_subrev_nc_u32: ImplicitAccess: false Instruction: v_subrev_nc_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swap_b16: ImplicitAccess: false Instruction: v_swap_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swap_b32: ImplicitAccess: false Instruction: v_swap_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swaprel_b32: ImplicitAccess: false Instruction: v_swaprel_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_bf16_16x16x64_bf16: ImplicitAccess: false Instruction: v_swmmac_bf16_16x16x64_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_bf16f32_16x16x64_bf16: ImplicitAccess: false Instruction: v_swmmac_bf16f32_16x16x64_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f16_16x16x128_bf8_bf8: ImplicitAccess: false Instruction: v_swmmac_f16_16x16x128_bf8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f16_16x16x128_bf8_fp8: ImplicitAccess: false Instruction: v_swmmac_f16_16x16x128_bf8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f16_16x16x128_fp8_bf8: ImplicitAccess: false Instruction: v_swmmac_f16_16x16x128_fp8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f16_16x16x128_fp8_fp8: ImplicitAccess: false Instruction: v_swmmac_f16_16x16x128_fp8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f16_16x16x64_f16: ImplicitAccess: false Instruction: v_swmmac_f16_16x16x64_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x128_bf8_bf8: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x128_bf8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x128_bf8_fp8: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x128_bf8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x128_fp8_bf8: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x128_fp8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x128_fp8_fp8: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x128_fp8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x64_bf16: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x64_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_f32_16x16x64_f16: ImplicitAccess: false Instruction: v_swmmac_f32_16x16x64_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_swmmac_i32_16x16x128_iu8: ImplicitAccess: false Instruction: v_swmmac_i32_16x16x128_iu8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_tanh_bf16: ImplicitAccess: false Instruction: v_tanh_bf16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_tanh_f16: ImplicitAccess: false Instruction: v_tanh_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_tanh_f32: ImplicitAccess: false Instruction: v_tanh_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_trig_preop_f64: ImplicitAccess: false Instruction: v_trig_preop_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_trunc_f16: ImplicitAccess: false Instruction: v_trunc_f16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_trunc_f32: ImplicitAccess: false Instruction: v_trunc_f32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_trunc_f64: ImplicitAccess: false Instruction: v_trunc_f64 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_bf16_16x16x32_bf16: ImplicitAccess: false Instruction: v_wmma_bf16_16x16x32_bf16 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_bf16f32_16x16x32_bf16: ImplicitAccess: false Instruction: v_wmma_bf16f32_16x16x32_bf16 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f16_16x16x128_bf8_bf8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x128_bf8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f16_16x16x128_bf8_fp8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x128_bf8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f16_16x16x128_fp8_bf8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x128_fp8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f16_16x16x128_fp8_fp8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x128_fp8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f16_16x16x32_f16: ImplicitAccess: false Instruction: v_wmma_f16_16x16x32_f16 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f16_16x16x64_bf8_bf8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x64_bf8_bf8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f16_16x16x64_bf8_fp8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x64_bf8_fp8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f16_16x16x64_fp8_bf8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x64_fp8_bf8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f16_16x16x64_fp8_fp8: ImplicitAccess: false Instruction: v_wmma_f16_16x16x64_fp8_fp8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x128_bf8_bf8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x128_bf8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f32_16x16x128_bf8_fp8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x128_bf8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f32_16x16x128_f8f6f4: ImplicitAccess: false Instruction: v_wmma_f32_16x16x128_f8f6f4 IsBranch: false Latency: 16 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x128_fp8_bf8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x128_fp8_bf8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f32_16x16x128_fp8_fp8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x128_fp8_fp8 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_f32_16x16x32_bf16: ImplicitAccess: false Instruction: v_wmma_f32_16x16x32_bf16 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x32_f16: ImplicitAccess: false Instruction: v_wmma_f32_16x16x32_f16 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x4_f32: ImplicitAccess: false Instruction: v_wmma_f32_16x16x4_f32 IsBranch: false Latency: 16 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x64_bf8_bf8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x64_bf8_bf8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x64_bf8_fp8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x64_bf8_fp8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x64_fp8_bf8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x64_fp8_bf8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_16x16x64_fp8_fp8: ImplicitAccess: false Instruction: v_wmma_f32_16x16x64_fp8_fp8 IsBranch: false Latency: 8 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_f32_32x16x128_f4: ImplicitAccess: false Instruction: v_wmma_f32_32x16x128_f4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_i32_16x16x64_iu8: ImplicitAccess: false Instruction: v_wmma_i32_16x16x64_iu8 IsBranch: false Latency: 16 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_scale16_f32_16x16x128_f8f6f4: ImplicitAccess: false Instruction: v_wmma_scale16_f32_16x16x128_f8f6f4 IsBranch: false Latency: 16 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_scale16_f32_32x16x128_f4: ImplicitAccess: false Instruction: v_wmma_scale16_f32_32x16x128_f4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_wmma_scale_f32_16x16x128_f8f6f4: ImplicitAccess: false Instruction: v_wmma_scale_f32_16x16x128_f8f6f4 IsBranch: false Latency: 16 MaxLiteral: 0 WaitCount: 0 WaitQueues: [] v_wmma_scale_f32_32x16x128_f4: ImplicitAccess: false Instruction: v_wmma_scale_f32_32x16x128_f4 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_writelane_b32: ImplicitAccess: false Instruction: v_writelane_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xad_u32: ImplicitAccess: false Instruction: v_xad_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xnor_b32: ImplicitAccess: false Instruction: v_xnor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xor3_b32: ImplicitAccess: false Instruction: v_xor3_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xor_add_u32: ImplicitAccess: false Instruction: v_xor_add_u32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xor_b16: ImplicitAccess: false Instruction: v_xor_b16 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: [] v_xor_b32: ImplicitAccess: false Instruction: v_xor_b32 IsBranch: false Latency: 0 MaxLiteral: 0 WaitCount: -1 WaitQueues: []