# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64  -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

---
name: shuffle_vector_undef_rhs
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $d0

    ; CHECK-LABEL: name: shuffle_vector_undef_rhs
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[DEF]], shufflemask(0, undef, 1, undef)
    ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
    %0:_(<2 x s32>) = COPY $d0
    %1:_(<2 x s32>) = G_IMPLICIT_DEF
    %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(0, 2, 1, 3)
    RET_ReallyLR implicit %2
...