; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p3 -enable-subreg-liveness -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2p3 -force-streaming -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme,+sve2p3 -force-streaming -verify-machineinstrs < %s | FileCheck %s

define <vscale x 16 x i8> @test_svqrshrn_n_s8_s16_x2(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm) {
; CHECK-LABEL: test_svqrshrn_n_s8_s16_x2:
; CHECK:       // %bb.0:
; CHECK-NEXT:    sqrshrn z0.b, { z0.h, z1.h }, #8
; CHECK-NEXT:    ret
  %res = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrn.x2.nxv8i16(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm, i32 8)
  ret <vscale x 16 x i8> %res
}

define <vscale x 16 x i8> @test_svqrshrn_n_u8_u16_x2(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm) {
; CHECK-LABEL: test_svqrshrn_n_u8_u16_x2:
; CHECK:       // %bb.0:
; CHECK-NEXT:    uqrshrn z0.b, { z0.h, z1.h }, #8
; CHECK-NEXT:    ret
  %res = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshrn.x2.nxv8i16(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm, i32 8)
  ret <vscale x 16 x i8> %res
}

define <vscale x 16 x i8> @test_svqrshrun_n_u8_s16_x2(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm) {
; CHECK-LABEL: test_svqrshrun_n_u8_s16_x2:
; CHECK:       // %bb.0:
; CHECK-NEXT:    sqrshrun z0.b, { z0.h, z1.h }, #8
; CHECK-NEXT:    ret
  %res = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshrun.x2.nxv8i16(<vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm, i32 8)
  ret <vscale x 16 x i8> %res
}