# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -run-pass=instruction-select -verify-machineinstrs -mtriple aarch64 %s -o - | FileCheck %s

# Crash reproducer from: https://github.com/llvm/llvm-project/issues/166563

---
name:            pr166563
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: pr166563
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.2(0x30000000), %bb.1(0x50000000)
  ; CHECK-NEXT:   liveins: $w0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr32 = COPY $w0
  ; CHECK-NEXT:   [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 457873110
  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG [[MOVi32imm]], %subreg.sub_32
  ; CHECK-NEXT:   [[MOVi32imm1:%[0-9]+]]:gpr32 = MOVi32imm 1
  ; CHECK-NEXT:   TBNZW [[MOVi32imm1]], 0, %bb.2
  ; CHECK-NEXT:   B %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   B %bb.6
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   TBZW [[COPY]], 0, %bb.4
  ; CHECK-NEXT:   B %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 2, 0, implicit-def dead $nzcv
  ; CHECK-NEXT:   B %bb.5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
  ; CHECK-NEXT:   [[ANDXrr:%[0-9]+]]:gpr64 = ANDXrr [[COPY1]], [[SUBREG_TO_REG]]
  ; CHECK-NEXT:   $x0 = COPY [[ANDXrr]]
  ; CHECK-NEXT:   RET_ReallyLR implicit $x0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gpr64sp = PHI [[SUBSXri]], %bb.3, %14, %bb.5
  ; CHECK-NEXT:   [[SUBSXri1:%[0-9]+]]:gpr64 = SUBSXri [[PHI]], 1, 0, implicit-def dead $nzcv
  ; CHECK-NEXT:   B %bb.5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.6:
  ; CHECK-NEXT:   successors: %bb.7(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.7:
  ; CHECK-NEXT:   successors: %bb.7(0x7c000000), %bb.6(0x04000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[SUBSXri2:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 0, 0, implicit-def $nzcv
  ; CHECK-NEXT:   Bcc 8, %bb.7, implicit $nzcv
  ; CHECK-NEXT:   B %bb.6
  bb.1:
    successors: %bb.3(0x30000000), %bb.2(0x50000000)
    liveins: $w0

    %0:gpr(i32) = COPY $w0
    %1:gpr(i64) = G_CONSTANT i64 457873110
    %2:gpr(i32) = G_CONSTANT i32 1
    G_BRCOND %2(i32), %bb.3
    G_BR %bb.2

  bb.2:
    successors: %bb.7(0x80000000)

    %3:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    G_BR %bb.7

  bb.3:
    successors: %bb.4(0x40000000), %bb.5(0x40000000)

    %4:gpr(i32) = G_CONSTANT i32 1
    %5:gpr(i32) = G_XOR %0, %4
    %6:gpr(i32) = G_AND %5, %4
    G_BRCOND %6(i32), %bb.5
    G_BR %bb.4

  bb.4:
    successors: %bb.6(0x80000000)

    %7:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    %8:gpr(i64) = G_CONSTANT i64 -2
    %9:gpr(i64) = G_ADD %7, %8
    G_BR %bb.6

  bb.5:
    %10:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    %11:gpr(i64) = G_CONSTANT i64 0
    %12:gpr(i64) = G_AND %11, %10
    $x0 = COPY %12(i64)
    RET_ReallyLR implicit $x0

  bb.6:
    successors: %bb.6(0x80000000)

    %13:gpr(i64) = G_PHI %9(i64), %bb.4, %15(i64), %bb.6
    %14:gpr(i64) = G_CONSTANT i64 -1
    %15:gpr(i64) = G_ADD %13, %14
    G_BR %bb.6

  bb.7:
    successors: %bb.8(0x80000000)

  bb.8:
    successors: %bb.8(0x7c000000), %bb.7(0x04000000)

    %16:gpr(i64) = G_CONSTANT i64 0
    %17:gpr(i32) = G_ICMP intpred(ugt), %3(i64), %16
    G_BRCOND %17(i32), %bb.8
    G_BR %bb.7
...
---
name:            pr166563_commuted_and
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: pr166563_commuted_and
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.2(0x30000000), %bb.1(0x50000000)
  ; CHECK-NEXT:   liveins: $w0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr32 = COPY $w0
  ; CHECK-NEXT:   [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 457873110
  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG [[MOVi32imm]], %subreg.sub_32
  ; CHECK-NEXT:   [[MOVi32imm1:%[0-9]+]]:gpr32 = MOVi32imm 1
  ; CHECK-NEXT:   TBNZW [[MOVi32imm1]], 0, %bb.2
  ; CHECK-NEXT:   B %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   B %bb.6
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   TBZW [[COPY]], 0, %bb.4
  ; CHECK-NEXT:   B %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 2, 0, implicit-def dead $nzcv
  ; CHECK-NEXT:   B %bb.5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
  ; CHECK-NEXT:   [[ANDXrr:%[0-9]+]]:gpr64 = ANDXrr [[SUBREG_TO_REG]], [[COPY1]]
  ; CHECK-NEXT:   $x0 = COPY [[ANDXrr]]
  ; CHECK-NEXT:   RET_ReallyLR implicit $x0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gpr64sp = PHI [[SUBSXri]], %bb.3, %14, %bb.5
  ; CHECK-NEXT:   [[SUBSXri1:%[0-9]+]]:gpr64 = SUBSXri [[PHI]], 1, 0, implicit-def dead $nzcv
  ; CHECK-NEXT:   B %bb.5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.6:
  ; CHECK-NEXT:   successors: %bb.7(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.7:
  ; CHECK-NEXT:   successors: %bb.7(0x7c000000), %bb.6(0x04000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[SUBSXri2:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 0, 0, implicit-def $nzcv
  ; CHECK-NEXT:   Bcc 8, %bb.7, implicit $nzcv
  ; CHECK-NEXT:   B %bb.6
  bb.1:
    successors: %bb.3(0x30000000), %bb.2(0x50000000)
    liveins: $w0

    %0:gpr(i32) = COPY $w0
    %1:gpr(i64) = G_CONSTANT i64 457873110
    %2:gpr(i32) = G_CONSTANT i32 1
    G_BRCOND %2(i32), %bb.3
    G_BR %bb.2

  bb.2:
    successors: %bb.7(0x80000000)

    %3:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    G_BR %bb.7

  bb.3:
    successors: %bb.4(0x40000000), %bb.5(0x40000000)

    %4:gpr(i32) = G_CONSTANT i32 1
    %5:gpr(i32) = G_XOR %0, %4
    %6:gpr(i32) = G_AND %5, %4
    G_BRCOND %6(i32), %bb.5
    G_BR %bb.4

  bb.4:
    successors: %bb.6(0x80000000)

    %7:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    %8:gpr(i64) = G_CONSTANT i64 -2
    %9:gpr(i64) = G_ADD %7, %8
    G_BR %bb.6

  bb.5:
    %10:gpr(i64) = G_CONSTANT_FOLD_BARRIER %1
    %11:gpr(i64) = G_CONSTANT i64 0
    %12:gpr(i64) = G_AND %10, %11
    $x0 = COPY %12(i64)
    RET_ReallyLR implicit $x0

  bb.6:
    successors: %bb.6(0x80000000)

    %13:gpr(i64) = G_PHI %9(i64), %bb.4, %15(i64), %bb.6
    %14:gpr(i64) = G_CONSTANT i64 -1
    %15:gpr(i64) = G_ADD %13, %14
    G_BR %bb.6

  bb.7:
    successors: %bb.8(0x80000000)

  bb.8:
    successors: %bb.8(0x7c000000), %bb.7(0x04000000)

    %16:gpr(i64) = G_CONSTANT i64 0
    %17:gpr(i32) = G_ICMP intpred(ugt), %3(i64), %16
    G_BRCOND %17(i32), %bb.8
    G_BR %bb.7
...