; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-apple-ios -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=CHECK-NOFP16
; RUN: llc < %s -mtriple=arm64-apple-ios -mattr=+fullfp16 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=CHECK-FP16

; Test for https://github.com/llvm/llvm-project/issues/171494
; Atomic store of bitcast half to i16 was generating incorrect code (mrs instead of fmov).

define void @atomic_store_half(ptr %addr, half %val) {
; CHECK-NOFP16-LABEL: atomic_store_half:
; CHECK-NOFP16:       ; %bb.0:
; CHECK-NOFP16-NEXT:    ; kill: def $h0 killed $h0 def $s0
; CHECK-NOFP16-NEXT:    fmov w8, s0
; CHECK-NOFP16-NEXT:    stlrh w8, [x0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: atomic_store_half:
; CHECK-FP16:       ; %bb.0:
; CHECK-FP16-NEXT:    ; kill: def $h0 killed $h0 def $s0
; CHECK-FP16-NEXT:    fmov w8, s0
; CHECK-FP16-NEXT:    stlrh w8, [x0]
; CHECK-FP16-NEXT:    ret
  %ival = bitcast half %val to i16
  store atomic i16 %ival, ptr %addr release, align 2
  ret void
}

define void @atomic_store_bfloat(ptr %addr, bfloat %val) {
; CHECK-NOFP16-LABEL: atomic_store_bfloat:
; CHECK-NOFP16:       ; %bb.0:
; CHECK-NOFP16-NEXT:    ; kill: def $h0 killed $h0 def $s0
; CHECK-NOFP16-NEXT:    fmov w8, s0
; CHECK-NOFP16-NEXT:    stlrh w8, [x0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-LABEL: atomic_store_bfloat:
; CHECK-FP16:       ; %bb.0:
; CHECK-FP16-NEXT:    ; kill: def $h0 killed $h0 def $s0
; CHECK-FP16-NEXT:    fmov w8, s0
; CHECK-FP16-NEXT:    stlrh w8, [x0]
; CHECK-FP16-NEXT:    ret
  %ival = bitcast bfloat %val to i16
  store atomic i16 %ival, ptr %addr release, align 2
  ret void
}