; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck --check-prefixes=CHECK,CHECK-SD %s
; RUN: llc < %s -mtriple=arm64-apple-darwin -global-isel | FileCheck --check-prefixes=CHECK,CHECK-GI %s

define double @foo() optsize {
; CHECK-LABEL: foo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:  Lloh0:
; CHECK-NEXT:    adrp x8, lCPI0_0@PAGE
; CHECK-NEXT:  Lloh1:
; CHECK-NEXT:    ldr d0, [x8, lCPI0_0@PAGEOFF]
; CHECK-NEXT:    ret
; CHECK-NEXT:    .loh AdrpLdr Lloh0, Lloh1
  ret double 0x400921FB54442D18
}

define double @foo2() optsize {
; CHECK-LABEL: foo2:
; CHECK:       ; %bb.0:
; CHECK-NEXT:  Lloh2:
; CHECK-NEXT:    adrp x8, lCPI1_0@PAGE
; CHECK-NEXT:  Lloh3:
; CHECK-NEXT:    ldr d0, [x8, lCPI1_0@PAGEOFF]
; CHECK-NEXT:    ret
; CHECK-NEXT:    .loh AdrpLdr Lloh2, Lloh3
  ret double 0x1FFFFFFFC1
}

define float @bar() optsize {
; CHECK-LABEL: bar:
; CHECK:       ; %bb.0:
; CHECK-NEXT:  Lloh4:
; CHECK-NEXT:    adrp x8, lCPI2_0@PAGE
; CHECK-NEXT:  Lloh5:
; CHECK-NEXT:    ldr s0, [x8, lCPI2_0@PAGEOFF]
; CHECK-NEXT:    ret
; CHECK-NEXT:    .loh AdrpLdr Lloh4, Lloh5
  ret float 0x400921FB60000000
}

define fp128 @baz() optsize {
; CHECK-SD-LABEL: baz:
; CHECK-SD:       ; %bb.0:
; CHECK-SD-NEXT:  Lloh6:
; CHECK-SD-NEXT:    adrp x8, lCPI3_0@PAGE
; CHECK-SD-NEXT:  Lloh7:
; CHECK-SD-NEXT:    ldr q0, [x8, lCPI3_0@PAGEOFF]
; CHECK-SD-NEXT:    ret
; CHECK-SD-NEXT:    .loh AdrpLdr Lloh6, Lloh7
;
; CHECK-GI-LABEL: baz:
; CHECK-GI:       ; %bb.0:
; CHECK-GI-NEXT:    movi.2d v0, #0000000000000000
; CHECK-GI-NEXT:    ret
  ret fp128 0xL00000000000000000000000000000000
}

define double @foo2_pgso() !prof !14 {
; CHECK-SD-LABEL: foo2_pgso:
; CHECK-SD:       ; %bb.0:
; CHECK-SD-NEXT:  Lloh8:
; CHECK-SD-NEXT:    adrp x8, lCPI4_0@PAGE
; CHECK-SD-NEXT:  Lloh9:
; CHECK-SD-NEXT:    ldr d0, [x8, lCPI4_0@PAGEOFF]
; CHECK-SD-NEXT:    ret
; CHECK-SD-NEXT:    .loh AdrpLdr Lloh8, Lloh9
;
; CHECK-GI-LABEL: foo2_pgso:
; CHECK-GI:       ; %bb.0:
; CHECK-GI-NEXT:    mov x8, #137438887936 ; =0x1fffff0000
; CHECK-GI-NEXT:    movk x8, #65489
; CHECK-GI-NEXT:    fmov d0, x8
; CHECK-GI-NEXT:    ret
  ret double 0x1FFFFFFFd1
}

define float @bar_pgso() !prof !14 {
; CHECK-SD-LABEL: bar_pgso:
; CHECK-SD:       ; %bb.0:
; CHECK-SD-NEXT:  Lloh10:
; CHECK-SD-NEXT:    adrp x8, lCPI5_0@PAGE
; CHECK-SD-NEXT:  Lloh11:
; CHECK-SD-NEXT:    ldr s0, [x8, lCPI5_0@PAGEOFF]
; CHECK-SD-NEXT:    ret
; CHECK-SD-NEXT:    .loh AdrpLdr Lloh10, Lloh11
;
; CHECK-GI-LABEL: bar_pgso:
; CHECK-GI:       ; %bb.0:
; CHECK-GI-NEXT:    mov w8, #4060 ; =0xfdc
; CHECK-GI-NEXT:    movk w8, #16457, lsl #16
; CHECK-GI-NEXT:    fmov s0, w8
; CHECK-GI-NEXT:    ret
  ret float 0x400921FB80000000
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}