; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=aarch64 | FileCheck %s ; Test that nsz constraint can be bypassed when all uses are sign-insensitive. define i1 @test_fadd_neg_zero_fcmp(float %x) { ; CHECK-LABEL: test_fadd_neg_zero_fcmp: ; CHECK: // %bb.0: ; CHECK-NEXT: fmov s1, #1.00000000 ; CHECK-NEXT: fcmp s0, s1 ; CHECK-NEXT: cset w0, eq ; CHECK-NEXT: ret %add = fadd float %x, -0.0 %cmp = fcmp oeq float %add, 1.0 ret i1 %cmp } define float @test_fsub_zero_fabs(float %x) { ; CHECK-LABEL: test_fsub_zero_fabs: ; CHECK: // %bb.0: ; CHECK-NEXT: fabs s0, s0 ; CHECK-NEXT: ret %sub = fsub float %x, 0.0 %abs = call float @llvm.fabs.f32(float %sub) ret float %abs } define float @test_fsub_neg_zero_copysign(float %x, float %y) { ; CHECK-LABEL: test_fsub_neg_zero_copysign: ; CHECK: // %bb.0: ; CHECK-NEXT: mvni v2.4s, #128, lsl #24 ; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 ; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1 ; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b ; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0 ; CHECK-NEXT: ret %sub = fsub float -0.0, %x %copysign = call float @llvm.copysign.f32(float %sub, float %y) ret float %copysign } define i1 @test_div_sqrt_fcmp(float %x) { ; CHECK-LABEL: test_div_sqrt_fcmp: ; CHECK: // %bb.0: ; CHECK-NEXT: fsqrt s0, s0 ; CHECK-NEXT: fcmp s0, #0.0 ; CHECK-NEXT: cset w0, gt ; CHECK-NEXT: ret %sqrt = call float @llvm.sqrt.f32(float %x) %div = fdiv reassoc float %x, %sqrt %cmp = fcmp ogt float %div, 0.0 ret i1 %cmp } define float @test_frem_fabs(float %x) { ; CHECK-LABEL: test_frem_fabs: ; CHECK: // %bb.0: ; CHECK-NEXT: fmov s1, #0.50000000 ; CHECK-NEXT: fmov s2, #-2.00000000 ; CHECK-NEXT: fmul s1, s0, s1 ; CHECK-NEXT: frintz s1, s1 ; CHECK-NEXT: fmadd s0, s1, s2, s0 ; CHECK-NEXT: fabs s0, s0 ; CHECK-NEXT: ret %rem = frem float %x, 2.0 %abs = call float @llvm.fabs.f32(float %rem) ret float %abs } declare float @llvm.fabs.f32(float) declare float @llvm.copysign.f32(float, float) declare float @llvm.sqrt.f32(float)