; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -mtriple=aarch64-none-eabi -global-isel=0 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD ; RUN: llc -mtriple=aarch64-none-eabi -global-isel=1 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI define i32 @s32_test1(i64 %a) { ; CHECK-LABEL: s32_test1: ; CHECK: // %bb.0: ; CHECK-NEXT: lsr x0, x0, #48 ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 ; CHECK-NEXT: ret %r = lshr i64 %a, 32 %ret = trunc i64 %r to i32 %x = lshr i32 %ret, 16 ret i32 %x } define i32 @s32_test2(i64 %a) { ; CHECK-LABEL: s32_test2: ; CHECK: // %bb.0: ; CHECK-NEXT: ubfx x0, x0, #32, #16 ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 ; CHECK-NEXT: ret %r = lshr i64 %a, 16 %ret = trunc i64 %r to i32 %x = lshr i32 %ret, 16 ret i32 %x } define <8 x i8> @v8s8_test1(<8 x i16> %a) { ; CHECK-LABEL: v8s8_test1: ; CHECK: // %bb.0: ; CHECK-NEXT: ushr v0.8h, v0.8h, #12 ; CHECK-NEXT: xtn v0.8b, v0.8h ; CHECK-NEXT: ret %r = lshr <8 x i16> %a, %ret = trunc <8 x i16> %r to <8 x i8> %x = lshr <8 x i8> %ret, ret <8 x i8> %x } define <8 x i8> @v8s8_test2(<8 x i16> %a) { ; CHECK-SD-LABEL: v8s8_test2: ; CHECK-SD: // %bb.0: ; CHECK-SD-NEXT: ushr v0.8h, v0.8h, #8 ; CHECK-SD-NEXT: bic v0.8h, #240 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h ; CHECK-SD-NEXT: ret ; ; CHECK-GI-LABEL: v8s8_test2: ; CHECK-GI: // %bb.0: ; CHECK-GI-NEXT: movi v1.8h, #15 ; CHECK-GI-NEXT: ushr v0.8h, v0.8h, #8 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b ; CHECK-GI-NEXT: xtn v0.8b, v0.8h ; CHECK-GI-NEXT: ret %r = lshr <8 x i16> %a, %ret = trunc <8 x i16> %r to <8 x i8> %x = lshr <8 x i8> %ret, ret <8 x i8> %x } define <4 x i16> @v4s16_test1(<4 x i32> %a) { ; CHECK-LABEL: v4s16_test1: ; CHECK: // %bb.0: ; CHECK-NEXT: ushr v0.4s, v0.4s, #24 ; CHECK-NEXT: xtn v0.4h, v0.4s ; CHECK-NEXT: ret %r = lshr <4 x i32> %a, %ret = trunc <4 x i32> %r to <4 x i16> %x = lshr <4 x i16> %ret, ret <4 x i16> %x } define <4 x i16> @v4s16_test2(<4 x i32> %a) { ; CHECK-SD-LABEL: v4s16_test2: ; CHECK-SD: // %bb.0: ; CHECK-SD-NEXT: shrn v0.4h, v0.4s, #16 ; CHECK-SD-NEXT: bic v0.4h, #255, lsl #8 ; CHECK-SD-NEXT: ret ; ; CHECK-GI-LABEL: v4s16_test2: ; CHECK-GI: // %bb.0: ; CHECK-GI-NEXT: movi v1.2d, #0x0000ff000000ff ; CHECK-GI-NEXT: ushr v0.4s, v0.4s, #16 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b ; CHECK-GI-NEXT: xtn v0.4h, v0.4s ; CHECK-GI-NEXT: ret %r = lshr <4 x i32> %a, %ret = trunc <4 x i32> %r to <4 x i16> %x = lshr <4 x i16> %ret, ret <4 x i16> %x } define <2 x i32> @v2s32_test1(<2 x i64> %a) { ; CHECK-LABEL: v2s32_test1: ; CHECK: // %bb.0: ; CHECK-NEXT: ushr v0.2d, v0.2d, #48 ; CHECK-NEXT: xtn v0.2s, v0.2d ; CHECK-NEXT: ret %r = lshr <2 x i64> %a, %ret = trunc <2 x i64> %r to <2 x i32> %x = lshr <2 x i32> %ret, ret <2 x i32> %x } define <2 x i32> @v2s32_test2(<2 x i64> %a) { ; CHECK-SD-LABEL: v2s32_test2: ; CHECK-SD: // %bb.0: ; CHECK-SD-NEXT: movi d1, #0x00ffff0000ffff ; CHECK-SD-NEXT: shrn v0.2s, v0.2d, #32 ; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b ; CHECK-SD-NEXT: ret ; ; CHECK-GI-LABEL: v2s32_test2: ; CHECK-GI: // %bb.0: ; CHECK-GI-NEXT: movi v1.2d, #0x0000000000ffff ; CHECK-GI-NEXT: ushr v0.2d, v0.2d, #32 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b ; CHECK-GI-NEXT: xtn v0.2s, v0.2d ; CHECK-GI-NEXT: ret %r = lshr <2 x i64> %a, %ret = trunc <2 x i64> %r to <2 x i32> %x = lshr <2 x i32> %ret, ret <2 x i32> %x }