; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple aarch64 | FileCheck %s --check-prefixes=CHECK-LE
; RUN: llc < %s -mtriple aarch64_be | FileCheck %s --check-prefixes=CHECK-BE

; Note: These tests show that LDNP is not (yet) prioritized for interleaved loads.

define void @test_ldnp_interleaved_load2_v2i32(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v2i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.2s, v1.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v2i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.2s, v1.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <4 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <4 x i32> %loaded, <4 x i32> poison, <2 x i32> <i32 0, i32 2>
  %v1 = shufflevector <4 x i32> %loaded, <4 x i32> poison, <2 x i32> <i32 1, i32 3>
  store <2 x i32> %v0, ptr %out0
  store <2 x i32> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v4i16(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v4i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.4h, v1.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v4i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.4h, v1.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <8 x i16> %loaded, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %v1 = shufflevector <8 x i16> %loaded, <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  store <4 x i16> %v0, ptr %out0
  store <4 x i16> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v8i8(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v8i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.8b, v1.8b }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v8i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.8b, v1.8b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8b }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <16 x i8> %loaded, <16 x i8> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %v1 = shufflevector <16 x i8> %loaded, <16 x i8> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  store <8 x i8> %v0, ptr %out0
  store <8 x i8> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v2f32(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v2f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.2s, v1.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v2f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.2s, v1.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <4 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <4 x float> %loaded, <4 x float> poison, <2 x i32> <i32 0, i32 2>
  %v1 = shufflevector <4 x float> %loaded, <4 x float> poison, <2 x i32> <i32 1, i32 3>
  store <2 x float> %v0, ptr %out0
  store <2 x float> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v4f16(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v4f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.4h, v1.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v4f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.4h, v1.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <8 x half> %loaded, <8 x half> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %v1 = shufflevector <8 x half> %loaded, <8 x half> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  store <4 x half> %v0, ptr %out0
  store <4 x half> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v2i64(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v2i64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.2d, v1.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v2i64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.2d, v1.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <4 x i64>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <4 x i64> %loaded, <4 x i64> poison, <2 x i32> <i32 0, i32 2>
  %v1 = shufflevector <4 x i64> %loaded, <4 x i64> poison, <2 x i32> <i32 1, i32 3>
  store <2 x i64> %v0, ptr %out0
  store <2 x i64> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v4i32(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v4i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.4s, v1.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v4i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.4s, v1.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %v1 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  store <4 x i32> %v0, ptr %out0
  store <4 x i32> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v8i16(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v8i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.8h, v1.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v8i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.8h, v1.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %v1 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  store <8 x i16> %v0, ptr %out0
  store <8 x i16> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v16i8(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v16i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.16b, v1.16b }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v16i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.16b, v1.16b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.16b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.16b }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <32 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <32 x i8> %loaded, <32 x i8> poison,
                      <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14,
                                  i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
  %v1 = shufflevector <32 x i8> %loaded, <32 x i8> poison,
                      <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15,
                                  i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
  store <16 x i8> %v0, ptr %out0
  store <16 x i8> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v2f64(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v2f64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.2d, v1.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v2f64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.2d, v1.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <4 x double>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <4 x double> %loaded, <4 x double> poison, <2 x i32> <i32 0, i32 2>
  %v1 = shufflevector <4 x double> %loaded, <4 x double> poison, <2 x i32> <i32 1, i32 3>
  store <2 x double> %v0, ptr %out0
  store <2 x double> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v4f32(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v4f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.4s, v1.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v4f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.4s, v1.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <8 x float> %loaded, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %v1 = shufflevector <8 x float> %loaded, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  store <4 x float> %v0, ptr %out0
  store <4 x float> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load2_v8f16(ptr %ptr, ptr %out0, ptr %out1) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load2_v8f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld2 { v0.8h, v1.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load2_v8f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld2 { v0.8h, v1.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <16 x half> %loaded, <16 x half> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %v1 = shufflevector <16 x half> %loaded, <16 x half> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  store <8 x half> %v0, ptr %out0
  store <8 x half> %v1, ptr %out1
  ret void
}

define void @test_ldnp_interleaved_load3_v2i32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v2i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.2s, v1.2s, v2.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v2i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.2s, v1.2s, v2.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2s }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <6 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <6 x i32> %loaded, <6 x i32> poison, <2 x i32> <i32 0, i32 3>
  %v1 = shufflevector <6 x i32> %loaded, <6 x i32> poison, <2 x i32> <i32 1, i32 4>
  %v2 = shufflevector <6 x i32> %loaded, <6 x i32> poison, <2 x i32> <i32 2, i32 5>
  store <2 x i32> %v0, ptr %out0
  store <2 x i32> %v1, ptr %out1
  store <2 x i32> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v4i16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v4i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.4h, v1.4h, v2.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v4i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.4h, v1.4h, v2.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4h }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <12 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <12 x i16> %loaded, <12 x i16> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
  %v1 = shufflevector <12 x i16> %loaded, <12 x i16> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
  %v2 = shufflevector <12 x i16> %loaded, <12 x i16> poison, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
  store <4 x i16> %v0, ptr %out0
  store <4 x i16> %v1, ptr %out1
  store <4 x i16> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v8i8(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v8i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.8b, v1.8b, v2.8b }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v8i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.8b, v1.8b, v2.8b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8b }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8b }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <24 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <24 x i8> %loaded, <24 x i8> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
  %v1 = shufflevector <24 x i8> %loaded, <24 x i8> poison, <8 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22>
  %v2 = shufflevector <24 x i8> %loaded, <24 x i8> poison, <8 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23>
  store <8 x i8> %v0, ptr %out0
  store <8 x i8> %v1, ptr %out1
  store <8 x i8> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v2f32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v2f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.2s, v1.2s, v2.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v2f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.2s, v1.2s, v2.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2s }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <6 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <6 x float> %loaded, <6 x float> poison, <2 x i32> <i32 0, i32 3>
  %v1 = shufflevector <6 x float> %loaded, <6 x float> poison, <2 x i32> <i32 1, i32 4>
  %v2 = shufflevector <6 x float> %loaded, <6 x float> poison, <2 x i32> <i32 2, i32 5>
  store <2 x float> %v0, ptr %out0
  store <2 x float> %v1, ptr %out1
  store <2 x float> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v4f16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v4f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.4h, v1.4h, v2.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v4f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.4h, v1.4h, v2.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4h }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <12 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <12 x half> %loaded, <12 x half> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
  %v1 = shufflevector <12 x half> %loaded, <12 x half> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
  %v2 = shufflevector <12 x half> %loaded, <12 x half> poison, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
  store <4 x half> %v0, ptr %out0
  store <4 x half> %v1, ptr %out1
  store <4 x half> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v2i64(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v2i64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.2d, v1.2d, v2.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v2i64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.2d, v1.2d, v2.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2d }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <6 x i64>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <6 x i64> %loaded, <6 x i64> poison, <2 x i32> <i32 0, i32 3>
  %v1 = shufflevector <6 x i64> %loaded, <6 x i64> poison, <2 x i32> <i32 1, i32 4>
  %v2 = shufflevector <6 x i64> %loaded, <6 x i64> poison, <2 x i32> <i32 2, i32 5>
  store <2 x i64> %v0, ptr %out0
  store <2 x i64> %v1, ptr %out1
  store <2 x i64> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v4i32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v4i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v4i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4s }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <12 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <12 x i32> %loaded, <12 x i32> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
  %v1 = shufflevector <12 x i32> %loaded, <12 x i32> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
  %v2 = shufflevector <12 x i32> %loaded, <12 x i32> poison, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
  store <4 x i32> %v0, ptr %out0
  store <4 x i32> %v1, ptr %out1
  store <4 x i32> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v8i16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v8i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.8h, v1.8h, v2.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v8i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.8h, v1.8h, v2.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8h }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <24 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <24 x i16> %loaded, <24 x i16> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
  %v1 = shufflevector <24 x i16> %loaded, <24 x i16> poison, <8 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22>
  %v2 = shufflevector <24 x i16> %loaded, <24 x i16> poison, <8 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23>
  store <8 x i16> %v0, ptr %out0
  store <8 x i16> %v1, ptr %out1
  store <8 x i16> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v16i8(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v16i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.16b, v1.16b, v2.16b }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v16i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.16b, v1.16b, v2.16b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.16b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.16b }, [x2]
; CHECK-BE-NEXT:    st1 { v2.16b }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <48 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <48 x i8> %loaded, <48 x i8> poison,
                      <16 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21,
                                  i32 24, i32 27, i32 30, i32 33, i32 36, i32 39, i32 42, i32 45>
  %v1 = shufflevector <48 x i8> %loaded, <48 x i8> poison,
                      <16 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22,
                                  i32 25, i32 28, i32 31, i32 34, i32 37, i32 40, i32 43, i32 46>
  %v2 = shufflevector <48 x i8> %loaded, <48 x i8> poison,
                      <16 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23,
                                  i32 26, i32 29, i32 32, i32 35, i32 38, i32 41, i32 44, i32 47>
  store <16 x i8> %v0, ptr %out0
  store <16 x i8> %v1, ptr %out1
  store <16 x i8> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v2f64(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v2f64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.2d, v1.2d, v2.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v2f64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.2d, v1.2d, v2.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2d }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <6 x double>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <6 x double> %loaded, <6 x double> poison, <2 x i32> <i32 0, i32 3>
  %v1 = shufflevector <6 x double> %loaded, <6 x double> poison, <2 x i32> <i32 1, i32 4>
  %v2 = shufflevector <6 x double> %loaded, <6 x double> poison, <2 x i32> <i32 2, i32 5>
  store <2 x double> %v0, ptr %out0
  store <2 x double> %v1, ptr %out1
  store <2 x double> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v4f32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v4f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v4f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4s }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <12 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <12 x float> %loaded, <12 x float> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
  %v1 = shufflevector <12 x float> %loaded, <12 x float> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
  %v2 = shufflevector <12 x float> %loaded, <12 x float> poison, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
  store <4 x float> %v0, ptr %out0
  store <4 x float> %v1, ptr %out1
  store <4 x float> %v2, ptr %out2
  ret void
}

define void @test_ldnp_interleaved_load3_v8f16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load3_v8f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld3 { v0.8h, v1.8h, v2.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load3_v8f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld3 { v0.8h, v1.8h, v2.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8h }, [x3]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <24 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <24 x half> %loaded, <24 x half> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
  %v1 = shufflevector <24 x half> %loaded, <24 x half> poison, <8 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22>
  %v2 = shufflevector <24 x half> %loaded, <24 x half> poison, <8 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23>
  store <8 x half> %v0, ptr %out0
  store <8 x half> %v1, ptr %out1
  store <8 x half> %v2, ptr %out2
  ret void
}

; Test conservative lowering of a ld4 matching patterns

define void @test_ldnp_interleaved_load4_v2i32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v2i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    str d3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v2i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2s }, [x3]
; CHECK-BE-NEXT:    st1 { v3.2s }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <2 x i32> <i32 0, i32 4>
  %v1 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <2 x i32> <i32 1, i32 5>
  %v2 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <2 x i32> <i32 2, i32 6>
  %v3 = shufflevector <8 x i32> %loaded, <8 x i32> poison, <2 x i32> <i32 3, i32 7>
  store <2 x i32> %v0, ptr %out0
  store <2 x i32> %v1, ptr %out1
  store <2 x i32> %v2, ptr %out2
  store <2 x i32> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v4i16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v4i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    str d3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v4i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4h }, [x3]
; CHECK-BE-NEXT:    st1 { v3.4h }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %v1 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %v2 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %v3 = shufflevector <16 x i16> %loaded, <16 x i16> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  store <4 x i16> %v0, ptr %out0
  store <4 x i16> %v1, ptr %out1
  store <4 x i16> %v2, ptr %out2
  store <4 x i16> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v8i8(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v8i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    str d3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v8i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8b }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8b }, [x3]
; CHECK-BE-NEXT:    st1 { v3.8b }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <32 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <32 x i8> %loaded, <32 x i8> poison, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28>
  %v1 = shufflevector <32 x i8> %loaded, <32 x i8> poison, <8 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29>
  %v2 = shufflevector <32 x i8> %loaded, <32 x i8> poison, <8 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
  %v3 = shufflevector <32 x i8> %loaded, <32 x i8> poison, <8 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
  store <8 x i8> %v0, ptr %out0
  store <8 x i8> %v1, ptr %out1
  store <8 x i8> %v2, ptr %out2
  store <8 x i8> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v2f32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v2f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    str d3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v2f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2s }, [x3]
; CHECK-BE-NEXT:    st1 { v3.2s }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <8 x float> %loaded, <8 x float> poison, <2 x i32> <i32 0, i32 4>
  %v1 = shufflevector <8 x float> %loaded, <8 x float> poison, <2 x i32> <i32 1, i32 5>
  %v2 = shufflevector <8 x float> %loaded, <8 x float> poison, <2 x i32> <i32 2, i32 6>
  %v3 = shufflevector <8 x float> %loaded, <8 x float> poison, <2 x i32> <i32 3, i32 7>
  store <2 x float> %v0, ptr %out0
  store <2 x float> %v1, ptr %out1
  store <2 x float> %v2, ptr %out2
  store <2 x float> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v4f16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v4f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]
; CHECK-LE-NEXT:    str d0, [x1]
; CHECK-LE-NEXT:    str d1, [x2]
; CHECK-LE-NEXT:    str d2, [x3]
; CHECK-LE-NEXT:    str d3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v4f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4h }, [x3]
; CHECK-BE-NEXT:    st1 { v3.4h }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <16 x half> %loaded, <16 x half> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %v1 = shufflevector <16 x half> %loaded, <16 x half> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %v2 = shufflevector <16 x half> %loaded, <16 x half> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %v3 = shufflevector <16 x half> %loaded, <16 x half> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  store <4 x half> %v0, ptr %out0
  store <4 x half> %v1, ptr %out1
  store <4 x half> %v2, ptr %out2
  store <4 x half> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v2i64(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v2i64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v2i64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2d }, [x3]
; CHECK-BE-NEXT:    st1 { v3.2d }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x i64>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <8 x i64> %loaded, <8 x i64> poison, <2 x i32> <i32 0, i32 4>
  %v1 = shufflevector <8 x i64> %loaded, <8 x i64> poison, <2 x i32> <i32 1, i32 5>
  %v2 = shufflevector <8 x i64> %loaded, <8 x i64> poison, <2 x i32> <i32 2, i32 6>
  %v3 = shufflevector <8 x i64> %loaded, <8 x i64> poison, <2 x i32> <i32 3, i32 7>
  store <2 x i64> %v0, ptr %out0
  store <2 x i64> %v1, ptr %out1
  store <2 x i64> %v2, ptr %out2
  store <2 x i64> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v4i32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v4i32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v4i32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4s }, [x3]
; CHECK-BE-NEXT:    st1 { v3.4s }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x i32>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <16 x i32> %loaded, <16 x i32> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %v1 = shufflevector <16 x i32> %loaded, <16 x i32> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %v2 = shufflevector <16 x i32> %loaded, <16 x i32> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %v3 = shufflevector <16 x i32> %loaded, <16 x i32> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  store <4 x i32> %v0, ptr %out0
  store <4 x i32> %v1, ptr %out1
  store <4 x i32> %v2, ptr %out2
  store <4 x i32> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v8i16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v8i16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v8i16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8h }, [x3]
; CHECK-BE-NEXT:    st1 { v3.8h }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <32 x i16>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <32 x i16> %loaded, <32 x i16> poison, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28>
  %v1 = shufflevector <32 x i16> %loaded, <32 x i16> poison, <8 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29>
  %v2 = shufflevector <32 x i16> %loaded, <32 x i16> poison, <8 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
  %v3 = shufflevector <32 x i16> %loaded, <32 x i16> poison, <8 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
  store <8 x i16> %v0, ptr %out0
  store <8 x i16> %v1, ptr %out1
  store <8 x i16> %v2, ptr %out2
  store <8 x i16> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v16i8(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v16i8:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v16i8:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0]
; CHECK-BE-NEXT:    st1 { v0.16b }, [x1]
; CHECK-BE-NEXT:    st1 { v1.16b }, [x2]
; CHECK-BE-NEXT:    st1 { v2.16b }, [x3]
; CHECK-BE-NEXT:    st1 { v3.16b }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <64 x i8>, ptr %ptr, align 1, !nontemporal !0
  %v0 = shufflevector <64 x i8> %loaded, <64 x i8> poison,
                      <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28,
                                  i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60>
  %v1 = shufflevector <64 x i8> %loaded, <64 x i8> poison,
                      <16 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29,
                                  i32 33, i32 37, i32 41, i32 45, i32 49, i32 53, i32 57, i32 61>
  %v2 = shufflevector <64 x i8> %loaded, <64 x i8> poison,
                      <16 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30,
                                  i32 34, i32 38, i32 42, i32 46, i32 50, i32 54, i32 58, i32 62>
  %v3 = shufflevector <64 x i8> %loaded, <64 x i8> poison,
                      <16 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31,
                                  i32 35, i32 39, i32 43, i32 47, i32 51, i32 55, i32 59, i32 63>
  store <16 x i8> %v0, ptr %out0
  store <16 x i8> %v1, ptr %out1
  store <16 x i8> %v2, ptr %out2
  store <16 x i8> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v2f64(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v2f64:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v2f64:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
; CHECK-BE-NEXT:    st1 { v0.2d }, [x1]
; CHECK-BE-NEXT:    st1 { v1.2d }, [x2]
; CHECK-BE-NEXT:    st1 { v2.2d }, [x3]
; CHECK-BE-NEXT:    st1 { v3.2d }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <8 x double>, ptr %ptr, align 8, !nontemporal !0
  %v0 = shufflevector <8 x double> %loaded, <8 x double> poison, <2 x i32> <i32 0, i32 4>
  %v1 = shufflevector <8 x double> %loaded, <8 x double> poison, <2 x i32> <i32 1, i32 5>
  %v2 = shufflevector <8 x double> %loaded, <8 x double> poison, <2 x i32> <i32 2, i32 6>
  %v3 = shufflevector <8 x double> %loaded, <8 x double> poison, <2 x i32> <i32 3, i32 7>
  store <2 x double> %v0, ptr %out0
  store <2 x double> %v1, ptr %out1
  store <2 x double> %v2, ptr %out2
  store <2 x double> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v4f32(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v4f32:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v4f32:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0]
; CHECK-BE-NEXT:    st1 { v0.4s }, [x1]
; CHECK-BE-NEXT:    st1 { v1.4s }, [x2]
; CHECK-BE-NEXT:    st1 { v2.4s }, [x3]
; CHECK-BE-NEXT:    st1 { v3.4s }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <16 x float>, ptr %ptr, align 4, !nontemporal !0
  %v0 = shufflevector <16 x float> %loaded, <16 x float> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %v1 = shufflevector <16 x float> %loaded, <16 x float> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %v2 = shufflevector <16 x float> %loaded, <16 x float> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %v3 = shufflevector <16 x float> %loaded, <16 x float> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  store <4 x float> %v0, ptr %out0
  store <4 x float> %v1, ptr %out1
  store <4 x float> %v2, ptr %out2
  store <4 x float> %v3, ptr %out3
  ret void
}

define void @test_ldnp_interleaved_load4_v8f16(ptr %ptr, ptr %out0, ptr %out1, ptr %out2, ptr %out3) {
; CHECK-LE-LABEL: test_ldnp_interleaved_load4_v8f16:
; CHECK-LE:       // %bb.0: // %entry
; CHECK-LE-NEXT:    ld4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]
; CHECK-LE-NEXT:    str q0, [x1]
; CHECK-LE-NEXT:    str q1, [x2]
; CHECK-LE-NEXT:    str q2, [x3]
; CHECK-LE-NEXT:    str q3, [x4]
; CHECK-LE-NEXT:    ret
;
; CHECK-BE-LABEL: test_ldnp_interleaved_load4_v8f16:
; CHECK-BE:       // %bb.0: // %entry
; CHECK-BE-NEXT:    ld4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]
; CHECK-BE-NEXT:    st1 { v0.8h }, [x1]
; CHECK-BE-NEXT:    st1 { v1.8h }, [x2]
; CHECK-BE-NEXT:    st1 { v2.8h }, [x3]
; CHECK-BE-NEXT:    st1 { v3.8h }, [x4]
; CHECK-BE-NEXT:    ret
entry:
  %loaded = load <32 x half>, ptr %ptr, align 2, !nontemporal !0
  %v0 = shufflevector <32 x half> %loaded, <32 x half> poison, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28>
  %v1 = shufflevector <32 x half> %loaded, <32 x half> poison, <8 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29>
  %v2 = shufflevector <32 x half> %loaded, <32 x half> poison, <8 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
  %v3 = shufflevector <32 x half> %loaded, <32 x half> poison, <8 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
  store <8 x half> %v0, ptr %out0
  store <8 x half> %v1, ptr %out1
  store <8 x half> %v2, ptr %out2
  store <8 x half> %v3, ptr %out3
  ret void
}

!0 = !{ i32 1 }