# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 # RUN: llc %s -passes="machine-sink" -o - | FileCheck %s --- | ; ModuleID = 'x.ll' source_filename = "x.ll" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32" target triple = "aarch64-unknown-linux-gnu" define void @f(i32 %c) { entry: %promoted1 = sext i32 %c to i64 %sub = add nsw i64 %promoted1, -2 %promoted = sext i32 %c to i64 %add = add nsw i64 %promoted, 2 %add.i = add nsw i64 %add, %sub %0 = inttoptr i64 %add.i to ptr store i16 0, ptr %0, align 2 ret void } ... --- name: f registers: - { id: 0, class: gpr32, preferred-register: '', flags: [ ] } - { id: 1, class: gpr64, preferred-register: '', flags: [ ] } - { id: 2, class: gpr64all, preferred-register: '', flags: [ ] } - { id: 3, class: gpr64common, preferred-register: '', flags: [ ] } - { id: 4, class: gpr32, preferred-register: '', flags: [ ] } liveins: - { reg: '$w0', virtual-reg: '%0' } body: | bb.0.entry: liveins: $w0 ; CHECK-LABEL: name: f ; CHECK: liveins: $w0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr64all = IMPLICIT_DEF ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gpr64 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.sub_32 ; CHECK-NEXT: [[SBFMXri:%[0-9]+]]:gpr64common = SBFMXri killed [[INSERT_SUBREG]], 0, 31 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr ; CHECK-NEXT: STRHHroX [[COPY1]], [[SBFMXri]], [[SBFMXri]], 0, 0 :: (store (s16) into %ir.0) ; CHECK-NEXT: RET_ReallyLR %0:gpr32 = COPY $w0 %2:gpr64all = IMPLICIT_DEF %1:gpr64 = INSERT_SUBREG %2, %0, %subreg.sub_32 %3:gpr64common = SBFMXri killed %1, 0, 31 %4:gpr32 = COPY $wzr STRHHroX %4, %3, %3, 0, 0 :: (store (s16) into %ir.0) RET_ReallyLR ...