; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck --check-prefixes=CHECK,CHECK-LE %s
; RUN: llc -mtriple=aarch64_be-linux-gnu -mattr=+sve < %s | FileCheck --check-prefixes=CHECK,CHECK-BE %s

define <vscale x 16 x i8> @load_nxv16i8(ptr %a) nounwind {
; CHECK-LABEL: load_nxv16i8:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    ldnt1b { z0.b }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 16 x i8>, ptr %a, !nontemporal !0
  ret <vscale x 16 x i8> %load
}

define <vscale x 8 x i16> @load_nxv8i16(ptr %a) nounwind {
; CHECK-LABEL: load_nxv8i16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    ldnt1h { z0.h }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 8 x i16>, ptr %a, !nontemporal !0
  ret <vscale x 8 x i16> %load
}

define <vscale x 4 x i32> @load_nxv4i32(ptr %a) nounwind {
; CHECK-LABEL: load_nxv4i32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    ldnt1w { z0.s }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 4 x i32>, ptr %a, !nontemporal !0
  ret <vscale x 4 x i32> %load
}

define <vscale x 2 x i64> @load_nxv2i64(ptr %a) nounwind {
; CHECK-LABEL: load_nxv2i64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    ldnt1d { z0.d }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 2 x i64>, ptr %a, !nontemporal !0
  ret <vscale x 2 x i64> %load
}

define <vscale x 8 x half> @load_nxv8f16(ptr %a) nounwind {
; CHECK-LABEL: load_nxv8f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    ldnt1h { z0.h }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 8 x half>, ptr %a, !nontemporal !0
  ret <vscale x 8 x half> %load
}

define <vscale x 8 x bfloat> @load_nxv8bf16(ptr %a) nounwind {
; CHECK-LABEL: load_nxv8bf16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    ldnt1h { z0.h }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 8 x bfloat>, ptr %a, !nontemporal !0
  ret <vscale x 8 x bfloat> %load
}

define <vscale x 4 x float> @load_nxv4f32(ptr %a) nounwind {
; CHECK-LABEL: load_nxv4f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    ldnt1w { z0.s }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 4 x float>, ptr %a, !nontemporal !0
  ret <vscale x 4 x float> %load
}

define <vscale x 2 x double> @load_nxv2f64(ptr %a) nounwind {
; CHECK-LABEL: load_nxv2f64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    ldnt1d { z0.d }, p0/z, [x0]
; CHECK-NEXT:    ret
  %load = load <vscale x 2 x double>, ptr %a, !nontemporal !0
  ret <vscale x 2 x double> %load
}

define <vscale x 16 x i8> @load_nxv16i8_reg(ptr %a, i64 %off) nounwind {
; CHECK-LABEL: load_nxv16i8_reg:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    ldnt1b { z0.b }, p0/z, [x0, x1]
; CHECK-NEXT:    ret
  %ptr = getelementptr i8, ptr %a, i64 %off
  %load = load <vscale x 16 x i8>, ptr %ptr, !nontemporal !0
  ret <vscale x 16 x i8> %load
}

define <vscale x 16 x i8> @load_nxv16i8_imm(ptr %a) nounwind {
; CHECK-LABEL: load_nxv16i8_imm:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    ldnt1b { z0.b }, p0/z, [x0, #1, mul vl]
; CHECK-NEXT:    ret
  %ptr = getelementptr <vscale x 16 x i8>, ptr %a, i64 1
  %load = load <vscale x 16 x i8>, ptr %ptr, !nontemporal !0
  ret <vscale x 16 x i8> %load
}

define <vscale x 2 x double> @load_nxv2f64_reg(ptr %a, i64 %off) nounwind {
; CHECK-LABEL: load_nxv2f64_reg:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    ldnt1d { z0.d }, p0/z, [x0, x1, lsl #3]
; CHECK-NEXT:    ret
  %ptr = getelementptr double, ptr %a, i64 %off
  %load = load <vscale x 2 x double>, ptr %ptr, !nontemporal !0
  ret <vscale x 2 x double> %load
}

define <vscale x 2 x double> @load_nxv2f64_imm(ptr %a) nounwind {
; CHECK-LABEL: load_nxv2f64_imm:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    ldnt1d { z0.d }, p0/z, [x0, #1, mul vl]
; CHECK-NEXT:    ret
  %ptr = getelementptr <vscale x 2 x double>, ptr %a, i64 1
  %load = load <vscale x 2 x double>, ptr %ptr, !nontemporal !0
  ret <vscale x 2 x double> %load
}

define void @store_nxv16i8(<vscale x 16 x i8> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv16i8:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    stnt1b { z0.b }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 16 x i8> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv8i16(<vscale x 8 x i16> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv8i16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    stnt1h { z0.h }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 8 x i16> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv4i32(<vscale x 4 x i32> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv4i32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    stnt1w { z0.s }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 4 x i32> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv2i64(<vscale x 2 x i64> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv2i64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    stnt1d { z0.d }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 2 x i64> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv8f16(<vscale x 8 x half> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv8f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    stnt1h { z0.h }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 8 x half> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv8bf16(<vscale x 8 x bfloat> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv8bf16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    stnt1h { z0.h }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 8 x bfloat> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv4f32(<vscale x 4 x float> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv4f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    stnt1w { z0.s }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 4 x float> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv2f64(<vscale x 2 x double> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv2f64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    stnt1d { z0.d }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 2 x double> %x, ptr %a, !nontemporal !0
  ret void
}

define void @store_nxv16i8_reg(<vscale x 16 x i8> %x, ptr %a, i64 %off) nounwind {
; CHECK-LABEL: store_nxv16i8_reg:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    stnt1b { z0.b }, p0, [x0, x1]
; CHECK-NEXT:    ret
  %ptr = getelementptr i8, ptr %a, i64 %off
  store <vscale x 16 x i8> %x, ptr %ptr, !nontemporal !0
  ret void
}

define void @store_nxv16i8_imm(<vscale x 16 x i8> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv16i8_imm:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    stnt1b { z0.b }, p0, [x0, #1, mul vl]
; CHECK-NEXT:    ret
  %ptr = getelementptr <vscale x 16 x i8>, ptr %a, i64 1
  store <vscale x 16 x i8> %x, ptr %ptr, !nontemporal !0
  ret void
}

define void @store_nxv2f64_reg(<vscale x 2 x double> %x, ptr %a, i64 %off) nounwind {
; CHECK-LABEL: store_nxv2f64_reg:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    stnt1d { z0.d }, p0, [x0, x1, lsl #3]
; CHECK-NEXT:    ret
  %ptr = getelementptr double, ptr %a, i64 %off
  store <vscale x 2 x double> %x, ptr %ptr, !nontemporal !0
  ret void
}

define void @store_nxv2f64_imm(<vscale x 2 x double> %x, ptr %a) nounwind {
; CHECK-LABEL: store_nxv2f64_imm:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    stnt1d { z0.d }, p0, [x0, #1, mul vl]
; CHECK-NEXT:    ret
  %ptr = getelementptr <vscale x 2 x double>, ptr %a, i64 1
  store <vscale x 2 x double> %x, ptr %ptr, !nontemporal !0
  ret void
}

!0 = !{i32 1}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-BE: {{.*}}
; CHECK-LE: {{.*}}