# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 # RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s # Test that RDFFR followed by PTEST is replaced with RDFFRS. --- name: substitute_rdffr_pp_with_rdffrs_pp tracksRegLiveness: true body: | bb.0: liveins: $ffr, $p0 ; CHECK-LABEL: name: substitute_rdffr_pp_with_rdffrs_pp ; CHECK: liveins: $ffr, $p0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:ppr_3b = COPY $p0 ; CHECK-NEXT: [[RDFFRS_PPz:%[0-9]+]]:ppr_3b = RDFFRS_PPz [[COPY]], implicit $ffr, implicit-def $nzcv ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr killed [[COPY1]], $wzr, 0, implicit $nzcv ; CHECK-NEXT: $w0 = COPY [[CSINCWr]] ; CHECK-NEXT: RET_ReallyLR implicit $w0 %0:ppr_3b = COPY $p0 %1:ppr_3b = RDFFR_PPz %0:ppr_3b, implicit $ffr PTEST_PP killed %0:ppr_3b, killed %1:ppr_3b, implicit-def $nzcv %2:gpr32 = COPY $wzr %3:gpr32 = CSINCWr killed %2, $wzr, 0, implicit $nzcv $w0 = COPY %3 RET_ReallyLR implicit $w0 ... --- name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_differing_mask tracksRegLiveness: true body: | bb.0: liveins: $ffr, $p0, $p1 ; CHECK-LABEL: name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_differing_mask ; CHECK: liveins: $ffr, $p0, $p1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:ppr_3b = COPY $p0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p1 ; CHECK-NEXT: [[RDFFR_PPz:%[0-9]+]]:ppr_3b = RDFFR_PPz [[COPY]], implicit $ffr ; CHECK-NEXT: PTEST_PP killed [[COPY1]], killed [[RDFFR_PPz]], implicit-def $nzcv ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr killed [[COPY2]], $wzr, 0, implicit $nzcv ; CHECK-NEXT: $w0 = COPY [[CSINCWr]] ; CHECK-NEXT: RET_ReallyLR implicit $w0 %0:ppr_3b = COPY $p0 %1:ppr_3b = COPY $p1 %2:ppr_3b = RDFFR_PPz %0:ppr_3b, implicit $ffr PTEST_PP killed %1:ppr_3b, killed %2:ppr_3b, implicit-def $nzcv %3:gpr32 = COPY $wzr %4:gpr32 = CSINCWr killed %3, $wzr, 0, implicit $nzcv $w0 = COPY %4 RET_ReallyLR implicit $w0 ... --- name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_nzcv_clobbered tracksRegLiveness: true body: | bb.0: liveins: $ffr, $p0, $x0 ; CHECK-LABEL: name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_nzcv_clobbered ; CHECK: liveins: $ffr, $p0, $x0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:ppr_3b = COPY $p0 ; CHECK-NEXT: [[RDFFR_PPz:%[0-9]+]]:ppr_3b = RDFFR_PPz [[COPY]], implicit $ffr ; CHECK-NEXT: $x0 = ADDSXrr $x0, $x0, implicit-def $nzcv ; CHECK-NEXT: PTEST_PP killed [[COPY]], killed [[RDFFR_PPz]], implicit-def $nzcv ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr killed [[COPY1]], $wzr, 0, implicit $nzcv ; CHECK-NEXT: $w0 = COPY [[CSINCWr]] ; CHECK-NEXT: RET_ReallyLR implicit $w0 %0:ppr_3b = COPY $p0 %1:ppr_3b = RDFFR_PPz %0:ppr_3b, implicit $ffr $x0 = ADDSXrr $x0, $x0, implicit-def $nzcv PTEST_PP killed %0:ppr_3b, killed %1:ppr_3b, implicit-def $nzcv %2:gpr32 = COPY $wzr %3:gpr32 = CSINCWr killed %2, $wzr, 0, implicit $nzcv $w0 = COPY %3 RET_ReallyLR implicit $w0 ... --- name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_nzcv_flags_used_between tracksRegLiveness: true body: | bb.0: liveins: $ffr, $p0, $x0 ; CHECK-LABEL: name: fail_to_substitute_rdffr_pp_with_rdffrs_pp_nzcv_flags_used_between ; CHECK: liveins: $ffr, $p0, $x0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:ppr_3b = COPY $p0 ; CHECK-NEXT: $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv ; CHECK-NEXT: [[RDFFR_PPz:%[0-9]+]]:ppr_3b = RDFFR_PPz [[COPY]], implicit $ffr ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv ; CHECK-NEXT: PTEST_PP killed [[COPY]], killed [[RDFFR_PPz]], implicit-def $nzcv ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr ; CHECK-NEXT: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr killed [[COPY1]], $wzr, 0, implicit $nzcv ; CHECK-NEXT: $w0 = ORRWrs [[CSINCWr1]], [[CSINCWr]], 1 ; CHECK-NEXT: RET_ReallyLR implicit $w0 %0:ppr_3b = COPY $p0 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv %1:ppr_3b = RDFFR_PPz %0:ppr_3b, implicit $ffr %2:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv PTEST_PP killed %0:ppr_3b, killed %1:ppr_3b, implicit-def $nzcv %3:gpr32 = COPY $wzr %4:gpr32 = CSINCWr killed %3, $wzr, 0, implicit $nzcv $w0 = ORRWrs %4, %2, 1 RET_ReallyLR implicit $w0