# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s

# Test instruction sequences where PTEST is redundant and thus gets removed.
---
name:            whilelo_b8_s32
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b8_s32
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_B:%[0-9]+]]:ppr = WHILELO_PWW_B [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_B 31, implicit $vg
    %3:ppr = WHILELO_PWW_B %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b8_s64
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_b8_s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PXX_B:%[0-9]+]]:ppr = WHILELO_PXX_B [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr64 = COPY $x1
    %0:gpr64 = COPY $x0
    %2:ppr = PTRUE_B 31, implicit $vg
    %3:ppr = WHILELO_PXX_B %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b16_s32
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b16_s32
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_H:%[0-9]+]]:ppr = PTRUE_H 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_H:%[0-9]+]]:ppr = WHILELO_PWW_H [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_H 31, implicit $vg
    %4:ppr = WHILELO_PWW_H %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b16_s64
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_b16_s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[PTRUE_H:%[0-9]+]]:ppr = PTRUE_H 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PXX_H:%[0-9]+]]:ppr = WHILELO_PXX_H [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr64 = COPY $x1
    %0:gpr64 = COPY $x0
    %2:ppr = PTRUE_H 31, implicit $vg
    %4:ppr = WHILELO_PXX_H %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b32_s32
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b32_s32
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_S:%[0-9]+]]:ppr = PTRUE_S 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_S:%[0-9]+]]:ppr = WHILELO_PWW_S [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_S 31, implicit $vg
    %4:ppr = WHILELO_PWW_S %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b32_s64
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_b32_s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[PTRUE_S:%[0-9]+]]:ppr = PTRUE_S 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PXX_S:%[0-9]+]]:ppr = WHILELO_PXX_S [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr64 = COPY $x1
    %0:gpr64 = COPY $x0
    %2:ppr = PTRUE_S 31, implicit $vg
    %4:ppr = WHILELO_PXX_S %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b64_s32
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b64_s32
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_D:%[0-9]+]]:ppr = WHILELO_PWW_D [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_D 31, implicit $vg
    %4:ppr = WHILELO_PWW_D %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...
---
name:            whilelo_b64_s64
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_b64_s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PXX_D:%[0-9]+]]:ppr = WHILELO_PXX_D [[COPY1]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr64 = COPY $x1
    %0:gpr64 = COPY $x0
    %2:ppr = PTRUE_D 31, implicit $vg
    %4:ppr = WHILELO_PXX_D %0, %1, implicit-def dead $nzcv
    PTEST_PP %2, %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0

...

# PTEST is not redundant when it's Pg operand is not an all active predicate
# of element size matching the WHILELO, which is the implicitly predicate
# used by WHILE when calculating the condition codes.
---
name:            whilelo_b16_s32_keep_ptest_not_all_active
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b16_s32_keep_ptest_not_all_active
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_H:%[0-9]+]]:ppr = PTRUE_H 6, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_H:%[0-9]+]]:ppr = WHILELO_PWW_H [[COPY1]], [[COPY]], implicit-def dead $nzcv
    ; CHECK-NEXT: PTEST_PP killed [[PTRUE_H]], killed [[WHILELO_PWW_H]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_H 6, implicit $vg
    %3:ppr = WHILELO_PWW_H %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...

# PTEST is not redundant when it's Pg operand is not an all active predicate
# of element size matching the WHILELO, which is the implicitly predicate
# used by WHILE when calculating the condition codes.
---
name:            whilelo_b16_s32_keep_ptest_of_bytes
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b16_s32_keep_ptest_of_bytes
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_H:%[0-9]+]]:ppr = WHILELO_PWW_H [[COPY1]], [[COPY]], implicit-def dead $nzcv
    ; CHECK-NEXT: PTEST_PP killed [[PTRUE_B]], killed [[WHILELO_PWW_H]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_B 31, implicit $vg
    %3:ppr = WHILELO_PWW_H %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...

# PTEST is not redundant when it's Pg operand is not an all active predicate
# of element size matching the WHILELO, which is the implicitly predicate
# used by WHILE when calculating the condition codes.
---
name:            whilelo_b16_s32_keep_ptest_of_words
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b16_s32_keep_ptest_of_words
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_S:%[0-9]+]]:ppr = PTRUE_S 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_H:%[0-9]+]]:ppr = WHILELO_PWW_H [[COPY1]], [[COPY]], implicit-def dead $nzcv
    ; CHECK-NEXT: PTEST_PP killed [[PTRUE_S]], killed [[WHILELO_PWW_H]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_S 31, implicit $vg
    %3:ppr = WHILELO_PWW_H %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...

# PTEST is not redundant when it's Pg operand is not an all active predicate
# of element size matching the WHILELO, which is the implicitly predicate
# used by WHILE when calculating the condition codes.
---
name:            whilelo_b16_s32_keep_ptest_of_doublewords
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32 }
liveins:
  - { reg: '$w0', virtual-reg: '%0' }
  - { reg: '$w1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: whilelo_b16_s32_keep_ptest_of_doublewords
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_PWW_H:%[0-9]+]]:ppr = WHILELO_PWW_H [[COPY1]], [[COPY]], implicit-def dead $nzcv
    ; CHECK-NEXT: PTEST_PP killed [[PTRUE_D]], killed [[WHILELO_PWW_H]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %1:gpr32 = COPY $w1
    %0:gpr32 = COPY $w0
    %2:ppr = PTRUE_D 31, implicit $vg
    %3:ppr = WHILELO_PWW_H %0, %1, implicit-def dead $nzcv
    PTEST_PP killed %2, killed %3, implicit-def $nzcv
    %4:gpr32 = COPY $wzr
    %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
    $w0 = COPY %5
    RET_ReallyLR implicit $w0

...

# WHILELO (predicate pair)
---
name:            whilelo_x2_b64_s64
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr2mul2 }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_x2_b64_s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_2PXX_D:%[0-9]+]]:ppr2mul2 = WHILELO_2PXX_D [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub0
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub1
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY4]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:ppr = PTRUE_D 31, implicit $vg
    %3:ppr2mul2 = WHILELO_2PXX_D %0, %1, implicit-def $nzcv
    %4:ppr = COPY %3.psub0
    %5:ppr = COPY %3.psub1
    PTEST_PP_FIRST killed %2, killed %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0
...

# PTEST is not redundant when it's Pg operand is a subregister copy, but not
# from the first subregister of ppr2mul2
---
name:            whilelo_x2_b64_s64_psub1
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr2mul2 }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_x2_b64_s64_psub1
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_2PXX_D:%[0-9]+]]:ppr2mul2 = WHILELO_2PXX_D [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub0
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub1
    ; CHECK-NEXT: PTEST_PP_FIRST killed [[PTRUE_D]], killed [[COPY3]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY4]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:ppr = PTRUE_D 31, implicit $vg
    %3:ppr2mul2 = WHILELO_2PXX_D %0, %1, implicit-def $nzcv
    %4:ppr = COPY %3.psub0
    %5:ppr = COPY %3.psub1
    PTEST_PP_FIRST killed %2, killed %5, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0
...

# PTEST is not redundant when it's Pg operand is a copy from subregister 0
# if the condition is not FIRST_ACTIVE
---
name:            whilelo_x2_b64_s64_not_first
alignment:       2
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: ppr }
  - { id: 3, class: ppr2mul2 }
  - { id: 4, class: ppr }
  - { id: 5, class: ppr }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
liveins:
  - { reg: '$x0', virtual-reg: '%0' }
  - { reg: '$x1', virtual-reg: '%1' }
frameInfo:
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: whilelo_x2_b64_s64_not_first
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[PTRUE_D:%[0-9]+]]:ppr = PTRUE_D 31, implicit $vg
    ; CHECK-NEXT: [[WHILELO_2PXX_D:%[0-9]+]]:ppr2mul2 = WHILELO_2PXX_D [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub0
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:ppr = COPY [[WHILELO_2PXX_D]].psub1
    ; CHECK-NEXT: PTEST_PP killed [[PTRUE_D]], killed [[COPY2]], implicit-def $nzcv
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY $wzr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY4]], $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:ppr = PTRUE_D 31, implicit $vg
    %3:ppr2mul2 = WHILELO_2PXX_D %0, %1, implicit-def $nzcv
    %4:ppr = COPY %3.psub0
    %5:ppr = COPY %3.psub1
    PTEST_PP killed %2, killed %4, implicit-def $nzcv
    %6:gpr32 = COPY $wzr
    %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
    $w0 = COPY %7
    RET_ReallyLR implicit $w0
...