; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mattr=+sve2p1 -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mattr=+sve,+sme2 -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mattr=+sme2 -force-streaming -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mattr=+sme,+sve2p1 -force-streaming -verify-machineinstrs < %s | FileCheck %s target triple = "aarch64-linux-gnu" define @test_fclamp_f16( %a, %b, %c) { ; CHECK-LABEL: test_fclamp_f16: ; CHECK: // %bb.0: ; CHECK-NEXT: fclamp z0.h, z1.h, z2.h ; CHECK-NEXT: ret %res = call @llvm.aarch64.sve.fclamp.nxv8f16( %a, %b, %c) ret %res } define @test_fclamp_f32( %a, %b, %c) { ; CHECK-LABEL: test_fclamp_f32: ; CHECK: // %bb.0: ; CHECK-NEXT: fclamp z0.s, z1.s, z2.s ; CHECK-NEXT: ret %res = call @llvm.aarch64.sve.fclamp.nxv4f32( %a, %b, %c) ret %res } define @test_fclamp_f64( %a, %b, %c) { ; CHECK-LABEL: test_fclamp_f64: ; CHECK: // %bb.0: ; CHECK-NEXT: fclamp z0.d, z1.d, z2.d ; CHECK-NEXT: ret %res = call @llvm.aarch64.sve.fclamp.nxv2f64( %a, %b, %c) ret %res } declare @llvm.aarch64.sve.fclamp.nxv8f16(, , ) declare @llvm.aarch64.sve.fclamp.nxv4f32(, , ) declare @llvm.aarch64.sve.fclamp.nxv2f64(, , )