# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 # RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=amdgpu-prelegalizer-combiner %s -o - | FileCheck %s --- name: test_and_mask_hi_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_hi_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[UV1]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -4294967296 %2:_(s64) = G_AND %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_hi_lhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_hi_lhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[UV1]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -4294967296 %2:_(s64) = G_AND %1, %0 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_hi_48bit_mask_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_hi_48bit_mask_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65536 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C]] ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[AND]](s32), [[UV1]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -65536 %2:_(s64) = G_AND %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_hi_16bit_mask_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_hi_16bit_mask_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -281474976710656 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[AND]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -281474976710656 %2:_(s64) = G_AND %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_lo_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_lo_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[ZEXT]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 4294967295 %2:_(s64) = G_AND %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_lo_lhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_lo_lhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[ZEXT]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 4294967295 %2:_(s64) = G_AND %1, %0 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_lo_36bit_mask_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_lo_36bit_mask_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C]] ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[AND]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 68719476735 %2:_(s64) = G_AND %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_and_mask_hi_with_merge_unmerge tracksRegLiveness: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2 ; CHECK-LABEL: name: test_and_mask_hi_with_merge_unmerge ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: $sgpr0 = COPY [[C]](s32) ; CHECK-NEXT: $sgpr1 = COPY [[COPY]](s32) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0, implicit $sgpr1 %0:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr1 %2:_(s64) = G_MERGE_VALUES %0(s32), %1(s32) %3:_(s64) = G_CONSTANT i64 -4294967296 %4:_(s64) = G_AND %2, %3 %5:_(s32), %6:_(s32) = G_UNMERGE_VALUES %4(s64) $sgpr0 = COPY %5(s32) $sgpr1 = COPY %6(s32) SI_RETURN_TO_EPILOG implicit $sgpr0, implicit $sgpr1 ... --- name: negative_and_test_incorrect_types tracksRegLiveness: true body: | bb.0: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 ; CHECK-LABEL: name: negative_and_test_incorrect_types ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 -4294967296 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s128) = G_AND [[COPY]], [[C]] ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[AND]](s128) %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %1:_(s64) = COPY $vgpr4_vgpr5 %2:_(s128) = G_CONSTANT i128 -4294967296 %3:_(s128) = G_AND %0, %2 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 ... --- name: test_or_mask_hi_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_or_mask_hi_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[TRUNC]](s32), [[C]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -4294967296 %2:_(s64) = G_OR %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_or_mask_hi_lhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_or_mask_hi_lhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[TRUNC]](s32), [[C]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 -4294967296 %2:_(s64) = G_OR %1, %0 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_or_mask_lo_rhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_or_mask_lo_rhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[UV1]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 4294967295 %2:_(s64) = G_OR %0, %1 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_or_mask_lo_lhs tracksRegLiveness: true body: | bb.0: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-LABEL: name: test_or_mask_lo_lhs ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[UV1]](s32) ; CHECK-NEXT: $sgpr0_sgpr1 = COPY [[MV]](s64) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 %0:_(s64) = COPY $sgpr0_sgpr1 %1:_(s64) = G_CONSTANT i64 4294967295 %2:_(s64) = G_OR %1, %0 $sgpr0_sgpr1 = COPY %2(s64) SI_RETURN_TO_EPILOG implicit $sgpr0_sgpr1 ... --- name: test_or_mask_hi_with_merge_unmerge tracksRegLiveness: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2 ; CHECK-LABEL: name: test_or_mask_hi_with_merge_unmerge ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: $sgpr0 = COPY [[COPY]](s32) ; CHECK-NEXT: $sgpr1 = COPY [[C]](s32) ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0, implicit $sgpr1 %0:_(s32) = COPY $sgpr0 %1:_(s32) = COPY $sgpr1 %2:_(s64) = G_MERGE_VALUES %0(s32), %1(s32) %3:_(s64) = G_CONSTANT i64 -4294967296 %4:_(s64) = G_OR %2, %3 %5:_(s32), %6:_(s32) = G_UNMERGE_VALUES %4(s64) $sgpr0 = COPY %5(s32) $sgpr1 = COPY %6(s32) SI_RETURN_TO_EPILOG implicit $sgpr0, implicit $sgpr1 ... --- name: negative_or_test_incorrect_types tracksRegLiveness: true body: | bb.0: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 ; CHECK-LABEL: name: negative_or_test_incorrect_types ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 -4294967296 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s128) = G_OR [[COPY]], [[C]] ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[OR]](s128) %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %1:_(s64) = COPY $vgpr4_vgpr5 %2:_(s128) = G_CONSTANT i128 -4294967296 %3:_(s128) = G_OR %0, %2 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 ...