; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc -global-isel -new-reg-bank-select -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s @flat = external global i32, align 4 @global = external addrspace(1) global i32, align 4 @lds = addrspace(3) global i32 poison, align 4 @constant = external addrspace(4) constant i32, align 4 @buf = external addrspace(8) global i8 define ptr @global_value_as0_external() { ; GCN-LABEL: global_value_as0_external: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_getpc_b64 s[4:5] ; GCN-NEXT: s_add_u32 s4, s4, flat@gotpcrel32@lo+4 ; GCN-NEXT: s_addc_u32 s5, s5, flat@gotpcrel32@hi+12 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NEXT: v_mov_b32_e32 v1, s5 ; GCN-NEXT: s_setpc_b64 s[30:31] ret ptr @flat } define ptr addrspace(1) @global_value_as1_external() { ; GCN-LABEL: global_value_as1_external: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_getpc_b64 s[4:5] ; GCN-NEXT: s_add_u32 s4, s4, global@gotpcrel32@lo+4 ; GCN-NEXT: s_addc_u32 s5, s5, global@gotpcrel32@hi+12 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NEXT: v_mov_b32_e32 v1, s5 ; GCN-NEXT: s_setpc_b64 s[30:31] ret ptr addrspace(1) @global } define ptr addrspace(4) @global_value_as4_external() { ; GCN-LABEL: global_value_as4_external: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_getpc_b64 s[4:5] ; GCN-NEXT: s_add_u32 s4, s4, constant@gotpcrel32@lo+4 ; GCN-NEXT: s_addc_u32 s5, s5, constant@gotpcrel32@hi+12 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NEXT: v_mov_b32_e32 v1, s5 ; GCN-NEXT: s_setpc_b64 s[30:31] ret ptr addrspace(4) @constant } define amdgpu_kernel void @global_value_as3_lds_kernel(ptr addrspace(1) %out) { ; GCN-LABEL: global_value_as3_lds_kernel: ; GCN: ; %bb.0: ; GCN-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0 ; GCN-NEXT: v_mov_b32_e32 v0, 0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: global_store_dword v0, v0, s[0:1] ; GCN-NEXT: s_endpgm %addr = ptrtoint ptr addrspace(3) @lds to i32 store i32 %addr, ptr addrspace(1) %out ret void } define void @global_value_as8_buffer_store(i32 %val) { ; GCN-LABEL: global_value_as8_buffer_store: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_getpc_b64 s[8:9] ; GCN-NEXT: s_add_u32 s8, s8, buf@gotpcrel32@lo+4 ; GCN-NEXT: s_addc_u32 s9, s9, buf@gotpcrel32@hi+12 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) @buf, i32 0, i32 0, i32 0) ret void } define i32 @global_value_as8_buffer_load(i32 %offset) { ; GCN-LABEL: global_value_as8_buffer_load: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_getpc_b64 s[8:9] ; GCN-NEXT: s_add_u32 s8, s8, buf@gotpcrel32@lo+4 ; GCN-NEXT: s_addc_u32 s9, s9, buf@gotpcrel32@hi+12 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] %val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) @buf, i32 %offset, i32 0, i32 0) ret i32 %val } declare void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32, ptr addrspace(8) nocapture writeonly, i32, i32, i32 immarg) #0 declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) nocapture readonly, i32, i32, i32 immarg) #1 attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) } attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }