# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx700 -run-pass=instruction-select %s -o - | FileCheck -check-prefixes=GFX7 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx803 -run-pass=instruction-select %s -o - | FileCheck -check-prefixes=GF8 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select %s -o - | FileCheck -check-prefixes=GFX11 %s

---
name: test_copy_scc_vcc
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    ; GFX7-LABEL: name: test_copy_scc_vcc
    ; GFX7: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF
    ; GFX7-NEXT: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[DEF]], [[DEF]], implicit-def $scc
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX7-NEXT: $sgpr0 = COPY [[COPY]]
    ; GFX7-NEXT: S_ENDPGM 0, implicit $sgpr0
    ;
    ; GF8-LABEL: name: test_copy_scc_vcc
    ; GF8: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF
    ; GF8-NEXT: S_CMP_LG_U64 [[DEF]], 0, implicit-def $scc
    ; GF8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $scc
    ; GF8-NEXT: $sgpr0 = COPY [[COPY]]
    ; GF8-NEXT: S_ENDPGM 0, implicit $sgpr0
    ;
    ; GFX11-LABEL: name: test_copy_scc_vcc
    ; GFX11: [[DEF:%[0-9]+]]:sreg_32_xm0_xexec = IMPLICIT_DEF
    ; GFX11-NEXT: S_CMP_LG_U32 [[DEF]], 0, implicit-def $scc
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX11-NEXT: $sgpr0 = COPY [[COPY]]
    ; GFX11-NEXT: S_ENDPGM 0, implicit $sgpr0
    %0:vcc(s1) = G_IMPLICIT_DEF
    %1:sgpr(s32) = G_AMDGPU_COPY_SCC_VCC %0
    $sgpr0 = COPY %1
    S_ENDPGM 0, implicit $sgpr0
...