# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck -check-prefixes=CHECK,GFX8 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck -check-prefixes=CHECK,GFX11 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck -check-prefixes=CHECK,GFX12 %s

---
name: fexp2_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0
    ; CHECK-LABEL: name: fexp2_s
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
    ; CHECK-NEXT: [[FEXP2_:%[0-9]+]]:vgpr(s32) = G_FEXP2 [[COPY1]]
    ; CHECK-NEXT: [[AMDGPU_READANYLANE:%[0-9]+]]:sgpr(s32) = G_AMDGPU_READANYLANE [[FEXP2_]]
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = G_FEXP2 %0
...

---
name: fexp2_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: fexp2_v
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[FEXP2_:%[0-9]+]]:vgpr(s32) = G_FEXP2 [[COPY]]
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FEXP2 %0
...

---
name: amdgcn_exp2_s16_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0
    ; GFX8-LABEL: name: amdgcn_exp2_s16_s
    ; GFX8: liveins: $sgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX8-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)
    ; GFX8-NEXT: [[INT:%[0-9]+]]:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY1]](s16)
    ; GFX8-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[INT]](s16)
    ; GFX8-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    ;
    ; GFX11-LABEL: name: amdgcn_exp2_s16_s
    ; GFX11: liveins: $sgpr0
    ; GFX11-NEXT: {{  $}}
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)
    ; GFX11-NEXT: [[INT:%[0-9]+]]:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY1]](s16)
    ; GFX11-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[INT]](s16)
    ; GFX11-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    ;
    ; GFX12-LABEL: name: amdgcn_exp2_s16_s
    ; GFX12: liveins: $sgpr0
    ; GFX12-NEXT: {{  $}}
    ; GFX12-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
    ; GFX12-NEXT: [[INT:%[0-9]+]]:sgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[TRUNC]](s16)
    ; GFX12-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[INT]](s16)
    ; GFX12-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...

---
name: amdgcn_exp2_s16_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: amdgcn_exp2_s16_v
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[TRUNC]](s16)
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[INT]](s16)
    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...

---
name: amdgcn_exp2_s32_s
legalized: true

body: |
  bb.0:
    liveins: $sgpr0
    ; GFX8-LABEL: name: amdgcn_exp2_s32_s
    ; GFX8: liveins: $sgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
    ; GFX8-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY1]](s32)
    ; GFX8-NEXT: $vgpr0 = COPY [[INT]](s32)
    ;
    ; GFX11-LABEL: name: amdgcn_exp2_s32_s
    ; GFX11: liveins: $sgpr0
    ; GFX11-NEXT: {{  $}}
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
    ; GFX11-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY1]](s32)
    ; GFX11-NEXT: $vgpr0 = COPY [[INT]](s32)
    ;
    ; GFX12-LABEL: name: amdgcn_exp2_s32_s
    ; GFX12: liveins: $sgpr0
    ; GFX12-NEXT: {{  $}}
    ; GFX12-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
    ; GFX12-NEXT: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY]](s32)
    ; GFX12-NEXT: $vgpr0 = COPY [[INT]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %0
    $vgpr0 = COPY %1
...

---
name: amdgcn_exp2_s32_v
legalized: true

body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: amdgcn_exp2_s32_v
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %0
    $vgpr0 = COPY %1
...