# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass='amdgpu-regbankselect,amdgpu-regbanklegalize' %s -o - | FileCheck -check-prefixes=GCN,GFX9 %s # RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass='amdgpu-regbankselect,amdgpu-regbanklegalize' %s -o - | FileCheck -check-prefixes=GCN,GFX12 %s --- name: fsqrt_s16_s legalized: true body: | bb.0: liveins: $sgpr0 ; GFX9-LABEL: name: fsqrt_s16_s ; GFX9: liveins: $sgpr0 ; GFX9-NEXT: {{ $}} ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32) ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16) ; GFX9-NEXT: [[FSQRT:%[0-9]+]]:vgpr(s16) = G_FSQRT [[COPY1]] ; GFX9-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FSQRT]](s16) ; GFX9-NEXT: $vgpr0 = COPY [[ANYEXT]](s32) ; ; GFX12-LABEL: name: fsqrt_s16_s ; GFX12: liveins: $sgpr0 ; GFX12-NEXT: {{ $}} ; GFX12-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32) ; GFX12-NEXT: [[FSQRT:%[0-9]+]]:sgpr(s16) = G_FSQRT [[TRUNC]] ; GFX12-NEXT: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[FSQRT]](s16) ; GFX12-NEXT: $vgpr0 = COPY [[ANYEXT]](s32) %0:_(s32) = COPY $sgpr0 %1:_(s16) = G_TRUNC %0 %2:_(s16) = G_FSQRT %1 %3:_(s32) = G_ANYEXT %2 $vgpr0 = COPY %3 ... --- name: fsqrt_s16_v legalized: true body: | bb.0: liveins: $vgpr0 ; GCN-LABEL: name: fsqrt_s16_v ; GCN: liveins: $vgpr0 ; GCN-NEXT: {{ $}} ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GCN-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32) ; GCN-NEXT: [[FSQRT:%[0-9]+]]:vgpr(s16) = G_FSQRT [[TRUNC]] ; GCN-NEXT: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FSQRT]](s16) ; GCN-NEXT: $vgpr0 = COPY [[ANYEXT]](s32) %0:_(s32) = COPY $vgpr0 %1:_(s16) = G_TRUNC %0 %2:_(s16) = G_FSQRT %1 %3:_(s32) = G_ANYEXT %2 $vgpr0 = COPY %3 ...