# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW32 %s

# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s

---
name: s_or_b32__inline_imm__fi_offset0
tracksRegLiveness: true
stack:
  - { id: 0, size: 32, alignment: 16 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    ; MUBUFW64-LABEL: name: s_or_b32__inline_imm__fi_offset0
    ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
    ; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 12, killed $sgpr4, implicit-def $scc
    ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; MUBUFW32-LABEL: name: s_or_b32__inline_imm__fi_offset0
    ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
    ; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 12, killed $sgpr4, implicit-def $scc
    ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW64-LABEL: name: s_or_b32__inline_imm__fi_offset0
    ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW32-LABEL: name: s_or_b32__inline_imm__fi_offset0
    ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    renamable $sgpr7 = S_OR_B32 12, %stack.0, implicit-def $scc
    SI_RETURN implicit $sgpr7, implicit $scc

...

---
name: s_or_b32__literal__fi_offset96
tracksRegLiveness: true
stack:
  - { id: 0, size: 96, alignment: 16 }
  - { id: 1, size: 24, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    ; MUBUFW64-LABEL: name: s_or_b32__literal__fi_offset96
    ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 96, implicit-def $scc
    ; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
    ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; MUBUFW32-LABEL: name: s_or_b32__literal__fi_offset96
    ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
    ; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 96, implicit-def $scc
    ; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
    ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW64-LABEL: name: s_or_b32__literal__fi_offset96
    ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
    ; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW32-LABEL: name: s_or_b32__literal__fi_offset96
    ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
    ; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    renamable $sgpr7 = S_OR_B32 68, %stack.1, implicit-def $scc
    SI_RETURN implicit $sgpr7, implicit $scc

...

---
name: s_or_b32__sgpr__fi_literal_offset
tracksRegLiveness: true
stack:
  - { id: 0, size: 80, alignment: 16 }
  - { id: 1, size: 48, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr8
    ; MUBUFW64-LABEL: name: s_or_b32__sgpr__fi_literal_offset
    ; MUBUFW64: liveins: $sgpr8
    ; MUBUFW64-NEXT: {{  $}}
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
    ; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; MUBUFW32-LABEL: name: s_or_b32__sgpr__fi_literal_offset
    ; MUBUFW32: liveins: $sgpr8
    ; MUBUFW32-NEXT: {{  $}}
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
    ; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
    ; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW64-LABEL: name: s_or_b32__sgpr__fi_literal_offset
    ; FLATSCRW64: liveins: $sgpr8
    ; FLATSCRW64-NEXT: {{  $}}
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
    ; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW32-LABEL: name: s_or_b32__sgpr__fi_literal_offset
    ; FLATSCRW32: liveins: $sgpr8
    ; FLATSCRW32-NEXT: {{  $}}
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
    ; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    renamable $sgpr7 = S_OR_B32 $sgpr8, %stack.1, implicit-def $scc
    SI_RETURN implicit $sgpr7, implicit $scc

...

---
name: s_or_b32__sgpr__fi_inlineimm_offset
tracksRegLiveness: true
stack:
  - { id: 0, size: 32, alignment: 16 }
  - { id: 1, size: 48, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr8
    ; MUBUFW64-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
    ; MUBUFW64: liveins: $sgpr8
    ; MUBUFW64-NEXT: {{  $}}
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 32, implicit-def $scc
    ; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; MUBUFW32-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
    ; MUBUFW32: liveins: $sgpr8
    ; MUBUFW32-NEXT: {{  $}}
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
    ; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 32, implicit-def $scc
    ; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW64-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
    ; FLATSCRW64: liveins: $sgpr8
    ; FLATSCRW64-NEXT: {{  $}}
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 32, implicit-def $scc
    ; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW32-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
    ; FLATSCRW32: liveins: $sgpr8
    ; FLATSCRW32-NEXT: {{  $}}
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 32, implicit-def $scc
    ; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    renamable $sgpr7 = S_OR_B32 $sgpr8, %stack.1, implicit-def $scc
    SI_RETURN implicit $sgpr7, implicit $scc

...

---
name: s_and_b32__sgpr__fi_literal_offset
tracksRegLiveness: true
stack:
  - { id: 0, size: 80, alignment: 16 }
  - { id: 1, size: 48, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr8
    ; MUBUFW64-LABEL: name: s_and_b32__sgpr__fi_literal_offset
    ; MUBUFW64: liveins: $sgpr8
    ; MUBUFW64-NEXT: {{  $}}
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
    ; MUBUFW64-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; MUBUFW32-LABEL: name: s_and_b32__sgpr__fi_literal_offset
    ; MUBUFW32: liveins: $sgpr8
    ; MUBUFW32-NEXT: {{  $}}
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
    ; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
    ; MUBUFW32-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW64-LABEL: name: s_and_b32__sgpr__fi_literal_offset
    ; FLATSCRW64: liveins: $sgpr8
    ; FLATSCRW64-NEXT: {{  $}}
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
    ; FLATSCRW64-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    ;
    ; FLATSCRW32-LABEL: name: s_and_b32__sgpr__fi_literal_offset
    ; FLATSCRW32: liveins: $sgpr8
    ; FLATSCRW32-NEXT: {{  $}}
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
    ; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
    ; FLATSCRW32-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
    renamable $sgpr7 = S_AND_B32 $sgpr8, %stack.1, implicit-def $scc
    SI_RETURN implicit $sgpr7, implicit $scc

...