# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s
# RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUF %s

---
# S_CSELECT_B32 with a frame index true-operand, preceded immediately by
# S_AND_B64 which produces SCC. The frame index has a non-zero offset so
# the ADDC path applies. Verify ADDC+BITCMP1+BITSET0 is generated.
name: s_cselect_b32_fi_after_scc_producer
tracksRegLiveness: true
stack:
  - { id: 0, size: 64, alignment: 4 }
  - { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr4, $sgpr5, $sgpr6

    ; S_AND_B64 produces SCC. The regscavenger backward scan from S_CSELECT_B32
    ; will call stepBackward on S_AND_B64, removing SCC from liveness. Without
    ; the fix, RS->isRegUsed(SCC) returns false -> NeedSaveSCC=false -> plain
    ; S_ADD_I32 is inserted before S_CSELECT_B32 -> SCC clobbered -> wrong result.
    ; FLATSCRW64-LABEL: name: s_cselect_b32_fi_after_scc_producer
    ; FLATSCRW64: liveins: $sgpr4, $sgpr5, $sgpr6
    ; FLATSCRW64-NEXT: {{  $}}
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; FLATSCRW64-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; FLATSCRW64-NEXT: $sgpr5 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
    ; FLATSCRW64-NEXT: S_BITCMP1_B32 $sgpr5, 0, implicit-def $scc
    ; FLATSCRW64-NEXT: $sgpr5 = S_BITSET0_B32 0, $sgpr5
    ; FLATSCRW64-NEXT: renamable $sgpr4 = S_CSELECT_B32 killed $sgpr5, $sgpr6, implicit $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr4
    ;
    ; FLATSCRW32-LABEL: name: s_cselect_b32_fi_after_scc_producer
    ; FLATSCRW32: liveins: $sgpr4, $sgpr5, $sgpr6
    ; FLATSCRW32-NEXT: {{  $}}
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; FLATSCRW32-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; FLATSCRW32-NEXT: $sgpr5 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
    ; FLATSCRW32-NEXT: S_BITCMP1_B32 $sgpr5, 0, implicit-def $scc
    ; FLATSCRW32-NEXT: $sgpr5 = S_BITSET0_B32 0, $sgpr5
    ; FLATSCRW32-NEXT: renamable $sgpr4 = S_CSELECT_B32 killed $sgpr5, $sgpr6, implicit $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr4
    ;
    ; MUBUF-LABEL: name: s_cselect_b32_fi_after_scc_producer
    ; MUBUF: liveins: $sgpr4, $sgpr5, $sgpr6
    ; MUBUF-NEXT: {{  $}}
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; MUBUF-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; MUBUF-NEXT: $sgpr5 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUF-NEXT: $sgpr5 = S_ADD_I32 killed $sgpr5, 64, implicit-def $scc
    ; MUBUF-NEXT: renamable $sgpr4 = S_CSELECT_B32 killed $sgpr5, $sgpr6, implicit $scc
    ; MUBUF-NEXT: SI_RETURN implicit $sgpr4
    renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; %stack.1 is at offset 64 from frame base (non-zero), so eliminateFrameIndex
    ; cannot use the trivial FrameReg-only path.  Verify it uses ADDC+BITCMP1+BITSET0.
    renamable $sgpr4 = S_CSELECT_B32 %stack.1, $sgpr6, implicit $scc
    SI_RETURN implicit $sgpr4

...
---
# S_ADDC_U32 with a frame index source-operand, preceded by S_AND_B64 which
# produces SCC. S_ADDC_U32 reads SCC, so frame index elimination must use the
# ADDC+BITCMP1+BITSET0 sequence to preserve the incoming SCC value.
name: s_addc_u32_fi_after_and_scc_producer
tracksRegLiveness: true
stack:
  - { id: 0, size: 64, alignment: 4 }
  - { id: 1, size: 4, alignment: 4 }
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr4, $sgpr5, $sgpr6

    ; S_AND_B64 produces SCC. S_ADDC_U32 has a frame index source operand and
    ; reads SCC (implicit $scc), so frame index elimination must preserve SCC
    ; using ADDC+BITCMP1+BITSET0 before expanding the frame index.
    ; FLATSCRW64-LABEL: name: s_addc_u32_fi_after_and_scc_producer
    ; FLATSCRW64: liveins: $sgpr4, $sgpr5, $sgpr6
    ; FLATSCRW64-NEXT: {{  $}}
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; FLATSCRW64-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; FLATSCRW64-NEXT: $sgpr5 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
    ; FLATSCRW64-NEXT: S_BITCMP1_B32 $sgpr5, 0, implicit-def $scc
    ; FLATSCRW64-NEXT: $sgpr5 = S_BITSET0_B32 0, $sgpr5
    ; FLATSCRW64-NEXT: renamable $sgpr4 = S_ADDC_U32 killed $sgpr5, $sgpr6, implicit-def $scc, implicit $scc
    ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr4
    ;
    ; FLATSCRW32-LABEL: name: s_addc_u32_fi_after_and_scc_producer
    ; FLATSCRW32: liveins: $sgpr4, $sgpr5, $sgpr6
    ; FLATSCRW32-NEXT: {{  $}}
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; FLATSCRW32-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; FLATSCRW32-NEXT: $sgpr5 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
    ; FLATSCRW32-NEXT: S_BITCMP1_B32 $sgpr5, 0, implicit-def $scc
    ; FLATSCRW32-NEXT: $sgpr5 = S_BITSET0_B32 0, $sgpr5
    ; FLATSCRW32-NEXT: renamable $sgpr4 = S_ADDC_U32 killed $sgpr5, $sgpr6, implicit-def $scc, implicit $scc
    ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr4
    ;
    ; MUBUF-LABEL: name: s_addc_u32_fi_after_and_scc_producer
    ; MUBUF: liveins: $sgpr4, $sgpr5, $sgpr6
    ; MUBUF-NEXT: {{  $}}
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
    ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
    ; MUBUF-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    ; MUBUF-NEXT: $sgpr5 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
    ; MUBUF-NEXT: $sgpr5 = S_ADD_I32 killed $sgpr5, 64, implicit-def $scc
    ; MUBUF-NEXT: renamable $sgpr4 = S_ADDC_U32 killed $sgpr5, $sgpr6, implicit-def $scc, implicit $scc
    ; MUBUF-NEXT: SI_RETURN implicit $sgpr4
    renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
    renamable $sgpr4 = S_ADDC_U32 %stack.1, $sgpr6, implicit-def $scc, implicit $scc
    SI_RETURN implicit $sgpr4

...