; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_setreg_imm32_b32" --version 6
; RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-SDAG
; RUN: llc < %s -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 | FileCheck %s -check-prefixes=GCN,GFX12,GFX12-GISEL
; RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-SDAG
; RUN: llc < %s -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefixes=GCN,GFX1250,GFX1250-GISEL

declare float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data)
declare float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data)

define amdgpu_cs void @flat_atomic_fmin_num_f32_noret(ptr %ptr, float %data) {
; GCN-LABEL: flat_atomic_fmin_num_f32_noret:
; GCN:  ; %bb.0:
; GCN:    flat_atomic_min_num_f32 v[0:1], v2
; GCN:    s_endpgm
  %ret = call float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data)
  ret void
}

define amdgpu_cs void @flat_atomic_fmax_num_f32_noret(ptr %ptr, float %data) {
; GCN-LABEL: flat_atomic_fmax_num_f32_noret:
; GCN:  ; %bb.0:
; GCN:    flat_atomic_max_num_f32 v[0:1], v2
; GCN:    s_endpgm
  %ret = call float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data)
  ret void
}

define amdgpu_cs float @flat_atomic_fmin_num_f32_rtn(float %data, ptr %ptr) {
; GFX12-LABEL: flat_atomic_fmin_num_f32_rtn:
; GFX12:  ; %bb.0:
; GFX12:    flat_atomic_min_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12:    s_wait_loadcnt_dscnt 0x0
; GFX12:    ; return to shader part epilog
;
; GFX1250-SDAG-LABEL: flat_atomic_fmin_num_f32_rtn:
; GFX1250-SDAG:  ; %bb.0:
; GFX1250-SDAG:    v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v1
; GFX1250-SDAG:    flat_atomic_min_num_f32 v0, v[2:3], v0 th:TH_ATOMIC_RETURN
; GFX1250-SDAG:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG:    ; return to shader part epilog
;
; GFX1250-GISEL-LABEL: flat_atomic_fmin_num_f32_rtn:
; GFX1250-GISEL:  ; %bb.0:
; GFX1250-GISEL:    v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v2
; GFX1250-GISEL:    flat_atomic_min_num_f32 v0, v[4:5], v0 th:TH_ATOMIC_RETURN
; GFX1250-GISEL:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL:    ; return to shader part epilog
  %ret = call float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data)
  ret float %ret
}

define amdgpu_cs float @flat_atomic_fmax_num_f32_rtn(float %data, ptr %ptr) {
; GFX12-LABEL: flat_atomic_fmax_num_f32_rtn:
; GFX12:  ; %bb.0:
; GFX12:    flat_atomic_max_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12:    s_wait_loadcnt_dscnt 0x0
; GFX12:    ; return to shader part epilog
;
; GFX1250-SDAG-LABEL: flat_atomic_fmax_num_f32_rtn:
; GFX1250-SDAG:  ; %bb.0:
; GFX1250-SDAG:    v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v1
; GFX1250-SDAG:    flat_atomic_max_num_f32 v0, v[2:3], v0 th:TH_ATOMIC_RETURN
; GFX1250-SDAG:    s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG:    ; return to shader part epilog
;
; GFX1250-GISEL-LABEL: flat_atomic_fmax_num_f32_rtn:
; GFX1250-GISEL:  ; %bb.0:
; GFX1250-GISEL:    v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v2
; GFX1250-GISEL:    flat_atomic_max_num_f32 v0, v[4:5], v0 th:TH_ATOMIC_RETURN
; GFX1250-GISEL:    s_wait_loadcnt_dscnt 0x0
; GFX1250-GISEL:    ; return to shader part epilog
  %ret = call float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data)
  ret float %ret
}

define amdgpu_ps void @flat_atomic_fmin_num_f32_noret_saddr(ptr inreg %ptr, float %data) {
; GFX12-SDAG-LABEL: flat_atomic_fmin_num_f32_noret_saddr:
; GFX12-SDAG:  ; %bb.0:
; GFX12-SDAG:    v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1
; GFX12-SDAG:    flat_atomic_min_num_f32 v[1:2], v0
; GFX12-SDAG:    s_endpgm
;
; GFX12-GISEL-LABEL: flat_atomic_fmin_num_f32_noret_saddr:
; GFX12-GISEL:  ; %bb.0:
; GFX12-GISEL:    v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
; GFX12-GISEL:    flat_atomic_min_num_f32 v[1:2], v0
; GFX12-GISEL:    s_endpgm
;
; GFX1250-LABEL: flat_atomic_fmin_num_f32_noret_saddr:
; GFX1250:  ; %bb.0:
; GFX1250:    v_mov_b32_e32 v1, 0
; GFX1250:    flat_atomic_min_num_f32 v1, v0, s[0:1]
; GFX1250:    s_endpgm
  %ret = call float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data)
  ret void
}

define amdgpu_ps void @flat_atomic_fmax_num_f32_noret_saddr(ptr inreg %ptr, float %data) {
; GFX12-SDAG-LABEL: flat_atomic_fmax_num_f32_noret_saddr:
; GFX12-SDAG:  ; %bb.0:
; GFX12-SDAG:    v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1
; GFX12-SDAG:    flat_atomic_max_num_f32 v[1:2], v0
; GFX12-SDAG:    s_endpgm
;
; GFX12-GISEL-LABEL: flat_atomic_fmax_num_f32_noret_saddr:
; GFX12-GISEL:  ; %bb.0:
; GFX12-GISEL:    v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
; GFX12-GISEL:    flat_atomic_max_num_f32 v[1:2], v0
; GFX12-GISEL:    s_endpgm
;
; GFX1250-LABEL: flat_atomic_fmax_num_f32_noret_saddr:
; GFX1250:  ; %bb.0:
; GFX1250:    v_mov_b32_e32 v1, 0
; GFX1250:    flat_atomic_max_num_f32 v1, v0, s[0:1]
; GFX1250:    s_endpgm
  %ret = call float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data)
  ret void
}

define amdgpu_ps float @flat_atomic_fmin_num_f32_rtn_saddr(ptr inreg %ptr, float %data) {
; GFX12-SDAG-LABEL: flat_atomic_fmin_num_f32_rtn_saddr:
; GFX12-SDAG:  ; %bb.0:
; GFX12-SDAG:    v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1
; GFX12-SDAG:    flat_atomic_min_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12-SDAG:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: flat_atomic_fmin_num_f32_rtn_saddr:
; GFX12-GISEL:  ; %bb.0:
; GFX12-GISEL:    v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
; GFX12-GISEL:    flat_atomic_min_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12-GISEL:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL:    ; return to shader part epilog
;
; GFX1250-LABEL: flat_atomic_fmin_num_f32_rtn_saddr:
; GFX1250:  ; %bb.0:
; GFX1250:    v_mov_b32_e32 v1, 0
; GFX1250:    flat_atomic_min_num_f32 v0, v1, v0, s[0:1] th:TH_ATOMIC_RETURN
; GFX1250:    s_wait_loadcnt_dscnt 0x0
; GFX1250:    ; return to shader part epilog
  %ret = call float @llvm.amdgcn.flat.atomic.fmin.num.f32.p1.f32(ptr %ptr, float %data)
  ret float %ret
}

define amdgpu_ps float @flat_atomic_fmax_num_f32_rtn_saddr(ptr inreg %ptr, float %data) {
; GFX12-SDAG-LABEL: flat_atomic_fmax_num_f32_rtn_saddr:
; GFX12-SDAG:  ; %bb.0:
; GFX12-SDAG:    v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1
; GFX12-SDAG:    flat_atomic_max_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12-SDAG:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: flat_atomic_fmax_num_f32_rtn_saddr:
; GFX12-GISEL:  ; %bb.0:
; GFX12-GISEL:    v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
; GFX12-GISEL:    flat_atomic_max_num_f32 v0, v[1:2], v0 th:TH_ATOMIC_RETURN
; GFX12-GISEL:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL:    ; return to shader part epilog
;
; GFX1250-LABEL: flat_atomic_fmax_num_f32_rtn_saddr:
; GFX1250:  ; %bb.0:
; GFX1250:    v_mov_b32_e32 v1, 0
; GFX1250:    flat_atomic_max_num_f32 v0, v1, v0, s[0:1] th:TH_ATOMIC_RETURN
; GFX1250:    s_wait_loadcnt_dscnt 0x0
; GFX1250:    ; return to shader part epilog
  %ret = call float @llvm.amdgcn.flat.atomic.fmax.num.f32.p1.f32(ptr %ptr, float %data)
  ret float %ret
}