; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals smart
; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes=amdgpu-lower-kernel-attributes,instcombine,infer-alignment %s | FileCheck -check-prefix=GCN %s

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_local_size_x(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_local_size_x(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_LOCAL_SIZE:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 12
; GCN-NEXT:    [[LOCAL_SIZE:%.*]] = load i16, ptr addrspace(4) [[GEP_LOCAL_SIZE]], align 4
; GCN-NEXT:    store i16 [[LOCAL_SIZE]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %group.id = tail call i32 @llvm.amdgcn.workgroup.id.x()
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %block.count.x = load i32, ptr addrspace(4) %implicitarg.ptr, align 4
  %cmp.id.count = icmp ult i32 %group.id, %block.count.x
  %local.size.offset = select i1 %cmp.id.count, i64 12, i64 18
  %gep.local.size = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 %local.size.offset
  %local.size = load i16, ptr addrspace(4) %gep.local.size, align 2
  store i16 %local.size, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_local_size_y(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_local_size_y(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_LOCAL_SIZE:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 14
; GCN-NEXT:    [[LOCAL_SIZE:%.*]] = load i16, ptr addrspace(4) [[GEP_LOCAL_SIZE]], align 2
; GCN-NEXT:    store i16 [[LOCAL_SIZE]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %group.id = tail call i32 @llvm.amdgcn.workgroup.id.y()
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.block.count.y = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 4
  %block.count.y = load i32, ptr addrspace(4) %gep.block.count.y, align 4
  %cmp.id.count = icmp ult i32 %group.id, %block.count.y
  %local.size.offset = select i1 %cmp.id.count, i64 14, i64 20
  %gep.local.size = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 %local.size.offset
  %local.size = load i16, ptr addrspace(4) %gep.local.size, align 2
  store i16 %local.size, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_local_size_z(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_local_size_z(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_LOCAL_SIZE:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 16
; GCN-NEXT:    [[LOCAL_SIZE:%.*]] = load i16, ptr addrspace(4) [[GEP_LOCAL_SIZE]], align 4
; GCN-NEXT:    store i16 [[LOCAL_SIZE]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %group.id = tail call i32 @llvm.amdgcn.workgroup.id.z()
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.block.count.z = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 8
  %block.count.z = load i32, ptr addrspace(4) %gep.block.count.z, align 4
  %cmp.id.count = icmp ult i32 %group.id, %block.count.z
  %local.size.offset = select i1 %cmp.id.count, i64 16, i64 22
  %gep.local.size = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 %local.size.offset
  %local.size = load i16, ptr addrspace(4) %gep.local.size, align 2
  store i16 %local.size, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_x(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_x(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 18
; GCN-NEXT:    [[REMAINDER_X:%.*]] = load i16, ptr addrspace(4) [[GEP_X]], align 2, !range [[RNG1:![0-9]+]]
; GCN-NEXT:    store i16 [[REMAINDER_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 18
  %remainder.x = load i16, ptr addrspace(4) %gep.x, align 2
  store i16 %remainder.x, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_y(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_y(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_Y:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 20
; GCN-NEXT:    [[REMAINDER_Y:%.*]] = load i16, ptr addrspace(4) [[GEP_Y]], align 4, !range [[RNG1]]
; GCN-NEXT:    store i16 [[REMAINDER_Y]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.y = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 20
  %remainder.y = load i16, ptr addrspace(4) %gep.y, align 2
  store i16 %remainder.y, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_z(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_z(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_Z:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 22
; GCN-NEXT:    [[REMAINDER_Z:%.*]] = load i16, ptr addrspace(4) [[GEP_Z]], align 2, !range [[RNG1]]
; GCN-NEXT:    store i16 [[REMAINDER_Z]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.z = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 22
  %remainder.z = load i16, ptr addrspace(4) %gep.z, align 2
  store i16 %remainder.z, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_x_uniform(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_remainder_x_uniform(
; GCN-NEXT:    store i16 0, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 18
  %remainder.x = load i16, ptr addrspace(4) %gep.x, align 2
  store i16 %remainder.x, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_y_uniform(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_remainder_y_uniform(
; GCN-NEXT:    store i16 0, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.y = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 20
  %remainder.y = load i16, ptr addrspace(4) %gep.y, align 2
  store i16 %remainder.y, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_z_uniform(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_remainder_z_uniform(
; GCN-NEXT:    store i16 0, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.z = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 22
  %remainder.z = load i16, ptr addrspace(4) %gep.z, align 2
  store i16 %remainder.z, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_x(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_work_group_size_x(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 12
; GCN-NEXT:    [[GROUP_SIZE_X:%.*]] = load i16, ptr addrspace(4) [[GEP_X]], align 4, !range [[RNG2:![0-9]+]]
; GCN-NEXT:    store i16 [[GROUP_SIZE_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 12
  %group.size.x = load i16, ptr addrspace(4) %gep.x, align 2
  store i16 %group.size.x, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_y(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_work_group_size_y(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_Y:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 14
; GCN-NEXT:    [[GROUP_SIZE_Y:%.*]] = load i16, ptr addrspace(4) [[GEP_Y]], align 2, !range [[RNG2]]
; GCN-NEXT:    store i16 [[GROUP_SIZE_Y]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.y = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 14
  %group.size.y = load i16, ptr addrspace(4) %gep.y, align 2
  store i16 %group.size.y, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_z(ptr addrspace(1) %out) #0 {
; GCN-LABEL: @get_work_group_size_z(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_Z:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 16
; GCN-NEXT:    [[GROUP_SIZE_Z:%.*]] = load i16, ptr addrspace(4) [[GEP_Z]], align 4, !range [[RNG2]]
; GCN-NEXT:    store i16 [[GROUP_SIZE_Z]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.z = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 16
  %group.size.z = load i16, ptr addrspace(4) %gep.z, align 2
  store i16 %group.size.z, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_x_reqd(ptr addrspace(1) %out) #0 !reqd_work_group_size !0 {
; GCN-LABEL: @get_work_group_size_x_reqd(
; GCN-NEXT:    store i16 8, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 12
  %group.size.x = load i16, ptr addrspace(4) %gep.x, align 2
  store i16 %group.size.x, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_y_reqd(ptr addrspace(1) %out) #0 !reqd_work_group_size !0 {
; GCN-LABEL: @get_work_group_size_y_reqd(
; GCN-NEXT:    store i16 16, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.y = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 14
  %group.size.y = load i16, ptr addrspace(4) %gep.y, align 2
  store i16 %group.size.y, ptr addrspace(1) %out
  ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn
define amdgpu_kernel void @get_work_group_size_z_reqd(ptr addrspace(1) %out) #0 !reqd_work_group_size !0 {
; GCN-LABEL: @get_work_group_size_z_reqd(
; GCN-NEXT:    store i16 2, ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.z = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 16
  %group.size.z = load i16, ptr addrspace(4) %gep.z, align 2
  store i16 %group.size.z, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_x_wrong_type(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_x_wrong_type(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 18
; GCN-NEXT:    [[REMAINDER_X:%.*]] = load half, ptr addrspace(4) [[GEP_X]], align 2
; GCN-NEXT:    store half [[REMAINDER_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 18
  %remainder.x = load half, ptr addrspace(4) %gep.x, align 2
  store half %remainder.x, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_y_wrong_type(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_y_wrong_type(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 20
; GCN-NEXT:    [[REMAINDER_X:%.*]] = load half, ptr addrspace(4) [[GEP_X]], align 4
; GCN-NEXT:    store half [[REMAINDER_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 20
  %remainder.x = load half, ptr addrspace(4) %gep.x, align 2
  store half %remainder.x, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_z_wrong_type(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_z_wrong_type(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 22
; GCN-NEXT:    [[REMAINDER_X:%.*]] = load half, ptr addrspace(4) [[GEP_X]], align 2
; GCN-NEXT:    store half [[REMAINDER_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 22
  %remainder.x = load half, ptr addrspace(4) %gep.x, align 2
  store half %remainder.x, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @get_remainder_x_existing_range(ptr addrspace(1) %out) #2 {
; GCN-LABEL: @get_remainder_x_existing_range(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_X:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 18
; GCN-NEXT:    [[REMAINDER_X:%.*]] = load i16, ptr addrspace(4) [[GEP_X]], align 2, !range [[RNG4:![0-9]+]]
; GCN-NEXT:    store i16 [[REMAINDER_X]], ptr addrspace(1) [[OUT:%.*]], align 2
; GCN-NEXT:    ret void
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.x = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 18
  %remainder.x = load i16, ptr addrspace(4) %gep.x, align 2, !range !{i16 0, i16 10}
  store i16 %remainder.x, ptr addrspace(1) %out
  ret void
}

define i16 @get_grid_dims_i16() #2 {
; GCN-LABEL: @get_grid_dims_i16(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i16, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4, !range [[RNG5:![0-9]+]]
; GCN-NEXT:    ret i16 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

; Ignore wrong type
define half @get_grid_dims_f16() #2 {
; GCN-half: @get_grid_dims_i16(
; GCN-LABEL: @get_grid_dims_f16(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load half, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4
; GCN-NEXT:    ret half [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load half, ptr addrspace(4) %gep.grid.dims, align 2
  ret half %grid.dims
}

; Undersized, OK
define i8 @get_grid_dims_i8() #2 {
; GCN-LABEL: @get_grid_dims_i8(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i8, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4, !range [[RNG6:![0-9]+]]
; GCN-NEXT:    ret i8 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i8, ptr addrspace(4) %gep.grid.dims, align 2
  ret i8 %grid.dims
}

define i1 @get_grid_dims_i1() #2 {
; GCN-LABEL: @get_grid_dims_i1(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i1, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4
; GCN-NEXT:    ret i1 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i1, ptr addrspace(4) %gep.grid.dims, align 1
  ret i1 %grid.dims
}

; Undersized, theoretically ok but would require special case
; construction of the wrapped range.
define i2 @get_grid_dims_i2() #2 {
; GCN-LABEL: @get_grid_dims_i2(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i2, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4
; GCN-NEXT:    ret i2 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i2, ptr addrspace(4) %gep.grid.dims, align 1
  ret i2 %grid.dims
}

define i3 @get_grid_dims_i3() #2 {
; GCN-LABEL: @get_grid_dims_i3(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i3, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4, !range [[RNG7:![0-9]+]]
; GCN-NEXT:    ret i3 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i3, ptr addrspace(4) %gep.grid.dims, align 1
  ret i3 %grid.dims
}

; Oversized, ignore
define i32 @get_grid_dims_i32() #2 {
; GCN-LABEL: @get_grid_dims_i32(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i32, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4
; GCN-NEXT:    ret i32 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i32, ptr addrspace(4) %gep.grid.dims, align 2
  ret i32 %grid.dims
}

define i16 @get_grid_dims_reqd_work_group_size_1d() #2 !reqd_work_group_size !2 {
; GCN-LABEL: @get_grid_dims_reqd_work_group_size_1d(
; GCN-NEXT:    ret i16 1
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

define i16 @get_grid_dims_reqd_work_group_size_2d() #2 !reqd_work_group_size !3 {
; GCN-LABEL: @get_grid_dims_reqd_work_group_size_2d(
; GCN-NEXT:    ret i16 2
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

define i16 @get_grid_dims_reqd_work_group_size_2d_weird() #2 !reqd_work_group_size !5 {
; GCN-LABEL: @get_grid_dims_reqd_work_group_size_2d_weird(
; GCN-NEXT:    ret i16 2
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

define i16 @get_grid_dims_reqd_work_group_size_3d() #2 !reqd_work_group_size !0 {
; GCN-LABEL: @get_grid_dims_reqd_work_group_size_3d(
; GCN-NEXT:    ret i16 3
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

define i16 @get_grid_dims_reqd_work_group_size_3d_weird() #2 !reqd_work_group_size !4 {
; GCN-LABEL: @get_grid_dims_reqd_work_group_size_3d_weird(
; GCN-NEXT:    ret i16 3
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2
  ret i16 %grid.dims
}

define i1 @get_grid_dims_i1_reqd_work_group_size() #2 !reqd_work_group_size !3 {
; GCN-LABEL: @get_grid_dims_i1_reqd_work_group_size(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i1, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4
; GCN-NEXT:    ret i1 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i1, ptr addrspace(4) %gep.grid.dims, align 1
  ret i1 %grid.dims
}

define i16 @get_grid_dims_existing_range() #2 {
; GCN-LABEL: @get_grid_dims_existing_range(
; GCN-NEXT:    [[IMPLICITARG_PTR:%.*]] = tail call dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
; GCN-NEXT:    [[GEP_GRID_DIMS:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[IMPLICITARG_PTR]], i64 64
; GCN-NEXT:    [[GRID_DIMS:%.*]] = load i16, ptr addrspace(4) [[GEP_GRID_DIMS]], align 4, !range [[RNG12:![0-9]+]]
; GCN-NEXT:    ret i16 [[GRID_DIMS]]
;
  %implicitarg.ptr = tail call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
  %gep.grid.dims = getelementptr inbounds i8, ptr addrspace(4) %implicitarg.ptr, i64 64
  %grid.dims = load i16, ptr addrspace(4) %gep.grid.dims, align 2, !range !{i16 1, i16 2}
  ret i16 %grid.dims
}

declare ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr() #1
declare i32 @llvm.amdgcn.workgroup.id.x() #1
declare i32 @llvm.amdgcn.workgroup.id.y() #1
declare i32 @llvm.amdgcn.workgroup.id.z() #1

!llvm.module.flags = !{!1}

attributes #0 = { nounwind "uniform-work-group-size" }
attributes #1 = { nounwind readnone speculatable }
attributes #2 = { nounwind }
!0 = !{i32 8, i32 16, i32 2}
!1 = !{i32 1, !"amdhsa_code_object_version", i32 500}

!2 = !{i32 64, i32 1, i32 1}
!3 = !{i32 32, i32 4, i32 1}
!4 = !{i32 32, i32 1, i32 2}
!5 = !{i32 1, i32 32, i32 1}

;.
; GCN: [[RNG1]] = !{i16 0, i16 1024}
; GCN: [[RNG2]] = !{i16 1, i16 1025}
; GCN: [[RNG4]] = !{i16 0, i16 10}
; GCN: [[RNG5]] = !{i16 1, i16 4}
; GCN: [[RNG6]] = !{i8 1, i8 4}
; GCN: [[RNG7]] = !{i3 1, i3 -4}
; GCN: [[RNG12]] = !{i16 1, i16 2}
;.