; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 < %s 2>&1 | FileCheck -check-prefix=ERR %s
; RUN: not llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 < %s 2>&1 | FileCheck -check-prefix=ERR %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-GISEL %s

declare {<10 x i32>, <3 x float>, <3 x float>} @llvm.amdgcn.image.bvh.dual.intersect.ray(i64, float, i8, <3 x float>, <3 x float>, <2 x i32>, <4 x i32>)

; ERR: in function image_bvh_dual_intersect_ray{{.*}}intrinsic not supported on subtarget
define amdgpu_ps <10 x float> @image_bvh_dual_intersect_ray(i64 %node_ptr, float %ray_extent, float %ray_origin_x, float %ray_origin_y, float %ray_origin_z, float %ray_dir_x, float %ray_dir_y, float %ray_dir_z, <2 x i32> %offsets, <4 x i32> inreg %tdescr, ptr addrspace(1) %origin, ptr addrspace(1) %dir) {
; GFX12-SDAG-LABEL: image_bvh_dual_intersect_ray:
; GFX12-SDAG:       ; %bb.0: ; %main_body
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v22, v8 :: v_dual_mov_b32 v21, v7
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v20, v6 :: v_dual_mov_b32 v19, v5
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v17, v3
; GFX12-SDAG-NEXT:    v_mov_b32_e32 v3, 0
; GFX12-SDAG-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[0:1], v[2:3], v[17:19], v[20:22], v[9:10]], s[0:3]
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    global_store_b96 v[11:12], v[17:19], off
; GFX12-SDAG-NEXT:    global_store_b96 v[13:14], v[20:22], off
; GFX12-SDAG-NEXT:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: image_bvh_dual_intersect_ray:
; GFX12-GISEL:       ; %bb.0: ; %main_body
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v15, v3 :: v_dual_mov_b32 v16, v4
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v17, v5 :: v_dual_mov_b32 v18, v6
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v19, v7 :: v_dual_mov_b32 v20, v8
; GFX12-GISEL-NEXT:    v_mov_b32_e32 v3, 0
; GFX12-GISEL-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[0:1], v[2:3], v[15:17], v[18:20], v[9:10]], s[0:3]
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    global_store_b96 v[11:12], v[15:17], off
; GFX12-GISEL-NEXT:    global_store_b96 v[13:14], v[18:20], off
; GFX12-GISEL-NEXT:    ; return to shader part epilog
main_body:
  %ray_origin0 = insertelement <3 x float> poison, float %ray_origin_x, i32 0
  %ray_origin1 = insertelement <3 x float> %ray_origin0, float %ray_origin_y, i32 1
  %ray_origin = insertelement <3 x float> %ray_origin1, float %ray_origin_z, i32 2
  %ray_dir0 = insertelement <3 x float> poison, float %ray_dir_x, i32 0
  %ray_dir1 = insertelement <3 x float> %ray_dir0, float %ray_dir_y, i32 1
  %ray_dir = insertelement <3 x float> %ray_dir1, float %ray_dir_z, i32 2
  %v = call {<10 x i32>, <3 x float>, <3 x float>} @llvm.amdgcn.image.bvh.dual.intersect.ray(i64 %node_ptr, float %ray_extent, i8 0, <3 x float> %ray_origin, <3 x float> %ray_dir, <2 x i32> %offsets, <4 x i32> %tdescr)
  %a = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 0
  %r = bitcast <10 x i32> %a to <10 x float>
  %o = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 1
  store <3 x float> %o, ptr addrspace(1) %origin
  %d = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 2
  store <3 x float> %d, ptr addrspace(1) %dir
  ret <10 x float> %r
}

define amdgpu_ps <10 x float> @image_bvh_dual_intersect_ray_1(i64 %node_ptr, float %ray_extent, float %ray_origin_x, float %ray_origin_y, float %ray_origin_z, float %ray_dir_x, float %ray_dir_y, float %ray_dir_z, <2 x i32> %offsets, <4 x i32> inreg %tdescr, ptr addrspace(1) %origin, ptr addrspace(1) %dir) {
; GFX12-SDAG-LABEL: image_bvh_dual_intersect_ray_1:
; GFX12-SDAG:       ; %bb.0: ; %main_body
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v22, v8 :: v_dual_mov_b32 v21, v7
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v20, v6 :: v_dual_mov_b32 v19, v5
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v17, v3
; GFX12-SDAG-NEXT:    v_mov_b32_e32 v3, 1
; GFX12-SDAG-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[0:1], v[2:3], v[17:19], v[20:22], v[9:10]], s[0:3]
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    global_store_b96 v[11:12], v[17:19], off
; GFX12-SDAG-NEXT:    global_store_b96 v[13:14], v[20:22], off
; GFX12-SDAG-NEXT:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: image_bvh_dual_intersect_ray_1:
; GFX12-GISEL:       ; %bb.0: ; %main_body
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v15, v3 :: v_dual_mov_b32 v16, v4
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v17, v5 :: v_dual_mov_b32 v18, v6
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v19, v7 :: v_dual_mov_b32 v20, v8
; GFX12-GISEL-NEXT:    v_mov_b32_e32 v3, 1
; GFX12-GISEL-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[0:1], v[2:3], v[15:17], v[18:20], v[9:10]], s[0:3]
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    global_store_b96 v[11:12], v[15:17], off
; GFX12-GISEL-NEXT:    global_store_b96 v[13:14], v[18:20], off
; GFX12-GISEL-NEXT:    ; return to shader part epilog
main_body:
  %ray_origin0 = insertelement <3 x float> poison, float %ray_origin_x, i32 0
  %ray_origin1 = insertelement <3 x float> %ray_origin0, float %ray_origin_y, i32 1
  %ray_origin = insertelement <3 x float> %ray_origin1, float %ray_origin_z, i32 2
  %ray_dir0 = insertelement <3 x float> poison, float %ray_dir_x, i32 0
  %ray_dir1 = insertelement <3 x float> %ray_dir0, float %ray_dir_y, i32 1
  %ray_dir = insertelement <3 x float> %ray_dir1, float %ray_dir_z, i32 2
  %v = call {<10 x i32>, <3 x float>, <3 x float>} @llvm.amdgcn.image.bvh.dual.intersect.ray(i64 %node_ptr, float %ray_extent, i8 1, <3 x float> %ray_origin, <3 x float> %ray_dir, <2 x i32> %offsets, <4 x i32> %tdescr)
  %a = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 0
  %r = bitcast <10 x i32> %a to <10 x float>
  %o = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 1
  store <3 x float> %o, ptr addrspace(1) %origin
  %d = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 2
  store <3 x float> %d, ptr addrspace(1) %dir
  ret <10 x float> %r
}

define amdgpu_ps <10 x float> @image_bvh_dual_intersect_ray_ssssss(i64 inreg %node_ptr, float inreg %ray_extent, <3 x float> inreg %ray_origin, <3 x float> inreg %ray_dir, <2 x i32> inreg %offsets, <4 x i32> inreg %tdescr, ptr addrspace(1) %origin, ptr addrspace(1) %dir) {
; GFX12-SDAG-LABEL: image_bvh_dual_intersect_ray_ssssss:
; GFX12-SDAG:       ; %bb.0:
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v14, s6 :: v_dual_mov_b32 v15, s7
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v16, s8 :: v_dual_mov_b32 v17, s3
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v0, s9 :: v_dual_mov_b32 v1, s10
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v5, 0
; GFX12-SDAG-NEXT:    s_mov_b32 s15, s14
; GFX12-SDAG-NEXT:    s_mov_b32 s14, s13
; GFX12-SDAG-NEXT:    s_mov_b32 s13, s12
; GFX12-SDAG-NEXT:    s_mov_b32 s12, s11
; GFX12-SDAG-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[2:3], v[4:5], v[17:19], v[14:16], v[0:1]], s[12:15]
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    global_store_b96 v[12:13], v[17:19], off
; GFX12-SDAG-NEXT:    global_store_b96 v[10:11], v[14:16], off
; GFX12-SDAG-NEXT:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: image_bvh_dual_intersect_ray_ssssss:
; GFX12-GISEL:       ; %bb.0:
; GFX12-GISEL-NEXT:    s_mov_b32 s16, s3
; GFX12-GISEL-NEXT:    s_mov_b32 s18, s5
; GFX12-GISEL-NEXT:    s_mov_b32 s20, s6
; GFX12-GISEL-NEXT:    s_mov_b32 s17, s4
; GFX12-GISEL-NEXT:    s_mov_b32 s21, s7
; GFX12-GISEL-NEXT:    s_mov_b32 s22, s8
; GFX12-GISEL-NEXT:    s_mov_b32 s8, s9
; GFX12-GISEL-NEXT:    s_mov_b32 s9, s10
; GFX12-GISEL-NEXT:    s_mov_b32 s3, 0
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v15, s17
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v16, s18 :: v_dual_mov_b32 v17, s20
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v10, v0 :: v_dual_mov_b32 v11, v1
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v12, v2 :: v_dual_mov_b32 v13, v3
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v18, s21 :: v_dual_mov_b32 v19, s22
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, s9
; GFX12-GISEL-NEXT:    s_mov_b32 s4, s11
; GFX12-GISEL-NEXT:    s_mov_b32 s5, s12
; GFX12-GISEL-NEXT:    s_mov_b32 s6, s13
; GFX12-GISEL-NEXT:    s_mov_b32 s7, s14
; GFX12-GISEL-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[0:1], v[2:3], v[14:16], v[17:19], v[4:5]], s[4:7]
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    global_store_b96 v[10:11], v[14:16], off
; GFX12-GISEL-NEXT:    global_store_b96 v[12:13], v[17:19], off
; GFX12-GISEL-NEXT:    ; return to shader part epilog
  %v = call {<10 x i32>, <3 x float>, <3 x float>} @llvm.amdgcn.image.bvh.dual.intersect.ray(i64 %node_ptr, float %ray_extent, i8 0, <3 x float> %ray_origin, <3 x float> %ray_dir, <2 x i32> %offsets, <4 x i32> %tdescr)
  %a = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 0
  %r = bitcast <10 x i32> %a to <10 x float>
  %o = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 1
  store <3 x float> %o, ptr addrspace(1) %origin
  %d = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 2
  store <3 x float> %d, ptr addrspace(1) %dir
  ret <10 x float> %r
}

define amdgpu_ps <10 x float> @image_bvh_dual_intersect_ray_vvvvvv(i64 %node_ptr, float %ray_extent, <3 x float> %ray_origin, <3 x float> %ray_dir, <2 x i32> %offsets, <4 x i32> %tdescr, ptr addrspace(1) %origin, ptr addrspace(1) %dir) {
; GFX12-SDAG-LABEL: image_bvh_dual_intersect_ray_vvvvvv:
; GFX12-SDAG:       ; %bb.0:
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v26, v10 :: v_dual_mov_b32 v25, v9
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v21, v8 :: v_dual_mov_b32 v20, v7
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v19, v6 :: v_dual_mov_b32 v24, v5
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v23, v4 :: v_dual_mov_b32 v22, v3
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v29, v2 :: v_dual_mov_b32 v28, v1
; GFX12-SDAG-NEXT:    v_dual_mov_b32 v27, v0 :: v_dual_mov_b32 v30, 0
; GFX12-SDAG-NEXT:    s_mov_b32 s1, exec_lo
; GFX12-SDAG-NEXT:  .LBB3_1: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT:    v_readfirstlane_b32 s4, v11
; GFX12-SDAG-NEXT:    v_readfirstlane_b32 s5, v12
; GFX12-SDAG-NEXT:    v_readfirstlane_b32 s6, v13
; GFX12-SDAG-NEXT:    v_readfirstlane_b32 s7, v14
; GFX12-SDAG-NEXT:    s_wait_alu depctr_va_sdst(0)
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[11:12]
; GFX12-SDAG-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[13:14]
; GFX12-SDAG-NEXT:    s_and_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-SDAG-NEXT:    s_and_saveexec_b32 s0, s0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[27:28], v[29:30], v[22:24], v[19:21], v[25:26]], s[4:7]
; GFX12-SDAG-NEXT:    ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14
; GFX12-SDAG-NEXT:    ; implicit-def: $vgpr27_vgpr28
; GFX12-SDAG-NEXT:    ; implicit-def: $vgpr29_vgpr30
; GFX12-SDAG-NEXT:    ; implicit-def: $vgpr25_vgpr26
; GFX12-SDAG-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT:    s_cbranch_execnz .LBB3_1
; GFX12-SDAG-NEXT:  ; %bb.2:
; GFX12-SDAG-NEXT:    s_mov_b32 exec_lo, s1
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    global_store_b96 v[15:16], v[22:24], off
; GFX12-SDAG-NEXT:    global_store_b96 v[17:18], v[19:21], off
; GFX12-SDAG-NEXT:    ; return to shader part epilog
;
; GFX12-GISEL-LABEL: image_bvh_dual_intersect_ray_vvvvvv:
; GFX12-GISEL:       ; %bb.0:
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v25, v0 :: v_dual_mov_b32 v26, v1
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v27, v2 :: v_dual_mov_b32 v20, v4
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v19, v3 :: v_dual_mov_b32 v22, v6
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, v8
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v23, v7 :: v_dual_mov_b32 v30, v10
; GFX12-GISEL-NEXT:    v_dual_mov_b32 v29, v9 :: v_dual_mov_b32 v28, 0
; GFX12-GISEL-NEXT:    s_mov_b32 s1, exec_lo
; GFX12-GISEL-NEXT:  .LBB3_1: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT:    v_readfirstlane_b32 s4, v11
; GFX12-GISEL-NEXT:    v_readfirstlane_b32 s5, v12
; GFX12-GISEL-NEXT:    v_readfirstlane_b32 s6, v13
; GFX12-GISEL-NEXT:    v_readfirstlane_b32 s7, v14
; GFX12-GISEL-NEXT:    s_wait_alu depctr_va_sdst(0)
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[11:12]
; GFX12-GISEL-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[13:14]
; GFX12-GISEL-NEXT:    s_and_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-GISEL-NEXT:    s_and_saveexec_b32 s0, s0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    image_bvh_dual_intersect_ray v[0:9], [v[25:26], v[27:28], v[19:21], v[22:24], v[29:30]], s[4:7]
; GFX12-GISEL-NEXT:    ; implicit-def: $vgpr11
; GFX12-GISEL-NEXT:    ; implicit-def: $vgpr25_vgpr26
; GFX12-GISEL-NEXT:    ; implicit-def: $vgpr27_vgpr28
; GFX12-GISEL-NEXT:    ; implicit-def: $vgpr29_vgpr30
; GFX12-GISEL-NEXT:    ; implicit-def: $vgpr13_vgpr14
; GFX12-GISEL-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT:    s_cbranch_execnz .LBB3_1
; GFX12-GISEL-NEXT:  ; %bb.2:
; GFX12-GISEL-NEXT:    s_mov_b32 exec_lo, s1
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    global_store_b96 v[15:16], v[19:21], off
; GFX12-GISEL-NEXT:    global_store_b96 v[17:18], v[22:24], off
; GFX12-GISEL-NEXT:    ; return to shader part epilog
  %v = call {<10 x i32>, <3 x float>, <3 x float>} @llvm.amdgcn.image.bvh.dual.intersect.ray(i64 %node_ptr, float %ray_extent, i8 0, <3 x float> %ray_origin, <3 x float> %ray_dir, <2 x i32> %offsets, <4 x i32> %tdescr)
  %a = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 0
  %r = bitcast <10 x i32> %a to <10 x float>
  %o = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 1
  store <3 x float> %o, ptr addrspace(1) %origin
  %d = extractvalue {<10 x i32>, <3 x float>, <3 x float>} %v, 2
  store <3 x float> %d, ptr addrspace(1) %dir
  ret <10 x float> %r
}