; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefixes=SI %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=VI %s
; RUN: llc -mtriple=amdgcn -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefixes=SI-GISEL %s
; RUN: llc -mtriple=amdgcn -global-isel=1 -new-reg-bank-select -mcpu=tonga < %s | FileCheck -check-prefixes=VI-GISEL %s

declare float @llvm.amdgcn.rsq.clamp.f32(float) #1
declare double @llvm.amdgcn.rsq.clamp.f64(double) #1

define amdgpu_kernel void @rsq_clamp_f32(ptr addrspace(1) %out, float %src) #0 {
; SI-LABEL: rsq_clamp_f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_load_dword s6, s[4:5], 0xb
; SI-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT:    s_mov_b32 s3, 0xf000
; SI-NEXT:    s_mov_b32 s2, -1
; SI-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NEXT:    v_rsq_clamp_f32_e32 v0, s6
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], 0
; SI-NEXT:    s_endpgm
;
; VI-LABEL: rsq_clamp_f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_load_dword s0, s[4:5], 0x2c
; VI-NEXT:    s_waitcnt lgkmcnt(0)
; VI-NEXT:    v_rsq_f32_e32 v0, s0
; VI-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-NEXT:    v_min_f32_e32 v0, 0x7f7fffff, v0
; VI-NEXT:    v_max_f32_e32 v2, 0xff7fffff, v0
; VI-NEXT:    s_waitcnt lgkmcnt(0)
; VI-NEXT:    v_mov_b32_e32 v0, s0
; VI-NEXT:    v_mov_b32_e32 v1, s1
; VI-NEXT:    flat_store_dword v[0:1], v2
; VI-NEXT:    s_endpgm
;
; SI-GISEL-LABEL: rsq_clamp_f32:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_load_dword s3, s[4:5], 0xb
; SI-GISEL-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-GISEL-NEXT:    s_mov_b32 s2, -1
; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; SI-GISEL-NEXT:    v_rsq_clamp_f32_e32 v0, s3
; SI-GISEL-NEXT:    s_mov_b32 s3, 0xf000
; SI-GISEL-NEXT:    buffer_store_dword v0, off, s[0:3], 0
; SI-GISEL-NEXT:    s_endpgm
;
; VI-GISEL-LABEL: rsq_clamp_f32:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_load_dword s0, s[4:5], 0x2c
; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT:    v_rsq_f32_e32 v0, s0
; VI-GISEL-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT:    v_min_f32_e32 v0, 0x7f7fffff, v0
; VI-GISEL-NEXT:    v_max_f32_e32 v2, 0xff7fffff, v0
; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, s0
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, s1
; VI-GISEL-NEXT:    flat_store_dword v[0:1], v2
; VI-GISEL-NEXT:    s_endpgm
  %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float %src)
  store float %rsq_clamp, ptr addrspace(1) %out
  ret void
}


define amdgpu_kernel void @rsq_clamp_f64(ptr addrspace(1) %out, double %src) #0 {
; SI-LABEL: rsq_clamp_f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT:    s_mov_b32 s7, 0xf000
; SI-NEXT:    s_mov_b32 s6, -1
; SI-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NEXT:    s_mov_b32 s4, s0
; SI-NEXT:    s_mov_b32 s5, s1
; SI-NEXT:    v_rsq_clamp_f64_e32 v[0:1], s[2:3]
; SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NEXT:    s_endpgm
;
; VI-LABEL: rsq_clamp_f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT:    s_waitcnt lgkmcnt(0)
; VI-NEXT:    v_rsq_f64_e32 v[0:1], s[2:3]
; VI-NEXT:    s_mov_b32 s3, 0x7fefffff
; VI-NEXT:    s_mov_b32 s2, -1
; VI-NEXT:    v_mov_b32_e32 v2, s0
; VI-NEXT:    v_mov_b32_e32 v3, s1
; VI-NEXT:    v_min_f64 v[0:1], v[0:1], s[2:3]
; VI-NEXT:    s_mov_b32 s3, 0xffefffff
; VI-NEXT:    v_max_f64 v[0:1], v[0:1], s[2:3]
; VI-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT:    s_endpgm
;
; SI-GISEL-LABEL: rsq_clamp_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; SI-GISEL-NEXT:    v_rsq_clamp_f64_e32 v[0:1], s[2:3]
; SI-GISEL-NEXT:    s_mov_b32 s2, -1
; SI-GISEL-NEXT:    s_mov_b32 s3, 0xf000
; SI-GISEL-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; SI-GISEL-NEXT:    s_endpgm
;
; VI-GISEL-LABEL: rsq_clamp_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, -1
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7fefffff
; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT:    v_rsq_f64_e32 v[0:1], s[2:3]
; VI-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, -1
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xffefffff
; VI-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, s1
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, s0
; VI-GISEL-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; VI-GISEL-NEXT:    s_endpgm
  %rsq_clamp = call double @llvm.amdgcn.rsq.clamp.f64(double %src)
  store double %rsq_clamp, ptr addrspace(1) %out
  ret void
}

; With SDAG, poison folding happens in target specific combine. With GISel this
; only happens as part of InstCombine so is not tested here.

define amdgpu_kernel void @rsq_clamp_undef_f32(ptr addrspace(1) %out) #0 {
; SI-LABEL: rsq_clamp_undef_f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_endpgm
;
; VI-LABEL: rsq_clamp_undef_f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_endpgm
;
; SI-GISEL-LABEL: rsq_clamp_undef_f32:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; SI-GISEL-NEXT:    v_rsq_clamp_f32_e32 v0, s0
; SI-GISEL-NEXT:    s_mov_b32 s2, -1
; SI-GISEL-NEXT:    s_mov_b32 s3, 0xf000
; SI-GISEL-NEXT:    buffer_store_dword v0, off, s[0:3], 0
; SI-GISEL-NEXT:    s_endpgm
;
; VI-GISEL-LABEL: rsq_clamp_undef_f32:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    v_rsq_f32_e32 v0, s0
; VI-GISEL-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT:    v_min_f32_e32 v0, 0x7f7fffff, v0
; VI-GISEL-NEXT:    v_max_f32_e32 v2, 0xff7fffff, v0
; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, s0
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, s1
; VI-GISEL-NEXT:    flat_store_dword v[0:1], v2
; VI-GISEL-NEXT:    s_endpgm
  %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float poison)
  store float %rsq_clamp, ptr addrspace(1) %out
  ret void
}

attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }