; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1200-SDAG-TRUE16 ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1200-SDAG-FAKE16 ; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1200-GI-TRUE16 ; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1200-GI-FAKE16 ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1250-SDAG-TRUE16 ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1250-SDAG-FAKE16 ; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1250-GI-TRUE16 ; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 %s -o - | FileCheck %s -check-prefixes=GFX1250-GI-FAKE16 define bfloat @v_exp2_bf16(bfloat %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.l, v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v0, v0 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %result = call bfloat @llvm.exp2.bf16(bfloat %in) ret bfloat %result } define bfloat @v_exp2_fabs_bf16(bfloat %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fabs_bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fabs_bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fabs_bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, |v0.l| ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fabs_bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, |v0| ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fabs = call bfloat @llvm.fabs.bf16(bfloat %in) %result = call bfloat @llvm.exp2.bf16(bfloat %fabs) ret bfloat %result } define bfloat @v_exp2_fneg_fabs_bf16(bfloat %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fneg_fabs_bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fneg_fabs_bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, 0x8000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fneg_fabs_bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, -|v0.l| ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fneg_fabs_bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, -|v0| ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fabs = call bfloat @llvm.fabs.bf16(bfloat %in) %fneg.fabs = fneg bfloat %fabs %result = call bfloat @llvm.exp2.bf16(bfloat %fneg.fabs) ret bfloat %result } define bfloat @v_exp2_fneg_bf16(bfloat %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fneg_bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fneg_bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fneg_bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, -v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fneg_bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, -v0 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fneg = fneg bfloat %in %result = call bfloat @llvm.exp2.bf16(bfloat %fneg) ret bfloat %result } define bfloat @v_exp2_bf16_fast(bfloat %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_bf16_fast: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_bf16_fast: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_bf16_fast: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.l, v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_bf16_fast: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v0, v0 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %result = call fast bfloat @llvm.exp2.bf16(bfloat %in) ret bfloat %result } define <2 x bfloat> @v_exp2_v2bf16(<2 x bfloat> %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_v2bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_v2bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v3 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v1, v1, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_v2bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.h, v0.h ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.l, v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_v2bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v0, v0 ; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v1, v1 ; GFX1250-SDAG-FAKE16-NEXT: v_nop ; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %result = call <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat> %in) ret <2 x bfloat> %result } define <2 x bfloat> @v_exp2_fabs_v2bf16(<2 x bfloat> %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fabs_v2bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l ; GFX1200-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.h ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v4 :: v_dual_add_f32 v1, v1, v3 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fabs_v2bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_and_b32_e32 v1, 0x7fff, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_dual_add_f32 v1, v1, v3 :: v_dual_and_b32 v0, 0x7fff, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v1, v1, v3 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fabs_v2bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.h, |v0.h| ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, |v0.l| ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fabs_v2bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, |v0| ; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v1, |v1| ; GFX1250-SDAG-FAKE16-NEXT: v_nop ; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fabs = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> %in) %result = call <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat> %fabs) ret <2 x bfloat> %result } define <2 x bfloat> @v_exp2_fneg_fabs_v2bf16(<2 x bfloat> %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fneg_fabs_v2bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l ; GFX1200-SDAG-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.h ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v4 :: v_dual_add_f32 v1, v1, v3 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fneg_fabs_v2bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, 0x8000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v1, 0x8000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_dual_add_f32 v1, v1, v3 :: v_dual_lshlrev_b32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v1, v1, v3 ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fneg_fabs_v2bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.h, -|v0.h| ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, -|v0.l| ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fneg_fabs_v2bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, -|v0| ; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v1, -|v1| ; GFX1250-SDAG-FAKE16-NEXT: v_nop ; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fabs = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> %in) %fneg.fabs = fneg <2 x bfloat> %fabs %result = call <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat> %fneg.fabs) ret <2 x bfloat> %result } define <2 x bfloat> @v_exp2_fneg_v2bf16(<2 x bfloat> %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_fneg_v2bf16: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l ; GFX1200-SDAG-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.h ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_dual_add_f32 v0, v0, v4 :: v_dual_add_f32 v1, v1, v3 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_fneg_v2bf16: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_xor_b32_e32 v1, 0x8000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_dual_add_f32 v1, v1, v3 :: v_dual_lshlrev_b32 v0, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v1, v1, v3 ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x7060302 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_fneg_v2bf16: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.h, -v0.h ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e64 v0.l, -v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_fneg_v2bf16: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v0, -v0 ; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e64 v1, -v1 ; GFX1250-SDAG-FAKE16-NEXT: v_nop ; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %fneg = fneg <2 x bfloat> %in %result = call <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat> %fneg) ret <2 x bfloat> %result } define <2 x bfloat> @v_exp2_v2bf16_fast(<2 x bfloat> %in) { ; GFX1200-SDAG-TRUE16-LABEL: v_exp2_v2bf16_fast: ; GFX1200-SDAG-TRUE16: ; %bb.0: ; GFX1200-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h ; GFX1200-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1200-SDAG-FAKE16-LABEL: v_exp2_v2bf16_fast: ; GFX1200-SDAG-FAKE16: ; %bb.0: ; GFX1200-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1200-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v0 ; GFX1200-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v0, v0, v3 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0 ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add_f32_e32 v1, v1, v2 ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v3 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_exp_f32_e32 v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: v_ldexp_f32 v1, v1, v2 ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX1200-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX1200-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX1200-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX1200-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0) ; GFX1200-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo ; GFX1200-SDAG-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 ; GFX1200-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX1250-SDAG-TRUE16-LABEL: v_exp2_v2bf16_fast: ; GFX1250-SDAG-TRUE16: ; %bb.0: ; GFX1250-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.h, v0.h ; GFX1250-SDAG-TRUE16-NEXT: v_exp_bf16_e32 v0.l, v0.l ; GFX1250-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1250-SDAG-FAKE16-LABEL: v_exp2_v2bf16_fast: ; GFX1250-SDAG-FAKE16: ; %bb.0: ; GFX1250-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v0, v0 ; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) ; GFX1250-SDAG-FAKE16-NEXT: v_exp_bf16_e32 v1, v1 ; GFX1250-SDAG-FAKE16-NEXT: v_nop ; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 ; GFX1250-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31] %result = call fast <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat> %in) ret <2 x bfloat> %result } declare bfloat @llvm.exp2.bf16(bfloat) #0 declare <2 x bfloat> @llvm.exp2.v2bf16(<2 x bfloat>) #0 declare bfloat @llvm.fabs.bf16(bfloat) #0 declare <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat>) #0 attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }