; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1250 | FileCheck %s -check-prefixes=GFX1250 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1310 | FileCheck %s -check-prefixes=GFX1310 define <2 x bfloat> @v_fadd_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b) { ; GFX1250-LABEL: v_fadd_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fadd_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %add = fadd <2 x bfloat> %a, %neg ret <2 x bfloat> %add } define <4 x bfloat> @v_fadd_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b) { ; GFX1250-LABEL: v_fadd_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_add_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fadd_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_add_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %add = fadd <4 x bfloat> %a, %neg ret <4 x bfloat> %add } define <8 x bfloat> @v_fadd_v8bf16_neg1(<8 x bfloat> %a, <8 x bfloat> %b) { ; GFX1250-LABEL: v_fadd_v8bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_add_bf16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_add_bf16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_add_bf16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fadd_v8bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_add_bf16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_add_bf16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_add_bf16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <8 x bfloat> %b %add = fadd <8 x bfloat> %a, %neg ret <8 x bfloat> %add } define <2 x bfloat> @v_fneg_v2bf16(<2 x bfloat> %a) { ; GFX1250-LABEL: v_fneg_v2bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fneg_v2bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %a ret <2 x bfloat> %neg } define <4 x bfloat> @v_fneg_v4bf16(<4 x bfloat> %a) { ; GFX1250-LABEL: v_fneg_v4bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1250-NEXT: v_xor_b32_e32 v1, 0x80008000, v1 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fneg_v4bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1310-NEXT: v_xor_b32_e32 v1, 0x80008000, v1 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %a ret <4 x bfloat> %neg } define <8 x bfloat> @v_fneg_v8bf16(<8 x bfloat> %a) { ; GFX1250-LABEL: v_fneg_v8bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1250-NEXT: v_xor_b32_e32 v1, 0x80008000, v1 ; GFX1250-NEXT: v_xor_b32_e32 v2, 0x80008000, v2 ; GFX1250-NEXT: v_xor_b32_e32 v3, 0x80008000, v3 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fneg_v8bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_xor_b32_e32 v0, 0x80008000, v0 ; GFX1310-NEXT: v_xor_b32_e32 v1, 0x80008000, v1 ; GFX1310-NEXT: v_xor_b32_e32 v2, 0x80008000, v2 ; GFX1310-NEXT: v_xor_b32_e32 v3, 0x80008000, v3 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <8 x bfloat> %a ret <8 x bfloat> %neg } define <2 x bfloat> @v_fabs_v2bf16(<2 x bfloat> %a) { ; GFX1250-LABEL: v_fabs_v2bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fabs_v2bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %abs = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> %a) ret <2 x bfloat> %abs } define <4 x bfloat> @v_fabs_v4bf16(<4 x bfloat> %a) { ; GFX1250-LABEL: v_fabs_v4bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1250-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fabs_v4bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1310-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %abs = call <4 x bfloat> @llvm.fabs.v4bf16(<4 x bfloat> %a) ret <4 x bfloat> %abs } define <8 x bfloat> @v_fabs_v8bf16(<8 x bfloat> %a) { ; GFX1250-LABEL: v_fabs_v8bf16: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1250-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1 ; GFX1250-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v2 ; GFX1250-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v3 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fabs_v8bf16: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0 ; GFX1310-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1 ; GFX1310-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v2 ; GFX1310-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v3 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %abs = call <8 x bfloat> @llvm.fabs.v8bf16(<8 x bfloat> %a) ret <8 x bfloat> %abs } define <2 x bfloat> @v_fsub_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b) { ; GFX1250-LABEL: v_fsub_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v1 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fsub_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v1 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %sub = fsub <2 x bfloat> %a, %neg ret <2 x bfloat> %sub } define <4 x bfloat> @v_fsub_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b) { ; GFX1250-LABEL: v_fsub_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v2 ; GFX1250-NEXT: v_pk_add_bf16 v1, v1, v3 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fsub_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v2 ; GFX1310-NEXT: v_pk_add_bf16 v1, v1, v3 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %sub = fsub <4 x bfloat> %a, %neg ret <4 x bfloat> %sub } define <8 x bfloat> @v_fsub_v8bf16_neg1(<8 x bfloat> %a, <8 x bfloat> %b) { ; GFX1250-LABEL: v_fsub_v8bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_add_bf16 v0, v0, v4 ; GFX1250-NEXT: v_pk_add_bf16 v1, v1, v5 ; GFX1250-NEXT: v_pk_add_bf16 v2, v2, v6 ; GFX1250-NEXT: v_pk_add_bf16 v3, v3, v7 ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fsub_v8bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_add_bf16 v0, v0, v4 ; GFX1310-NEXT: v_pk_add_bf16 v1, v1, v5 ; GFX1310-NEXT: v_pk_add_bf16 v2, v2, v6 ; GFX1310-NEXT: v_pk_add_bf16 v3, v3, v7 ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <8 x bfloat> %b %sub = fsub <8 x bfloat> %a, %neg ret <8 x bfloat> %sub } define <2 x bfloat> @v_fmul_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b) { ; GFX1250-LABEL: v_fmul_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_mul_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fmul_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_mul_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %mul = fmul <2 x bfloat> %a, %neg ret <2 x bfloat> %mul } define <4 x bfloat> @v_fmul_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b) { ; GFX1250-LABEL: v_fmul_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_mul_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_mul_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fmul_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_mul_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_mul_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %mul = fmul <4 x bfloat> %a, %neg ret <4 x bfloat> %mul } define <8 x bfloat> @v_fmul_v8bf16_neg1(<8 x bfloat> %a, <8 x bfloat> %b) { ; GFX1250-LABEL: v_fmul_v8bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_mul_bf16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_mul_bf16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_mul_bf16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_mul_bf16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fmul_v8bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_mul_bf16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_mul_bf16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_mul_bf16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_mul_bf16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <8 x bfloat> %b %mul = fmul <8 x bfloat> %a, %neg ret <8 x bfloat> %mul } define <2 x bfloat> @v_fma_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b, <2 x bfloat> %c) { ; GFX1250-LABEL: v_fma_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_fma_bf16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fma_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_fma_bf16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %fma = call <2 x bfloat> @llvm.fma.v2bf16( <2 x bfloat> %a, <2 x bfloat> %neg, <2 x bfloat> %c) ret <2 x bfloat> %fma } define <4 x bfloat> @v_fma_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b, <4 x bfloat> %c) { ; GFX1250-LABEL: v_fma_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_fma_bf16 v0, v0, v2, v4 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: v_pk_fma_bf16 v1, v1, v3, v5 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fma_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_fma_bf16 v0, v0, v2, v4 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: v_pk_fma_bf16 v1, v1, v3, v5 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %fma = call <4 x bfloat> @llvm.fma.v4bf16( <4 x bfloat> %a, <4 x bfloat> %neg, <4 x bfloat> %c) ret <4 x bfloat> %fma } define <8 x bfloat> @v_fma_v8bf16_neg1(<8 x bfloat> %a, <8 x bfloat> %b, <8 x bfloat> %c) { ; GFX1250-LABEL: v_fma_v8bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_fma_bf16 v0, v0, v4, v8 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: v_pk_fma_bf16 v1, v1, v5, v9 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: v_pk_fma_bf16 v2, v2, v6, v10 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: v_pk_fma_bf16 v3, v3, v7, v11 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_fma_v8bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_fma_bf16 v0, v0, v4, v8 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: v_pk_fma_bf16 v1, v1, v5, v9 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: v_pk_fma_bf16 v2, v2, v6, v10 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: v_pk_fma_bf16 v3, v3, v7, v11 neg_lo:[0,1,0] neg_hi:[0,1,0] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <8 x bfloat> %b %fma = call <8 x bfloat> @llvm.fma.v2bf16( <8 x bfloat> %a, <8 x bfloat> %neg, <8 x bfloat> %c) ret <8 x bfloat> %fma } define <2 x bfloat> @v_minnum_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b) { ; GFX1250-LABEL: v_minnum_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_min_num_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_minnum_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_min_num_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %min = call <2 x bfloat> @llvm.minnum.v2bf16( <2 x bfloat> %a, <2 x bfloat> %neg) ret <2 x bfloat> %min } define <4 x bfloat> @v_minnum_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b) { ; GFX1250-LABEL: v_minnum_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_min_num_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_min_num_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_minnum_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_min_num_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_min_num_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %min = call <4 x bfloat> @llvm.minnum.v4bf16( <4 x bfloat> %a, <4 x bfloat> %neg) ret <4 x bfloat> %min } define <2 x bfloat> @v_maxnum_v2bf16_neg1(<2 x bfloat> %a, <2 x bfloat> %b) { ; GFX1250-LABEL: v_maxnum_v2bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_max_num_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_maxnum_v2bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_max_num_bf16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <2 x bfloat> %b %max = call <2 x bfloat> @llvm.maxnum.v2bf16( <2 x bfloat> %a, <2 x bfloat> %neg) ret <2 x bfloat> %max } define <4 x bfloat> @v_maxnum_v4bf16_neg1(<4 x bfloat> %a, <4 x bfloat> %b) { ; GFX1250-LABEL: v_maxnum_v4bf16_neg1: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 ; GFX1250-NEXT: v_pk_max_num_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: v_pk_max_num_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1250-NEXT: s_set_pc_i64 s[30:31] ; ; GFX1310-LABEL: v_maxnum_v4bf16_neg1: ; GFX1310: ; %bb.0: ; GFX1310-NEXT: s_wait_loadcnt_dscnt 0x0 ; GFX1310-NEXT: s_wait_expcnt 0x0 ; GFX1310-NEXT: s_wait_samplecnt 0x0 ; GFX1310-NEXT: s_wait_bvhcnt 0x0 ; GFX1310-NEXT: s_wait_kmcnt 0x0 ; GFX1310-NEXT: v_pk_max_num_bf16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: v_pk_max_num_bf16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1] ; GFX1310-NEXT: s_set_pc_i64 s[30:31] %neg = fneg <4 x bfloat> %b %max = call <4 x bfloat> @llvm.maxnum.v4bf16( <4 x bfloat> %a, <4 x bfloat> %neg) ret <4 x bfloat> %max }