# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=hexagon -run-pass=pipeliner -window-sched=force %s -o - | FileCheck %s
# Ensure WindowScheduler copies IMPLICIT_DEF into the triple-MBB region
# so LiveIntervals no longer hits LR.verify()

--- |
  define void @foo() {
    ret void
  }
...
---
name: foo
tracksRegLiveness: true

body: |
  ; CHECK-LABEL: name: foo
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x60000000), %bb.2(0x20000000)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:intregs = IMPLICIT_DEF
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:predregs = IMPLICIT_DEF
  ; CHECK-NEXT:   [[DEF2:%[0-9]+]]:intregslow8 = IMPLICIT_DEF
  ; CHECK-NEXT:   [[DEF3:%[0-9]+]]:hvxqr = IMPLICIT_DEF
  ; CHECK-NEXT:   J2_jumpf [[DEF1]], %bb.2, implicit-def dead $pc
  ; CHECK-NEXT:   J2_jump %bb.1, implicit-def dead $pc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.4(0x55555555), %bb.2(0x2aaaaaab)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   J2_jumpt [[DEF1]], %bb.4, implicit-def dead $pc
  ; CHECK-NEXT:   J2_jump %bb.2, implicit-def dead $pc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   J2_loop0r %bb.3, [[DEF]], implicit-def $lc0, implicit-def $sa0, implicit-def $usr
  ; CHECK-NEXT:   J2_jump %bb.3, implicit-def $pc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3 (machine-block-address-taken):
  ; CHECK-NEXT:   successors: %bb.4(0x04000000), %bb.3(0x7c000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[V6_vL32Ub_ai:%[0-9]+]]:hvxvr = V6_vL32Ub_ai [[DEF]], 0 :: (load (s1024), align 8)
  ; CHECK-NEXT:   [[DEF4:%[0-9]+]]:hvxwr = IMPLICIT_DEF
  ; CHECK-NEXT:   dead [[V6_vlalignb:%[0-9]+]]:hvxvr = V6_vlalignb [[DEF4]].vsub_lo, [[V6_vL32Ub_ai]], [[DEF2]]
  ; CHECK-NEXT:   [[V6_vlalignb1:%[0-9]+]]:hvxvr = V6_vlalignb [[DEF4]].vsub_lo, [[DEF4]].vsub_hi, [[DEF2]]
  ; CHECK-NEXT:   V6_vS32b_qpred_ai [[DEF3]], [[DEF]], 0, [[V6_vlalignb1]] :: (store (s1024))
  ; CHECK-NEXT:   ENDLOOP0 %bb.3, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
  ; CHECK-NEXT:   J2_jump %bb.4, implicit-def dead $pc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   PS_jmpret $r31, implicit-def dead $pc
  bb.0:
    successors: %bb.1(0x60000000), %bb.2(0x20000000)
    liveins: $r0, $r1, $r2

    %0:intregs = IMPLICIT_DEF
    %1:predregs = IMPLICIT_DEF
    %2:intregslow8 = IMPLICIT_DEF
    %3:hvxqr = IMPLICIT_DEF
    J2_jumpf %1, %bb.2, implicit-def dead $pc
    J2_jump %bb.1, implicit-def dead $pc

  bb.1:
    successors: %bb.4(0x55555555), %bb.2(0x2aaaaaab)

    J2_jumpt %1, %bb.4, implicit-def dead $pc
    J2_jump %bb.2, implicit-def dead $pc

  bb.2:
    successors: %bb.3(0x80000000)

    J2_loop0r %bb.3, %0, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
    J2_jump %bb.3, implicit-def $pc

  bb.3 (machine-block-address-taken):
    successors: %bb.4(0x04000000), %bb.3(0x7c000000)

    %4:hvxvr = V6_vL32Ub_ai %0, 0 :: (load (s1024), align 8)
    %5:hvxwr = IMPLICIT_DEF
    %6:hvxvr = V6_vlalignb %5.vsub_lo, %4, %2
    %7:hvxvr = V6_vlalignb %5.vsub_lo, %5.vsub_hi, %2
    V6_vS32b_qpred_ai %3, %0, 0, %7 :: (store (s1024))
    ENDLOOP0 %bb.3, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
    J2_jump %bb.4, implicit-def dead $pc

  bb.4:
    PS_jmpret $r31, implicit-def dead $pc
...