; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64

define void @buildvector_v32i8_splat(ptr %dst, i8 %a0) nounwind {
; CHECK-LABEL: buildvector_v32i8_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvreplgr2vr.b $xr0, $a1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %insert = insertelement <32 x i8> undef, i8 %a0, i8 0
  %splat = shufflevector <32 x i8> %insert, <32 x i8> undef, <32 x i32> zeroinitializer
  store <32 x i8> %splat, ptr %dst
  ret void
}

define void @buildvector_v16i16_splat(ptr %dst, i16 %a0) nounwind {
; CHECK-LABEL: buildvector_v16i16_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvreplgr2vr.h $xr0, $a1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %insert = insertelement <16 x i16> undef, i16 %a0, i8 0
  %splat = shufflevector <16 x i16> %insert, <16 x i16> undef, <16 x i32> zeroinitializer
  store <16 x i16> %splat, ptr %dst
  ret void
}

define void @buildvector_v8i32_splat(ptr %dst, i32 %a0) nounwind {
; CHECK-LABEL: buildvector_v8i32_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvreplgr2vr.w $xr0, $a1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %insert = insertelement <8 x i32> undef, i32 %a0, i8 0
  %splat = shufflevector <8 x i32> %insert, <8 x i32> undef, <8 x i32> zeroinitializer
  store <8 x i32> %splat, ptr %dst
  ret void
}

define void @buildvector_v4i64_splat(ptr %dst, i64 %a0) nounwind {
; LA32-LABEL: buildvector_v4i64_splat:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 0
; LA32-NEXT:    vinsgr2vr.w $vr0, $a2, 1
; LA32-NEXT:    xvreplve0.d $xr0, $xr0
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v4i64_splat:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvreplgr2vr.d $xr0, $a1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %insert = insertelement <4 x i64> undef, i64 %a0, i8 0
  %splat = shufflevector <4 x i64> %insert, <4 x i64> undef, <4 x i32> zeroinitializer
  store <4 x i64> %splat, ptr %dst
  ret void
}

define void @buildvector_v8f32_splat(ptr %dst, float %a0) nounwind {
; CHECK-LABEL: buildvector_v8f32_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %insert = insertelement <8 x float> undef, float %a0, i8 0
  %splat = shufflevector <8 x float> %insert, <8 x float> undef, <8 x i32> zeroinitializer
  store <8 x float> %splat, ptr %dst
  ret void
}

define void @buildvector_v4f64_splat(ptr %dst, double %a0) nounwind {
; CHECK-LABEL: buildvector_v4f64_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %insert = insertelement <4 x double> undef, double %a0, i8 0
  %splat = shufflevector <4 x double> %insert, <4 x double> undef, <4 x i32> zeroinitializer
  store <4 x double> %splat, ptr %dst
  ret void
}

define void @buildvector_v32i8_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v32i8_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.b $xr0, 1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, ptr %dst
  ret void
}

define void @buildvector_v32i8_const_splat_v4i64(ptr %dst) nounwind {
; LA32-LABEL: buildvector_v32i8_const_splat_v4i64:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI7_0)
; LA32-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI7_0)
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v32i8_const_splat_v4i64:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    lu12i.w $a1, 7
; LA64-NEXT:    ori $a1, $a1, 3453
; LA64-NEXT:    xvreplgr2vr.d $xr0, $a1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  store <32 x i8> <i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, ptr %dst
  ret void
}

define void @buildvector_v16i16_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v16i16_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.h $xr0, 1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, ptr %dst
  ret void
}

define void @buildvector_v16i16_const_splat_v4i64(ptr %dst) nounwind {
; LA32-LABEL: buildvector_v16i16_const_splat_v4i64:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI9_0)
; LA32-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI9_0)
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v16i16_const_splat_v4i64:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ori $a1, $zero, 512
; LA64-NEXT:    xvreplgr2vr.d $xr0, $a1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  store <16 x i16> <i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0>, ptr %dst
  ret void
}

define void @buildvector_v8i32_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v8i32_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.w $xr0, 1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, ptr %dst
  ret void
}

define void @buildvector_v8i32_const_splat_v4i64(ptr %dst) nounwind {
; LA32-LABEL: buildvector_v8i32_const_splat_v4i64:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI11_0)
; LA32-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI11_0)
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v8i32_const_splat_v4i64:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ori $a1, $zero, 512
; LA64-NEXT:    xvreplgr2vr.d $xr0, $a1
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  store <8 x i32> <i32 512, i32 0, i32 512, i32 0, i32 512, i32 0, i32 512, i32 0>, ptr %dst
  ret void
}

define void @buildvector_v4i64_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v4i64_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.d $xr0, 1
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <4 x i64> <i64 1, i64 1, i64 1, i64 1>, ptr %dst
  ret void
}

;; Also check buildvector_const_splat_xvldi_1010.
define void @buildvector_v8f32_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v8f32_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -1424
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, ptr %dst
  ret void
}

;; Also check buildvector_const_splat_xvldi_1100.
define void @buildvector_v4f64_const_splat(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v4f64_const_splat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -912
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, ptr %dst
  ret void
}

;; imm[11:8] == 4'b0000/4'b0100/4'b1000 can be represented using xvrepli.[whb].
define void @buildvector_const_splat_xvldi_0001(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_0001:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -3837
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_0010(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_0010:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -3583
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_0011(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_0011:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -3327
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_0101(ptr %dst) {
; CHECK-LABEL: buildvector_const_splat_xvldi_0101:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -2813
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <16 x i16> <i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_0110(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_0110:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -2557
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_0111(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_0111:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -2305
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_1001(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_1001:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -1789
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0>, ptr %dst
  ret void
}

define void @buildvector_const_splat_xvldi_1011(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_const_splat_xvldi_1011:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, -1280
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x float> <float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0>, ptr %dst
  ret void
}

define void @buildvector_v32i8_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v32i8_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI23_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI23_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, ptr %dst
  ret void
}

define void @buildvector_v16i16_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v16i16_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI24_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI24_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, ptr %dst
  ret void
}

define void @buildvector_v8i32_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v8i32_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI25_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI25_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, ptr %dst
  ret void
}

define void @buildvector_v4i64_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v4i64_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI26_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI26_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <4 x i64> <i64 0, i64 1, i64 2, i64 3>, ptr %dst
  ret void
}

define void @buildvector_v2f32_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v2f32_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI27_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI27_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <8 x float> <float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, ptr %dst
  ret void
}

define void @buildvector_v4f64_const(ptr %dst) nounwind {
; CHECK-LABEL: buildvector_v4f64_const:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI28_0)
; CHECK-NEXT:    xvld $xr0, $a1, %pc_lo12(.LCPI28_0)
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  store <4 x double> <double 0.0, double 1.0, double 2.0, double 3.0>, ptr %dst
  ret void
}

define void @buildvector_v32i8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) nounwind {
; LA32-LABEL: buildvector_v32i8:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.b $t0, $sp, 36
; LA32-NEXT:    ld.b $t1, $sp, 92
; LA32-NEXT:    ld.b $t2, $sp, 40
; LA32-NEXT:    ld.b $t3, $sp, 44
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 0
; LA32-NEXT:    ld.b $t0, $sp, 48
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 1
; LA32-NEXT:    ld.b $t2, $sp, 52
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 2
; LA32-NEXT:    ld.b $t3, $sp, 56
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 3
; LA32-NEXT:    ld.b $t0, $sp, 60
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 4
; LA32-NEXT:    ld.b $t2, $sp, 64
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 5
; LA32-NEXT:    ld.b $t3, $sp, 68
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 6
; LA32-NEXT:    ld.b $t0, $sp, 72
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 7
; LA32-NEXT:    ld.b $t2, $sp, 76
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 8
; LA32-NEXT:    ld.b $t3, $sp, 80
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 9
; LA32-NEXT:    ld.b $t0, $sp, 84
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 10
; LA32-NEXT:    ld.b $t2, $sp, 88
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 11
; LA32-NEXT:    ld.b $t3, $sp, 96
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 12
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 13
; LA32-NEXT:    vinsgr2vr.b $vr0, $t1, 14
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 15
; LA32-NEXT:    vinsgr2vr.b $vr1, $a1, 0
; LA32-NEXT:    vinsgr2vr.b $vr1, $a2, 1
; LA32-NEXT:    vinsgr2vr.b $vr1, $a3, 2
; LA32-NEXT:    vinsgr2vr.b $vr1, $a4, 3
; LA32-NEXT:    ld.b $a1, $sp, 28
; LA32-NEXT:    vinsgr2vr.b $vr1, $a5, 4
; LA32-NEXT:    ld.b $a2, $sp, 0
; LA32-NEXT:    vinsgr2vr.b $vr1, $a6, 5
; LA32-NEXT:    ld.b $a3, $sp, 4
; LA32-NEXT:    vinsgr2vr.b $vr1, $a7, 6
; LA32-NEXT:    ld.b $a4, $sp, 8
; LA32-NEXT:    vinsgr2vr.b $vr1, $a2, 7
; LA32-NEXT:    ld.b $a2, $sp, 12
; LA32-NEXT:    vinsgr2vr.b $vr1, $a3, 8
; LA32-NEXT:    ld.b $a3, $sp, 16
; LA32-NEXT:    vinsgr2vr.b $vr1, $a4, 9
; LA32-NEXT:    ld.b $a4, $sp, 20
; LA32-NEXT:    vinsgr2vr.b $vr1, $a2, 10
; LA32-NEXT:    ld.b $a2, $sp, 24
; LA32-NEXT:    vinsgr2vr.b $vr1, $a3, 11
; LA32-NEXT:    ld.b $a3, $sp, 32
; LA32-NEXT:    vinsgr2vr.b $vr1, $a4, 12
; LA32-NEXT:    vinsgr2vr.b $vr1, $a2, 13
; LA32-NEXT:    vinsgr2vr.b $vr1, $a1, 14
; LA32-NEXT:    vinsgr2vr.b $vr1, $a3, 15
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA32-NEXT:    xvst $xr1, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v32i8:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ld.b $t0, $sp, 72
; LA64-NEXT:    ld.b $t1, $sp, 184
; LA64-NEXT:    ld.b $t2, $sp, 80
; LA64-NEXT:    ld.b $t3, $sp, 88
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 0
; LA64-NEXT:    ld.b $t0, $sp, 96
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 1
; LA64-NEXT:    ld.b $t2, $sp, 104
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 2
; LA64-NEXT:    ld.b $t3, $sp, 112
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 3
; LA64-NEXT:    ld.b $t0, $sp, 120
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 4
; LA64-NEXT:    ld.b $t2, $sp, 128
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 5
; LA64-NEXT:    ld.b $t3, $sp, 136
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 6
; LA64-NEXT:    ld.b $t0, $sp, 144
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 7
; LA64-NEXT:    ld.b $t2, $sp, 152
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 8
; LA64-NEXT:    ld.b $t3, $sp, 160
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 9
; LA64-NEXT:    ld.b $t0, $sp, 168
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 10
; LA64-NEXT:    ld.b $t2, $sp, 176
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 11
; LA64-NEXT:    ld.b $t3, $sp, 192
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 12
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 13
; LA64-NEXT:    vinsgr2vr.b $vr0, $t1, 14
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 15
; LA64-NEXT:    vinsgr2vr.b $vr1, $a1, 0
; LA64-NEXT:    vinsgr2vr.b $vr1, $a2, 1
; LA64-NEXT:    vinsgr2vr.b $vr1, $a3, 2
; LA64-NEXT:    vinsgr2vr.b $vr1, $a4, 3
; LA64-NEXT:    ld.b $a1, $sp, 56
; LA64-NEXT:    vinsgr2vr.b $vr1, $a5, 4
; LA64-NEXT:    ld.b $a2, $sp, 0
; LA64-NEXT:    vinsgr2vr.b $vr1, $a6, 5
; LA64-NEXT:    ld.b $a3, $sp, 8
; LA64-NEXT:    vinsgr2vr.b $vr1, $a7, 6
; LA64-NEXT:    ld.b $a4, $sp, 16
; LA64-NEXT:    vinsgr2vr.b $vr1, $a2, 7
; LA64-NEXT:    ld.b $a2, $sp, 24
; LA64-NEXT:    vinsgr2vr.b $vr1, $a3, 8
; LA64-NEXT:    ld.b $a3, $sp, 32
; LA64-NEXT:    vinsgr2vr.b $vr1, $a4, 9
; LA64-NEXT:    ld.b $a4, $sp, 40
; LA64-NEXT:    vinsgr2vr.b $vr1, $a2, 10
; LA64-NEXT:    ld.b $a2, $sp, 48
; LA64-NEXT:    vinsgr2vr.b $vr1, $a3, 11
; LA64-NEXT:    ld.b $a3, $sp, 64
; LA64-NEXT:    vinsgr2vr.b $vr1, $a4, 12
; LA64-NEXT:    vinsgr2vr.b $vr1, $a2, 13
; LA64-NEXT:    vinsgr2vr.b $vr1, $a1, 14
; LA64-NEXT:    vinsgr2vr.b $vr1, $a3, 15
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA64-NEXT:    xvst $xr1, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8 %a0,  i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1,  i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2,  i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3,  i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4,  i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5,  i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6,  i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7,  i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8 %a8,  i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 %a9,  i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 %a10, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 %a16, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8 %a17, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8 %a18, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 %a19, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8 %a20, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 %a21, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8 %a23, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 %a24, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 %a25, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 %a26, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8 %a27, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8 %a28, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 %a29, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 %a30, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8 %a31, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_partial(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a5, i8 %a7, i8 %a8, i8 %a15, i8 %a17, i8 %a18, i8 %a20, i8 %a22, i8 %a23, i8 %a27, i8 %a28, i8 %a31) nounwind {
; LA32-LABEL: buildvector_v32i8_partial:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.b $t0, $sp, 28
; LA32-NEXT:    ld.b $t1, $sp, 24
; LA32-NEXT:    ld.b $t2, $sp, 20
; LA32-NEXT:    ld.b $t3, $sp, 16
; LA32-NEXT:    ld.b $t4, $sp, 12
; LA32-NEXT:    ld.b $t5, $sp, 8
; LA32-NEXT:    ld.b $t6, $sp, 4
; LA32-NEXT:    ld.b $t7, $sp, 0
; LA32-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; LA32-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; LA32-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; LA32-NEXT:    vinsgr2vr.b $vr0, $a4, 5
; LA32-NEXT:    vinsgr2vr.b $vr0, $a5, 7
; LA32-NEXT:    vinsgr2vr.b $vr0, $a6, 8
; LA32-NEXT:    vinsgr2vr.b $vr0, $a7, 15
; LA32-NEXT:    vinsgr2vr.b $vr1, $t7, 1
; LA32-NEXT:    vinsgr2vr.b $vr1, $t6, 2
; LA32-NEXT:    vinsgr2vr.b $vr1, $t5, 4
; LA32-NEXT:    vinsgr2vr.b $vr1, $t4, 6
; LA32-NEXT:    vinsgr2vr.b $vr1, $t3, 7
; LA32-NEXT:    vinsgr2vr.b $vr1, $t2, 11
; LA32-NEXT:    vinsgr2vr.b $vr1, $t1, 12
; LA32-NEXT:    vinsgr2vr.b $vr1, $t0, 15
; LA32-NEXT:    xvpermi.q $xr0, $xr1, 2
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v32i8_partial:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ld.b $t0, $sp, 56
; LA64-NEXT:    ld.b $t1, $sp, 48
; LA64-NEXT:    ld.b $t2, $sp, 40
; LA64-NEXT:    ld.b $t3, $sp, 32
; LA64-NEXT:    ld.b $t4, $sp, 24
; LA64-NEXT:    ld.b $t5, $sp, 16
; LA64-NEXT:    ld.b $t6, $sp, 8
; LA64-NEXT:    ld.b $t7, $sp, 0
; LA64-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; LA64-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; LA64-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; LA64-NEXT:    vinsgr2vr.b $vr0, $a4, 5
; LA64-NEXT:    vinsgr2vr.b $vr0, $a5, 7
; LA64-NEXT:    vinsgr2vr.b $vr0, $a6, 8
; LA64-NEXT:    vinsgr2vr.b $vr0, $a7, 15
; LA64-NEXT:    vinsgr2vr.b $vr1, $t7, 1
; LA64-NEXT:    vinsgr2vr.b $vr1, $t6, 2
; LA64-NEXT:    vinsgr2vr.b $vr1, $t5, 4
; LA64-NEXT:    vinsgr2vr.b $vr1, $t4, 6
; LA64-NEXT:    vinsgr2vr.b $vr1, $t3, 7
; LA64-NEXT:    vinsgr2vr.b $vr1, $t2, 11
; LA64-NEXT:    vinsgr2vr.b $vr1, $t1, 12
; LA64-NEXT:    vinsgr2vr.b $vr1, $t0, 15
; LA64-NEXT:    xvpermi.q $xr0, $xr1, 2
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8   %a0,  i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8   %a1,  i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8   %a2,  i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 undef,  i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 undef,  i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8   %a5,  i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 undef,  i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8   %a7,  i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8   %a8,  i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 undef,  i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 undef, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 undef, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 undef, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 undef, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 undef, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8  %a15, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 undef, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8  %a17, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8  %a18, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 undef, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8  %a20, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 undef, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8  %a22, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8  %a23, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 undef, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 undef, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 undef, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8  %a27, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8  %a28, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 undef, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 undef, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8  %a31, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_with_constant(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a5, i8 %a8, i8 %a9, i8 %a15, i8 %a17, i8 %a18, i8 %a20, i8 %a22, i8 %a23, i8 %a27, i8 %a28, i8 %a31) nounwind {
; LA32-LABEL: buildvector_v32i8_with_constant:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.b $t0, $sp, 28
; LA32-NEXT:    ld.b $t1, $sp, 24
; LA32-NEXT:    ld.b $t2, $sp, 20
; LA32-NEXT:    ld.b $t3, $sp, 16
; LA32-NEXT:    ld.b $t4, $sp, 12
; LA32-NEXT:    ld.b $t5, $sp, 8
; LA32-NEXT:    ld.b $t6, $sp, 4
; LA32-NEXT:    ld.b $t7, $sp, 0
; LA32-NEXT:    xvrepli.b $xr0, 0
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a1
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 0
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a2
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 17
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a3
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 34
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a4
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 85
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a5
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 136
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a6
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 153
; LA32-NEXT:    xvreplgr2vr.b $xr1, $a7
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 255
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t7
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 17
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t6
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 34
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t5
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 68
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t4
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 102
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t3
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 119
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t2
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 187
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t1
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 204
; LA32-NEXT:    xvreplgr2vr.b $xr1, $t0
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA32-NEXT:    xvextrins.b $xr0, $xr1, 255
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v32i8_with_constant:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ld.b $t0, $sp, 56
; LA64-NEXT:    ld.b $t1, $sp, 48
; LA64-NEXT:    ld.b $t2, $sp, 40
; LA64-NEXT:    ld.b $t3, $sp, 32
; LA64-NEXT:    ld.b $t4, $sp, 24
; LA64-NEXT:    ld.b $t5, $sp, 16
; LA64-NEXT:    ld.b $t6, $sp, 8
; LA64-NEXT:    ld.b $t7, $sp, 0
; LA64-NEXT:    xvrepli.b $xr0, 0
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a1
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 0
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a2
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 17
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a3
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 34
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a4
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 85
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a5
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 136
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a6
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 153
; LA64-NEXT:    xvreplgr2vr.b $xr1, $a7
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 18
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 255
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t7
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 17
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t6
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 34
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t5
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 68
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t4
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 102
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t3
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 119
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t2
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 187
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t1
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 204
; LA64-NEXT:    xvreplgr2vr.b $xr1, $t0
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 48
; LA64-NEXT:    xvextrins.b $xr0, $xr1, 255
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8   %a0,  i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8   %a1,  i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8   %a2,  i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8     0,  i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8     0,  i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8   %a5,  i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 undef,  i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8     0,  i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8   %a8,  i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8   %a9,  i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8     0, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 undef, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8     0, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8     0, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 undef, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8  %a15, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8     0, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8  %a17, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8  %a18, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8     0, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8  %a20, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8     0, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8  %a22, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8  %a23, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8     0, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 undef, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 undef, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8  %a27, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8  %a28, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8     0, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 undef, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8  %a31, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_subseq_2(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) nounwind {
; LA32-LABEL: buildvector_v32i8_subseq_2:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.b $t0, $sp, 32
; LA32-NEXT:    ld.b $t1, $sp, 28
; LA32-NEXT:    ld.b $t2, $sp, 24
; LA32-NEXT:    ld.b $t3, $sp, 20
; LA32-NEXT:    ld.b $t4, $sp, 16
; LA32-NEXT:    ld.b $t5, $sp, 12
; LA32-NEXT:    ld.b $t6, $sp, 8
; LA32-NEXT:    ld.b $t7, $sp, 4
; LA32-NEXT:    ld.b $t8, $sp, 0
; LA32-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; LA32-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; LA32-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; LA32-NEXT:    vinsgr2vr.b $vr0, $a4, 3
; LA32-NEXT:    vinsgr2vr.b $vr0, $a5, 4
; LA32-NEXT:    vinsgr2vr.b $vr0, $a6, 5
; LA32-NEXT:    vinsgr2vr.b $vr0, $a7, 6
; LA32-NEXT:    vinsgr2vr.b $vr0, $t8, 7
; LA32-NEXT:    vinsgr2vr.b $vr0, $t7, 8
; LA32-NEXT:    vinsgr2vr.b $vr0, $t6, 9
; LA32-NEXT:    vinsgr2vr.b $vr0, $t5, 10
; LA32-NEXT:    vinsgr2vr.b $vr0, $t4, 11
; LA32-NEXT:    vinsgr2vr.b $vr0, $t3, 12
; LA32-NEXT:    vinsgr2vr.b $vr0, $t2, 13
; LA32-NEXT:    vinsgr2vr.b $vr0, $t1, 14
; LA32-NEXT:    vinsgr2vr.b $vr0, $t0, 15
; LA32-NEXT:    xvreplve0.q $xr0, $xr0
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v32i8_subseq_2:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ld.b $t0, $sp, 64
; LA64-NEXT:    ld.b $t1, $sp, 56
; LA64-NEXT:    ld.b $t2, $sp, 48
; LA64-NEXT:    ld.b $t3, $sp, 40
; LA64-NEXT:    ld.b $t4, $sp, 32
; LA64-NEXT:    ld.b $t5, $sp, 24
; LA64-NEXT:    ld.b $t6, $sp, 16
; LA64-NEXT:    ld.b $t7, $sp, 8
; LA64-NEXT:    ld.b $t8, $sp, 0
; LA64-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; LA64-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; LA64-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; LA64-NEXT:    vinsgr2vr.b $vr0, $a4, 3
; LA64-NEXT:    vinsgr2vr.b $vr0, $a5, 4
; LA64-NEXT:    vinsgr2vr.b $vr0, $a6, 5
; LA64-NEXT:    vinsgr2vr.b $vr0, $a7, 6
; LA64-NEXT:    vinsgr2vr.b $vr0, $t8, 7
; LA64-NEXT:    vinsgr2vr.b $vr0, $t7, 8
; LA64-NEXT:    vinsgr2vr.b $vr0, $t6, 9
; LA64-NEXT:    vinsgr2vr.b $vr0, $t5, 10
; LA64-NEXT:    vinsgr2vr.b $vr0, $t4, 11
; LA64-NEXT:    vinsgr2vr.b $vr0, $t3, 12
; LA64-NEXT:    vinsgr2vr.b $vr0, $t2, 13
; LA64-NEXT:    vinsgr2vr.b $vr0, $t1, 14
; LA64-NEXT:    vinsgr2vr.b $vr0, $t0, 15
; LA64-NEXT:    xvreplve0.q $xr0, $xr0
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8 %a0,  i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1,  i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2,  i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3,  i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4,  i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5,  i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6,  i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7,  i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8 %a8,  i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 %a9,  i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 %a10, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 %a0,  i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8 %a1,  i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8 %a2,  i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 %a3,  i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8 %a4,  i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 %a5,  i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8 %a6,  i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8 %a7,  i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 %a8,  i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 %a9,  i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 %a10, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8 %a11, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8 %a12, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 %a13, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 %a14, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8 %a15, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_subseq_4(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7) nounwind {
; CHECK-LABEL: buildvector_v32i8_subseq_4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ld.b $t0, $sp, 0
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a5, 4
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a6, 5
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a7, 6
; CHECK-NEXT:    vinsgr2vr.b $vr0, $t0, 7
; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2, i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3, i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4, i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5, i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6, i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7, i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 %a2, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 %a4, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 %a5, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 %a6, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8 %a7, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8 %a4, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 %a5, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8 %a6, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8 %a7, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8 %a4, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 %a5, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 %a6, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8 %a7, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_subseq_8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3) nounwind {
; CHECK-LABEL: buildvector_v32i8_subseq_8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2, i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3, i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 %a0, i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8 %a1, i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 %a2, i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8 %a3, i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 %a2, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 %a2, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8 %a3, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8 %a2, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8 %a3, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 %a2, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8 %a3, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v32i8_subseq_16(ptr %dst, i8 %a0, i8 %a1) nounwind {
; CHECK-LABEL: buildvector_v32i8_subseq_16:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
; CHECK-NEXT:    xvreplve0.h $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
  %ins2  = insertelement <32 x i8> %ins1,  i8 %a0, i32 2
  %ins3  = insertelement <32 x i8> %ins2,  i8 %a1, i32 3
  %ins4  = insertelement <32 x i8> %ins3,  i8 %a0, i32 4
  %ins5  = insertelement <32 x i8> %ins4,  i8 %a1, i32 5
  %ins6  = insertelement <32 x i8> %ins5,  i8 %a0, i32 6
  %ins7  = insertelement <32 x i8> %ins6,  i8 %a1, i32 7
  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
  %ins10 = insertelement <32 x i8> %ins9,  i8 %a0, i32 10
  %ins11 = insertelement <32 x i8> %ins10, i8 %a1, i32 11
  %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 12
  %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 13
  %ins14 = insertelement <32 x i8> %ins13, i8 %a0, i32 14
  %ins15 = insertelement <32 x i8> %ins14, i8 %a1, i32 15
  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
  %ins18 = insertelement <32 x i8> %ins17, i8 %a0, i32 18
  %ins19 = insertelement <32 x i8> %ins18, i8 %a1, i32 19
  %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 20
  %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 21
  %ins22 = insertelement <32 x i8> %ins21, i8 %a0, i32 22
  %ins23 = insertelement <32 x i8> %ins22, i8 %a1, i32 23
  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
  %ins26 = insertelement <32 x i8> %ins25, i8 %a0, i32 26
  %ins27 = insertelement <32 x i8> %ins26, i8 %a1, i32 27
  %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 28
  %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 29
  %ins30 = insertelement <32 x i8> %ins29, i8 %a0, i32 30
  %ins31 = insertelement <32 x i8> %ins30, i8 %a1, i32 31
  store <32 x i8> %ins31, ptr %dst
  ret void
}

define void @buildvector_v16i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind {
; LA32-LABEL: buildvector_v16i16:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.h $t0, $sp, 0
; LA32-NEXT:    ld.h $t1, $sp, 32
; LA32-NEXT:    ld.h $t2, $sp, 28
; LA32-NEXT:    ld.h $t3, $sp, 24
; LA32-NEXT:    ld.h $t4, $sp, 20
; LA32-NEXT:    ld.h $t5, $sp, 4
; LA32-NEXT:    ld.h $t6, $sp, 8
; LA32-NEXT:    ld.h $t7, $sp, 12
; LA32-NEXT:    ld.h $t8, $sp, 16
; LA32-NEXT:    vinsgr2vr.h $vr0, $t5, 0
; LA32-NEXT:    vinsgr2vr.h $vr0, $t6, 1
; LA32-NEXT:    vinsgr2vr.h $vr0, $t7, 2
; LA32-NEXT:    vinsgr2vr.h $vr0, $t8, 3
; LA32-NEXT:    vinsgr2vr.h $vr0, $t4, 4
; LA32-NEXT:    vinsgr2vr.h $vr0, $t3, 5
; LA32-NEXT:    vinsgr2vr.h $vr0, $t2, 6
; LA32-NEXT:    vinsgr2vr.h $vr0, $t1, 7
; LA32-NEXT:    vinsgr2vr.h $vr1, $a1, 0
; LA32-NEXT:    vinsgr2vr.h $vr1, $a2, 1
; LA32-NEXT:    vinsgr2vr.h $vr1, $a3, 2
; LA32-NEXT:    vinsgr2vr.h $vr1, $a4, 3
; LA32-NEXT:    vinsgr2vr.h $vr1, $a5, 4
; LA32-NEXT:    vinsgr2vr.h $vr1, $a6, 5
; LA32-NEXT:    vinsgr2vr.h $vr1, $a7, 6
; LA32-NEXT:    vinsgr2vr.h $vr1, $t0, 7
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA32-NEXT:    xvst $xr1, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v16i16:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    ld.h $t0, $sp, 0
; LA64-NEXT:    ld.h $t1, $sp, 64
; LA64-NEXT:    ld.h $t2, $sp, 56
; LA64-NEXT:    ld.h $t3, $sp, 48
; LA64-NEXT:    ld.h $t4, $sp, 40
; LA64-NEXT:    ld.h $t5, $sp, 8
; LA64-NEXT:    ld.h $t6, $sp, 16
; LA64-NEXT:    ld.h $t7, $sp, 24
; LA64-NEXT:    ld.h $t8, $sp, 32
; LA64-NEXT:    vinsgr2vr.h $vr0, $t5, 0
; LA64-NEXT:    vinsgr2vr.h $vr0, $t6, 1
; LA64-NEXT:    vinsgr2vr.h $vr0, $t7, 2
; LA64-NEXT:    vinsgr2vr.h $vr0, $t8, 3
; LA64-NEXT:    vinsgr2vr.h $vr0, $t4, 4
; LA64-NEXT:    vinsgr2vr.h $vr0, $t3, 5
; LA64-NEXT:    vinsgr2vr.h $vr0, $t2, 6
; LA64-NEXT:    vinsgr2vr.h $vr0, $t1, 7
; LA64-NEXT:    vinsgr2vr.h $vr1, $a1, 0
; LA64-NEXT:    vinsgr2vr.h $vr1, $a2, 1
; LA64-NEXT:    vinsgr2vr.h $vr1, $a3, 2
; LA64-NEXT:    vinsgr2vr.h $vr1, $a4, 3
; LA64-NEXT:    vinsgr2vr.h $vr1, $a5, 4
; LA64-NEXT:    vinsgr2vr.h $vr1, $a6, 5
; LA64-NEXT:    vinsgr2vr.h $vr1, $a7, 6
; LA64-NEXT:    vinsgr2vr.h $vr1, $t0, 7
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA64-NEXT:    xvst $xr1, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16 %a0,  i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1,  i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2,  i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3,  i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16 %a4,  i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16 %a5,  i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16 %a6,  i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16 %a7,  i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16 %a8,  i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16 %a9,  i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16 %a10, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16 %a11, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16 %a14, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16 %a15, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v16i16_partial(ptr %dst, i16 %a0, i16 %a2, i16 %a5, i16 %a6, i16 %a7, i16 %a12, i16 %a13) nounwind {
; CHECK-LABEL: buildvector_v16i16_partial:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a6, 4
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a7, 5
; CHECK-NEXT:    vinsgr2vr.h $vr1, $a1, 0
; CHECK-NEXT:    vinsgr2vr.h $vr1, $a2, 2
; CHECK-NEXT:    vinsgr2vr.h $vr1, $a3, 5
; CHECK-NEXT:    vinsgr2vr.h $vr1, $a4, 6
; CHECK-NEXT:    vinsgr2vr.h $vr1, $a5, 7
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 2
; CHECK-NEXT:    xvst $xr1, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16   %a0,  i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16 undef,  i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16   %a2,  i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16 undef,  i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16 undef,  i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16   %a5,  i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16   %a6,  i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16   %a7,  i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16 undef,  i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16 undef,  i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16 undef, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16 undef, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16  %a12, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16  %a13, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16 undef, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16 undef, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v16i16_with_constant(ptr %dst, i16 %a2, i16 %a3, i16 %a5, i16 %a6, i16 %a7, i16 %a12, i16 %a13) nounwind {
; CHECK-LABEL: buildvector_v16i16_with_constant:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.h $xr0, 2
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a1
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 18
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 34
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a2
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 18
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 51
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a3
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 18
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 85
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a4
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 18
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 102
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a5
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 18
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 119
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a6
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 48
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 68
; CHECK-NEXT:    xvreplgr2vr.h $xr1, $a7
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 48
; CHECK-NEXT:    xvextrins.h $xr0, $xr1, 85
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16    2,  i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16    2,  i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16  %a2,  i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16  %a3,  i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16    2,  i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16  %a5,  i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16  %a6,  i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16  %a7,  i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16    2,  i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16    2,  i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16    2, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16    2, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16    2, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16    2, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v16i16_subseq_2(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
; CHECK-LABEL: buildvector_v16i16_subseq_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ld.h $t0, $sp, 0
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a5, 4
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a6, 5
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a7, 6
; CHECK-NEXT:    vinsgr2vr.h $vr0, $t0, 7
; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2, i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3, i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16 %a4, i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16 %a5, i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16 %a6, i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16 %a7, i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16 %a2, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16 %a4, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16 %a5, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16 %a6, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16 %a7, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v16i16_subseq_4(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3) nounwind {
; CHECK-LABEL: buildvector_v16i16_subseq_4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2, i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3, i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16 %a0, i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16 %a1, i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16 %a2, i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16 %a3, i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16 %a2, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16 %a2, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16 %a3, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v16i16_subseq_8(ptr %dst, i16 %a0, i16 %a1) nounwind {
; CHECK-LABEL: buildvector_v16i16_subseq_8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
  %ins2  = insertelement <16 x i16> %ins1,  i16 %a0, i32 2
  %ins3  = insertelement <16 x i16> %ins2,  i16 %a1, i32 3
  %ins4  = insertelement <16 x i16> %ins3,  i16 %a0, i32 4
  %ins5  = insertelement <16 x i16> %ins4,  i16 %a1, i32 5
  %ins6  = insertelement <16 x i16> %ins5,  i16 %a0, i32 6
  %ins7  = insertelement <16 x i16> %ins6,  i16 %a1, i32 7
  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
  %ins10 = insertelement <16 x i16> %ins9,  i16 %a0, i32 10
  %ins11 = insertelement <16 x i16> %ins10, i16 %a1, i32 11
  %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 12
  %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 13
  %ins14 = insertelement <16 x i16> %ins13, i16 %a0, i32 14
  %ins15 = insertelement <16 x i16> %ins14, i16 %a1, i32 15
  store <16 x i16> %ins15, ptr %dst
  ret void
}

define void @buildvector_v8i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
; CHECK-LABEL: buildvector_v8i32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ld.w $t0, $sp, 0
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a5, 0
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a6, 1
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a7, 2
; CHECK-NEXT:    vinsgr2vr.w $vr0, $t0, 3
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a1, 0
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a2, 1
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a3, 2
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a4, 3
; CHECK-NEXT:    xvpermi.q $xr1, $xr0, 2
; CHECK-NEXT:    xvst $xr1, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
  %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 2
  %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 3
  %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 4
  %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 5
  %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 6
  %ins7 = insertelement <8 x i32> %ins6, i32 %a7, i32 7
  store <8 x i32> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8i32_partial(ptr %dst, i32 %a2, i32 %a4, i32 %a5, i32 %a6) nounwind {
; CHECK-LABEL: buildvector_v8i32_partial:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 2
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a2, 0
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a3, 1
; CHECK-NEXT:    vinsgr2vr.w $vr1, $a4, 2
; CHECK-NEXT:    xvpermi.q $xr0, $xr1, 2
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x i32> undef, i32 undef, i32 0
  %ins1 = insertelement <8 x i32> %ins0, i32 undef, i32 1
  %ins2 = insertelement <8 x i32> %ins1, i32   %a2, i32 2
  %ins3 = insertelement <8 x i32> %ins2, i32 undef, i32 3
  %ins4 = insertelement <8 x i32> %ins3, i32   %a4, i32 4
  %ins5 = insertelement <8 x i32> %ins4, i32   %a5, i32 5
  %ins6 = insertelement <8 x i32> %ins5, i32   %a6, i32 6
  %ins7 = insertelement <8 x i32> %ins6, i32 undef, i32 7
  store <8 x i32> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8i32_with_constant(ptr %dst, i32 %a2, i32 %a4, i32 %a5, i32 %a6) nounwind {
; CHECK-LABEL: buildvector_v8i32_with_constant:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.b $xr0, 0
; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a1, 2
; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a2, 4
; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a3, 5
; CHECK-NEXT:    xvinsgr2vr.w $xr0, $a4, 6
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x i32> undef, i32   0, i32 0
  %ins1 = insertelement <8 x i32> %ins0, i32   0, i32 1
  %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 2
  %ins3 = insertelement <8 x i32> %ins2, i32   0, i32 3
  %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 4
  %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 5
  %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 6
  %ins7 = insertelement <8 x i32> %ins6, i32   0, i32 7
  store <8 x i32> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8i32_subseq_2(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
; CHECK-LABEL: buildvector_v8i32_subseq_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a2, 1
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a3, 2
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a4, 3
; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
  %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 2
  %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 3
  %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 4
  %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 5
  %ins6 = insertelement <8 x i32> %ins5, i32 %a2, i32 6
  %ins7 = insertelement <8 x i32> %ins6, i32 %a3, i32 7
  store <8 x i32> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8i32_subseq_4(ptr %dst, i32 %a0, i32 %a1) nounwind {
; CHECK-LABEL: buildvector_v8i32_subseq_4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 0
; CHECK-NEXT:    vinsgr2vr.w $vr0, $a2, 1
; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
  %ins2 = insertelement <8 x i32> %ins1, i32 %a0, i32 2
  %ins3 = insertelement <8 x i32> %ins2, i32 %a1, i32 3
  %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 4
  %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 5
  %ins6 = insertelement <8 x i32> %ins5, i32 %a0, i32 6
  %ins7 = insertelement <8 x i32> %ins6, i32 %a1, i32 7
  store <8 x i32> %ins7, ptr %dst
  ret void
}

define void @buildvector_v4i64(ptr %dst, i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind {
; LA32-LABEL: buildvector_v4i64:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    ld.w $t0, $sp, 0
; LA32-NEXT:    vinsgr2vr.w $vr0, $a5, 0
; LA32-NEXT:    vinsgr2vr.w $vr0, $a6, 1
; LA32-NEXT:    vinsgr2vr.w $vr0, $a7, 2
; LA32-NEXT:    vinsgr2vr.w $vr0, $t0, 3
; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 1
; LA32-NEXT:    vinsgr2vr.w $vr1, $a3, 2
; LA32-NEXT:    vinsgr2vr.w $vr1, $a4, 3
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA32-NEXT:    xvst $xr1, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v4i64:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    vinsgr2vr.d $vr0, $a3, 0
; LA64-NEXT:    vinsgr2vr.d $vr0, $a4, 1
; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 0
; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 1
; LA64-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA64-NEXT:    xvst $xr1, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 0
  %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 1
  %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 2
  %ins3 = insertelement <4 x i64> %ins2, i64 %a3, i32 3
  store <4 x i64> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4i64_partial(ptr %dst, i64 %a1, i64 %a2) nounwind {
; LA32-LABEL: buildvector_v4i64_partial:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    vinsgr2vr.w $vr0, $a3, 0
; LA32-NEXT:    vinsgr2vr.w $vr0, $a4, 1
; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 3
; LA32-NEXT:    xvpermi.q $xr1, $xr0, 2
; LA32-NEXT:    xvst $xr1, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v4i64_partial:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvinsgr2vr.d $xr0, $a1, 1
; LA64-NEXT:    xvinsgr2vr.d $xr0, $a2, 2
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0 = insertelement <4 x i64> undef, i64 undef, i32 0
  %ins1 = insertelement <4 x i64> %ins0, i64   %a1, i32 1
  %ins2 = insertelement <4 x i64> %ins1, i64   %a2, i32 2
  %ins3 = insertelement <4 x i64> %ins2, i64 undef, i32 3
  store <4 x i64> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4i64_with_constant(ptr %dst, i64 %a0, i64 %a2) nounwind {
; LA32-LABEL: buildvector_v4i64_with_constant:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvrepli.b $xr0, 0
; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
; LA32-NEXT:    xvinsgr2vr.w $xr0, $a2, 1
; LA32-NEXT:    xvinsgr2vr.w $xr0, $a3, 4
; LA32-NEXT:    xvinsgr2vr.w $xr0, $a4, 5
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v4i64_with_constant:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvrepli.b $xr0, 0
; LA64-NEXT:    xvinsgr2vr.d $xr0, $a1, 0
; LA64-NEXT:    xvinsgr2vr.d $xr0, $a2, 2
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 0
  %ins1 = insertelement <4 x i64> %ins0, i64   0, i32 1
  %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 2
  %ins3 = insertelement <4 x i64> %ins2, i64   0, i32 3
  store <4 x i64> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4i64_subseq_2(ptr %dst, i64 %a0, i64 %a1) nounwind {
; LA32-LABEL: buildvector_v4i64_subseq_2:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 0
; LA32-NEXT:    vinsgr2vr.w $vr0, $a2, 1
; LA32-NEXT:    vinsgr2vr.w $vr0, $a3, 2
; LA32-NEXT:    vinsgr2vr.w $vr0, $a4, 3
; LA32-NEXT:    xvreplve0.q $xr0, $xr0
; LA32-NEXT:    xvst $xr0, $a0, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: buildvector_v4i64_subseq_2:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    vinsgr2vr.d $vr0, $a1, 0
; LA64-NEXT:    vinsgr2vr.d $vr0, $a2, 1
; LA64-NEXT:    xvreplve0.q $xr0, $xr0
; LA64-NEXT:    xvst $xr0, $a0, 0
; LA64-NEXT:    ret
entry:
  %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 0
  %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 1
  %ins2 = insertelement <4 x i64> %ins1, i64 %a0, i32 2
  %ins3 = insertelement <4 x i64> %ins2, i64 %a1, i32 3
  store <4 x i64> %ins3, ptr %dst
  ret void
}

define void @buildvector_v8f32(ptr %dst, float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind {
; CHECK-LABEL: buildvector_v8f32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f7 killed $f7 def $vr7
; CHECK-NEXT:    # kill: def $f6 killed $f6 def $vr6
; CHECK-NEXT:    # kill: def $f5 killed $f5 def $vr5
; CHECK-NEXT:    # kill: def $f4 killed $f4 def $xr4
; CHECK-NEXT:    # kill: def $f3 killed $f3 def $vr3
; CHECK-NEXT:    # kill: def $f2 killed $f2 def $vr2
; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
; CHECK-NEXT:    vextrins.w $vr4, $vr5, 16
; CHECK-NEXT:    vextrins.w $vr4, $vr6, 32
; CHECK-NEXT:    vextrins.w $vr4, $vr7, 48
; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
; CHECK-NEXT:    vextrins.w $vr0, $vr2, 32
; CHECK-NEXT:    vextrins.w $vr0, $vr3, 48
; CHECK-NEXT:    xvpermi.q $xr0, $xr4, 2
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
  %ins2 = insertelement <8 x float> %ins1, float %a2, i32 2
  %ins3 = insertelement <8 x float> %ins2, float %a3, i32 3
  %ins4 = insertelement <8 x float> %ins3, float %a4, i32 4
  %ins5 = insertelement <8 x float> %ins4, float %a5, i32 5
  %ins6 = insertelement <8 x float> %ins5, float %a6, i32 6
  %ins7 = insertelement <8 x float> %ins6, float %a7, i32 7
  store <8 x float> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8f32_partial(ptr %dst, float %a1, float %a2, float %a5, float %a7) nounwind {
; CHECK-LABEL: buildvector_v8f32_partial:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f3 killed $f3 def $vr3
; CHECK-NEXT:    # kill: def $f2 killed $f2 def $vr2
; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $vr0
; CHECK-NEXT:    vextrins.w $vr2, $vr2, 16
; CHECK-NEXT:    vextrins.w $vr2, $vr3, 48
; CHECK-NEXT:    vextrins.w $vr0, $vr0, 16
; CHECK-NEXT:    vextrins.w $vr0, $vr1, 32
; CHECK-NEXT:    xvpermi.q $xr0, $xr2, 2
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x float> undef, float undef, i32 0
  %ins1 = insertelement <8 x float> %ins0, float   %a1, i32 1
  %ins2 = insertelement <8 x float> %ins1, float   %a2, i32 2
  %ins3 = insertelement <8 x float> %ins2, float undef, i32 3
  %ins4 = insertelement <8 x float> %ins3, float undef, i32 4
  %ins5 = insertelement <8 x float> %ins4, float   %a5, i32 5
  %ins6 = insertelement <8 x float> %ins5, float undef, i32 6
  %ins7 = insertelement <8 x float> %ins6, float   %a7, i32 7
  store <8 x float> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8f32_with_constant(ptr %dst, float %a1, float %a2, float %a5, float %a7) nounwind {
; CHECK-LABEL: buildvector_v8f32_with_constant:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f3 killed $f3 def $xr3
; CHECK-NEXT:    # kill: def $f2 killed $f2 def $xr2
; CHECK-NEXT:    # kill: def $f1 killed $f1 def $xr1
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
; CHECK-NEXT:    xvldi $xr4, -3264
; CHECK-NEXT:    xvinsve0.w $xr4, $xr0, 1
; CHECK-NEXT:    xvinsve0.w $xr4, $xr1, 2
; CHECK-NEXT:    xvinsve0.w $xr4, $xr2, 5
; CHECK-NEXT:    xvinsve0.w $xr4, $xr3, 7
; CHECK-NEXT:    xvst $xr4, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x float> undef, float 2.0, i32 0
  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
  %ins2 = insertelement <8 x float> %ins1, float %a2, i32 2
  %ins3 = insertelement <8 x float> %ins2, float 2.0, i32 3
  %ins4 = insertelement <8 x float> %ins3, float 2.0, i32 4
  %ins5 = insertelement <8 x float> %ins4, float %a5, i32 5
  %ins6 = insertelement <8 x float> %ins5, float 2.0, i32 6
  %ins7 = insertelement <8 x float> %ins6, float %a7, i32 7
  store <8 x float> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8f32_subseq_2(ptr %dst, float %a0, float %a1, float %a2, float %a3) nounwind {
; CHECK-LABEL: buildvector_v8f32_subseq_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f3 killed $f3 def $vr3
; CHECK-NEXT:    # kill: def $f2 killed $f2 def $vr2
; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
; CHECK-NEXT:    vextrins.w $vr0, $vr2, 32
; CHECK-NEXT:    vextrins.w $vr0, $vr3, 48
; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
  %ins2 = insertelement <8 x float> %ins1, float %a2, i32 2
  %ins3 = insertelement <8 x float> %ins2, float %a3, i32 3
  %ins4 = insertelement <8 x float> %ins3, float %a0, i32 4
  %ins5 = insertelement <8 x float> %ins4, float %a1, i32 5
  %ins6 = insertelement <8 x float> %ins5, float %a2, i32 6
  %ins7 = insertelement <8 x float> %ins6, float %a3, i32 7
  store <8 x float> %ins7, ptr %dst
  ret void
}

define void @buildvector_v8f32_subseq_4(ptr %dst, float %a0, float %a1) nounwind {
; CHECK-LABEL: buildvector_v8f32_subseq_4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
  %ins2 = insertelement <8 x float> %ins1, float %a0, i32 2
  %ins3 = insertelement <8 x float> %ins2, float %a1, i32 3
  %ins4 = insertelement <8 x float> %ins3, float %a0, i32 4
  %ins5 = insertelement <8 x float> %ins4, float %a1, i32 5
  %ins6 = insertelement <8 x float> %ins5, float %a0, i32 6
  %ins7 = insertelement <8 x float> %ins6, float %a1, i32 7
  store <8 x float> %ins7, ptr %dst
  ret void
}

define void @buildvector_v4f64(ptr %dst, double %a0, double %a1, double %a2, double %a3) nounwind {
; CHECK-LABEL: buildvector_v4f64:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f3_64 killed $f3_64 def $vr3
; CHECK-NEXT:    # kill: def $f2_64 killed $f2_64 def $xr2
; CHECK-NEXT:    # kill: def $f1_64 killed $f1_64 def $vr1
; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
; CHECK-NEXT:    vextrins.d $vr2, $vr3, 16
; CHECK-NEXT:    vextrins.d $vr0, $vr1, 16
; CHECK-NEXT:    xvpermi.q $xr0, $xr2, 2
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <4 x double> undef, double %a0, i32 0
  %ins1 = insertelement <4 x double> %ins0, double %a1, i32 1
  %ins2 = insertelement <4 x double> %ins1, double %a2, i32 2
  %ins3 = insertelement <4 x double> %ins2, double %a3, i32 3
  store <4 x double> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4f64_partial(ptr %dst, double %a0, double %a3) nounwind {
; CHECK-LABEL: buildvector_v4f64_partial:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f1_64 killed $f1_64 def $xr1
; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
; CHECK-NEXT:    xvinsve0.d $xr0, $xr1, 3
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <4 x double> undef, double   %a0, i32 0
  %ins1 = insertelement <4 x double> %ins0, double undef, i32 1
  %ins2 = insertelement <4 x double> %ins1, double undef, i32 2
  %ins3 = insertelement <4 x double> %ins2, double   %a3, i32 3
  store <4 x double> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4f64_with_constant(ptr %dst, double %a0, double %a3) nounwind {
; CHECK-LABEL: buildvector_v4f64_with_constant:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f1_64 killed $f1_64 def $xr1
; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
; CHECK-NEXT:    xvrepli.b $xr2, 0
; CHECK-NEXT:    xvinsve0.d $xr2, $xr0, 0
; CHECK-NEXT:    xvinsve0.d $xr2, $xr1, 3
; CHECK-NEXT:    xvst $xr2, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <4 x double> undef, double %a0, i32 0
  %ins1 = insertelement <4 x double> %ins0, double 0.0, i32 1
  %ins2 = insertelement <4 x double> %ins1, double 0.0, i32 2
  %ins3 = insertelement <4 x double> %ins2, double %a3, i32 3
  store <4 x double> %ins3, ptr %dst
  ret void
}

define void @buildvector_v4f64_subseq_2(ptr %dst, double %a0, double %a1) nounwind {
; CHECK-LABEL: buildvector_v4f64_subseq_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $f1_64 killed $f1_64 def $vr1
; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
; CHECK-NEXT:    vextrins.d $vr0, $vr1, 16
; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a0, 0
; CHECK-NEXT:    ret
entry:
  %ins0 = insertelement <4 x double> undef, double %a0, i32 0
  %ins1 = insertelement <4 x double> %ins0, double %a1, i32 1
  %ins2 = insertelement <4 x double> %ins1, double %a0, i32 2
  %ins3 = insertelement <4 x double> %ins2, double %a1, i32 3
  store <4 x double> %ins3, ptr %dst
  ret void
}