; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64

define <32 x i8> @insert_extract_v32i8(<32 x i8> %a) nounwind {
; CHECK-LABEL: insert_extract_v32i8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvextrins.b $xr0, $xr0, 31
; CHECK-NEXT:    ret
entry:
  %b_lo = extractelement <32 x i8> %a, i32 15
  %b_hi = extractelement <32 x i8> %a, i32 31
  %c = insertelement <32 x i8> %a, i8 %b_lo, i32 1
  %d = insertelement <32 x i8> %c, i8 %b_hi, i32 17
  ret <32 x i8> %d
}

define <16 x i16> @insert_extract_v16i16(<16 x i16> %a) nounwind {
; CHECK-LABEL: insert_extract_v16i16:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvextrins.h $xr0, $xr0, 23
; CHECK-NEXT:    ret
entry:
  %b_lo = extractelement <16 x i16> %a, i32 7
  %b_hi = extractelement <16 x i16> %a, i32 15
  %c = insertelement <16 x i16> %a, i16 %b_lo, i32 1
  %d = insertelement <16 x i16> %c, i16 %b_hi, i32 9
  ret <16 x i16> %d
}

define <8 x i32> @insert_extract_v8i32(<8 x i32> %a) nounwind {
; CHECK-LABEL: insert_extract_v8i32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvextrins.w $xr0, $xr0, 19
; CHECK-NEXT:    ret
entry:
  %b_lo = extractelement <8 x i32> %a, i32 3
  %b_hi = extractelement <8 x i32> %a, i32 7
  %c = insertelement <8 x i32> %a, i32 %b_lo, i32 1
  %d = insertelement <8 x i32> %c, i32 %b_hi, i32 5
  ret <8 x i32> %d
}

define <8 x float> @insert_extract_v8f32(<8 x float> %a) nounwind {
; CHECK-LABEL: insert_extract_v8f32:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvextrins.w $xr0, $xr0, 19
; CHECK-NEXT:    ret
entry:
  %b_lo = extractelement <8 x float> %a, i32 3
  %b_hi = extractelement <8 x float> %a, i32 7
  %c = insertelement <8 x float> %a, float %b_lo, i32 1
  %d = insertelement <8 x float> %c, float %b_hi, i32 5
  ret <8 x float> %d
}

define <4 x i64> @insert_extract_v4i64(<4 x i64> %a) nounwind {
; LA32-LABEL: insert_extract_v4i64:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvpickve.w $xr1, $xr0, 2
; LA32-NEXT:    xvpickve.w $xr2, $xr0, 3
; LA32-NEXT:    xvpickve.w $xr3, $xr0, 6
; LA32-NEXT:    xvpickve.w $xr4, $xr0, 7
; LA32-NEXT:    xvinsve0.w $xr0, $xr1, 0
; LA32-NEXT:    xvinsve0.w $xr0, $xr2, 1
; LA32-NEXT:    xvinsve0.w $xr0, $xr3, 4
; LA32-NEXT:    xvinsve0.w $xr0, $xr4, 5
; LA32-NEXT:    ret
;
; LA64-LABEL: insert_extract_v4i64:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvextrins.d $xr0, $xr0, 1
; LA64-NEXT:    ret
entry:
  %b_lo = extractelement <4 x i64> %a, i32 1
  %b_hi = extractelement <4 x i64> %a, i32 3
  %c = insertelement <4 x i64> %a, i64 %b_lo, i32 0
  %d = insertelement <4 x i64> %c, i64 %b_hi, i32 2
  ret <4 x i64> %d
}

define <4 x double> @insert_extract_v4f64(<4 x double> %a) nounwind {
; CHECK-LABEL: insert_extract_v4f64:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvextrins.d $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %b_lo = extractelement <4 x double> %a, i32 1
  %b_hi = extractelement <4 x double> %a, i32 3
  %c = insertelement <4 x double> %a, double %b_lo, i32 0
  %d = insertelement <4 x double> %c, double %b_hi, i32 2
  ret <4 x double> %d
}