; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx %s -o - | FileCheck %s
; RUN: llc --mtriple=loongarch64 --mattr=+lsx %s -o - | FileCheck %s

;; vreplvei.b
define <16 x i8> @shufflevector_v16i8(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LABEL: shufflevector_v16i8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.b $vr0, $vr0, 1
; CHECK-NEXT:    ret
    %c = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    ret <16 x i8> %c
}

;; vreplvei.h
define <8 x i16> @shufflevector_v8i16(<8 x i16> %a, <8 x i16> %b) {
; CHECK-LABEL: shufflevector_v8i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.h $vr0, $vr1, 2
; CHECK-NEXT:    ret
    %c = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10>
    ret <8 x i16> %c
}

;; vreplvei.w
define <4 x i32> @shufflevector_v4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: shufflevector_v4i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 0
; CHECK-NEXT:    ret
    %c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
    ret <4 x i32> %c
}

;; vreplvei.d
define <2 x i64> @shufflevector_v2i64(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: shufflevector_v2i64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 1
; CHECK-NEXT:    ret
    %c = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 1>
    ret <2 x i64> %c
}

;; vreplvei.w
define <4 x float> @shufflevector_v4f32(<4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: shufflevector_v4f32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 0
; CHECK-NEXT:    ret
    %c = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
    ret <4 x float> %c
}

;; vreplvei.d
define <2 x double> @shufflevector_v2f64(<2 x double> %a, <2 x double> %b) {
; CHECK-LABEL: shufflevector_v2f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 1
; CHECK-NEXT:    ret
    %c = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 1>
    ret <2 x double> %c
}