; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -mtriple=mips -mcpu=mips32r2 < %s | FileCheck %s define i32 @fcmp_olt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_olt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ole_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ole_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ogt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ogt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_oge_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_oge_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_oeq_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_oeq_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_one_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_one_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"one", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ult_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ult_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ule_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ule_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ugt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ugt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_uge_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_uge_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ueq_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_ueq_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_une_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmp_une_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_olt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_olt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ole_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ole_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ogt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ogt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_oge_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_oge_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_oeq_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_oeq_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_one_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_one_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"one", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ult_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ult_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ule_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ule_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ugt_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ugt_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_uge_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_uge_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ueq_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_ueq_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_une_f32(float %a, float %b) #0 { ; CHECK-LABEL: fcmps_une_f32: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.s $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_olt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_olt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"olt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ole_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ole_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ole", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ogt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ogt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ogt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_oge_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_oge_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_oeq_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_oeq_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oeq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_one_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_one_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"one", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ult_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ult_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ult", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ule_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ule_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ule", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ugt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ugt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ugt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_uge_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_uge_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"uge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_ueq_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_ueq_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ueq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmp_une_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmp_une_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"une", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_olt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_olt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"olt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ole_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ole_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ole", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ogt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ogt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ogt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_oge_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_oge_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"oge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_oeq_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_oeq_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"oeq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_one_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_one_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"one", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ult_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ult_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ult.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ult", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ule_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ule_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ule.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ule", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ugt_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ugt_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ole.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ugt", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_uge_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_uge_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.olt.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"uge", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_ueq_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_ueq_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.ueq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movf $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ueq", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } define i32 @fcmps_une_f64(double %a, double %b) #0 { ; CHECK-LABEL: fcmps_une_f64: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: c.eq.d $f12, $f14 ; CHECK-NEXT: jr $ra ; CHECK-NEXT: movt $2, $zero, $fcc0 %cmp = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"une", metadata !"fpexcept.strict") #0 %conv = zext i1 %cmp to i32 ret i32 %conv } attributes #0 = { strictfp } declare i1 @llvm.experimental.constrained.fcmps.f32(float, float, metadata, metadata) declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata) declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata) declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata)