; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; -nvptx-allow-ftz-atomics forces atomicrmw fadd to lower to atom.add even when
; the hardware's FTZ behavior doesn't match the function's denormal mode, where
; we'd otherwise emit a CAS loop. Compare the default lowering (DEFAULT) against
; the flag (ALLOW).
; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 | FileCheck %s --check-prefixes=CHECK,DEFAULT
; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 -nvptx-allow-ftz-atomics | FileCheck %s --check-prefixes=CHECK,ALLOW
; RUN: %if ptxas-sm_90 && ptxas-isa-8.7 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 | %ptxas-verify -arch=sm_90 %}
; RUN: %if ptxas-sm_90 && ptxas-isa-8.7 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 -nvptx-allow-ftz-atomics | %ptxas-verify -arch=sm_90 %}

; global f32: atom.add flushes, so default uses a CAS loop (function is not FTZ);
; the flag forces atom.add.
define float @fadd_f32_global(ptr addrspace(1) %addr, float %val) {
; DEFAULT-LABEL: fadd_f32_global(
; DEFAULT:       {
; DEFAULT-NEXT:    .reg .pred %p<2>;
; DEFAULT-NEXT:    .reg .b32 %r<5>;
; DEFAULT-NEXT:    .reg .b64 %rd<2>;
; DEFAULT-EMPTY:
; DEFAULT-NEXT:  // %bb.0:
; DEFAULT-NEXT:    ld.param.b32 %r2, [fadd_f32_global_param_1];
; DEFAULT-NEXT:    ld.param.b64 %rd1, [fadd_f32_global_param_0];
; DEFAULT-NEXT:    ld.relaxed.sys.global.b32 %r4, [%rd1];
; DEFAULT-NEXT:  $L__BB0_1: // %atomicrmw.start
; DEFAULT-NEXT:    // =>This Inner Loop Header: Depth=1
; DEFAULT-NEXT:    add.rn.f32 %r3, %r4, %r2;
; DEFAULT-NEXT:    atom.relaxed.sys.global.cas.b32 %r1, [%rd1], %r4, %r3;
; DEFAULT-NEXT:    setp.ne.b32 %p1, %r1, %r4;
; DEFAULT-NEXT:    mov.b32 %r4, %r1;
; DEFAULT-NEXT:    @%p1 bra $L__BB0_1;
; DEFAULT-NEXT:  // %bb.2: // %atomicrmw.end
; DEFAULT-NEXT:    st.param.b32 [func_retval0], %r1;
; DEFAULT-NEXT:    ret;
;
; ALLOW-LABEL: fadd_f32_global(
; ALLOW:       {
; ALLOW-NEXT:    .reg .b32 %r<3>;
; ALLOW-NEXT:    .reg .b64 %rd<2>;
; ALLOW-EMPTY:
; ALLOW-NEXT:  // %bb.0:
; ALLOW-NEXT:    ld.param.b64 %rd1, [fadd_f32_global_param_0];
; ALLOW-NEXT:    ld.param.b32 %r1, [fadd_f32_global_param_1];
; ALLOW-NEXT:    atom.relaxed.sys.global.add.f32 %r2, [%rd1], %r1;
; ALLOW-NEXT:    st.param.b32 [func_retval0], %r2;
; ALLOW-NEXT:    ret;
  %r = atomicrmw fadd ptr addrspace(1) %addr, float %val monotonic
  ret float %r
}

; generic f32: we can't know the memory space, so default always uses a CAS loop;
; the flag forces atom.add.
define float @fadd_f32_generic(ptr %addr, float %val) {
; DEFAULT-LABEL: fadd_f32_generic(
; DEFAULT:       {
; DEFAULT-NEXT:    .reg .pred %p<2>;
; DEFAULT-NEXT:    .reg .b32 %r<5>;
; DEFAULT-NEXT:    .reg .b64 %rd<2>;
; DEFAULT-EMPTY:
; DEFAULT-NEXT:  // %bb.0:
; DEFAULT-NEXT:    ld.param.b32 %r2, [fadd_f32_generic_param_1];
; DEFAULT-NEXT:    ld.param.b64 %rd1, [fadd_f32_generic_param_0];
; DEFAULT-NEXT:    ld.relaxed.sys.b32 %r4, [%rd1];
; DEFAULT-NEXT:  $L__BB1_1: // %atomicrmw.start
; DEFAULT-NEXT:    // =>This Inner Loop Header: Depth=1
; DEFAULT-NEXT:    add.rn.f32 %r3, %r4, %r2;
; DEFAULT-NEXT:    atom.relaxed.sys.cas.b32 %r1, [%rd1], %r4, %r3;
; DEFAULT-NEXT:    setp.ne.b32 %p1, %r1, %r4;
; DEFAULT-NEXT:    mov.b32 %r4, %r1;
; DEFAULT-NEXT:    @%p1 bra $L__BB1_1;
; DEFAULT-NEXT:  // %bb.2: // %atomicrmw.end
; DEFAULT-NEXT:    st.param.b32 [func_retval0], %r1;
; DEFAULT-NEXT:    ret;
;
; ALLOW-LABEL: fadd_f32_generic(
; ALLOW:       {
; ALLOW-NEXT:    .reg .b32 %r<3>;
; ALLOW-NEXT:    .reg .b64 %rd<2>;
; ALLOW-EMPTY:
; ALLOW-NEXT:  // %bb.0:
; ALLOW-NEXT:    ld.param.b64 %rd1, [fadd_f32_generic_param_0];
; ALLOW-NEXT:    ld.param.b32 %r1, [fadd_f32_generic_param_1];
; ALLOW-NEXT:    atom.relaxed.sys.add.f32 %r2, [%rd1], %r1;
; ALLOW-NEXT:    st.param.b32 [func_retval0], %r2;
; ALLOW-NEXT:    ret;
  %r = atomicrmw fadd ptr %addr, float %val monotonic
  ret float %r
}

; shared f32: atom.add does not flush, matching the non-FTZ function, so this is
; atom.add either way.
define float @fadd_f32_shared(ptr addrspace(3) %addr, float %val) {
; CHECK-LABEL: fadd_f32_shared(
; CHECK:       {
; CHECK-NEXT:    .reg .b32 %r<3>;
; CHECK-NEXT:    .reg .b64 %rd<2>;
; CHECK-EMPTY:
; CHECK-NEXT:  // %bb.0:
; CHECK-NEXT:    ld.param.b64 %rd1, [fadd_f32_shared_param_0];
; CHECK-NEXT:    ld.param.b32 %r1, [fadd_f32_shared_param_1];
; CHECK-NEXT:    atom.relaxed.sys.shared.add.f32 %r2, [%rd1], %r1;
; CHECK-NEXT:    st.param.b32 [func_retval0], %r2;
; CHECK-NEXT:    ret;
  %r = atomicrmw fadd ptr addrspace(3) %addr, float %val monotonic
  ret float %r
}