; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 ; ## Support i16x2 instructions ; RUN: llc < %s -mcpu=sm_90 -mattr=+ptx80 -O0 -disable-post-ra -frame-pointer=all -verify-machineinstrs \ ; RUN: | FileCheck %s --check-prefixes=CHECK,O0 ; RUN: llc < %s -mcpu=sm_90 -mattr=+ptx80 -verify-machineinstrs \ ; RUN: | FileCheck %s --check-prefixes=CHECK,O3 ; RUN: %if ptxas %{ \ ; RUN: llc < %s -mcpu=sm_90 -mattr=+ptx80 -O0 -disable-post-ra -frame-pointer=all -verify-machineinstrs \ ; RUN: | %ptxas-verify -arch=sm_90 \ ; RUN: %} ; RUN: %if ptxas %{ \ ; RUN: llc < %s -mcpu=sm_90 -mattr=+ptx80 -verify-machineinstrs \ ; RUN: | %ptxas-verify -arch=sm_90 \ ; RUN: %} target triple = "nvptx64-nvidia-cuda" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" define <4 x i8> @test_ret_const() #0 { ; CHECK-LABEL: test_ret_const( ; CHECK: { ; CHECK-EMPTY: ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: st.param.b32 [func_retval0], -66911489; ; CHECK-NEXT: ret; ret <4 x i8> } define i8 @test_extract_0(<4 x i8> %a) #0 { ; CHECK-LABEL: test_extract_0( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_extract_0_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7770U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %e = extractelement <4 x i8> %a, i32 0 ret i8 %e } define i8 @test_extract_1(<4 x i8> %a) #0 { ; CHECK-LABEL: test_extract_1( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_extract_1_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7771U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %e = extractelement <4 x i8> %a, i32 1 ret i8 %e } define i8 @test_extract_2(<4 x i8> %a) #0 { ; CHECK-LABEL: test_extract_2( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_extract_2_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7772U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %e = extractelement <4 x i8> %a, i32 2 ret i8 %e } define i8 @test_extract_3(<4 x i8> %a) #0 { ; CHECK-LABEL: test_extract_3( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_extract_3_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %e = extractelement <4 x i8> %a, i32 3 ret i8 %e } define i8 @test_extract_i(<4 x i8> %a, i64 %idx) #0 { ; O0-LABEL: test_extract_i( ; O0: { ; O0-NEXT: .reg .b32 %r<5>; ; O0-NEXT: .reg .b64 %rd<2>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd1, [test_extract_i_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_extract_i_param_0]; ; O0-NEXT: cvt.u32.u64 %r2, %rd1; ; O0-NEXT: or.b32 %r3, %r2, 30576; ; O0-NEXT: prmt.b32 %r4, %r1, 0, %r3; ; O0-NEXT: st.param.b32 [func_retval0], %r4; ; O0-NEXT: ret; ; ; O3-LABEL: test_extract_i( ; O3: { ; O3-NEXT: .reg .b32 %r<5>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_extract_i_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_extract_i_param_1]; ; O3-NEXT: or.b32 %r3, %r2, 30576; ; O3-NEXT: prmt.b32 %r4, %r1, 0, %r3; ; O3-NEXT: st.param.b32 [func_retval0], %r4; ; O3-NEXT: ret; %e = extractelement <4 x i8> %a, i64 %idx ret i8 %e } define <4 x i8> @test_add(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_add( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_add_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_add_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs1, %r3; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs2, %r4; ; O0-NEXT: add.s16 %rs3, %rs2, %rs1; ; O0-NEXT: cvt.u32.u16 %r5, %rs3; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs4, %r6; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs5, %r7; ; O0-NEXT: add.s16 %rs6, %rs5, %rs4; ; O0-NEXT: cvt.u32.u16 %r8, %rs6; ; O0-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O0-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs7, %r10; ; O0-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs8, %r11; ; O0-NEXT: add.s16 %rs9, %rs8, %rs7; ; O0-NEXT: cvt.u32.u16 %r12, %rs9; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs10, %r13; ; O0-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs11, %r14; ; O0-NEXT: add.s16 %rs12, %rs11, %rs10; ; O0-NEXT: cvt.u32.u16 %r15, %rs12; ; O0-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_add( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_add_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_add_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs1, %r3; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs2, %r4; ; O3-NEXT: add.s16 %rs3, %rs2, %rs1; ; O3-NEXT: cvt.u32.u16 %r5, %rs3; ; O3-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs4, %r6; ; O3-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs5, %r7; ; O3-NEXT: add.s16 %rs6, %rs5, %rs4; ; O3-NEXT: cvt.u32.u16 %r8, %rs6; ; O3-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O3-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs7, %r10; ; O3-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs8, %r11; ; O3-NEXT: add.s16 %rs9, %rs8, %rs7; ; O3-NEXT: cvt.u32.u16 %r12, %rs9; ; O3-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs10, %r13; ; O3-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs11, %r14; ; O3-NEXT: add.s16 %rs12, %rs11, %rs10; ; O3-NEXT: cvt.u32.u16 %r15, %rs12; ; O3-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r17; ; O3-NEXT: ret; %r = add <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_add_imm_0(<4 x i8> %a) #0 { ; CHECK-LABEL: test_add_imm_0( ; CHECK: { ; CHECK-NEXT: .reg .b16 %rs<9>; ; CHECK-NEXT: .reg .b32 %r<13>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_add_imm_0_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; CHECK-NEXT: cvt.u16.u32 %rs1, %r2; ; CHECK-NEXT: add.s16 %rs2, %rs1, 4; ; CHECK-NEXT: cvt.u32.u16 %r3, %rs2; ; CHECK-NEXT: prmt.b32 %r4, %r1, 0, 0x7772U; ; CHECK-NEXT: cvt.u16.u32 %rs3, %r4; ; CHECK-NEXT: add.s16 %rs4, %rs3, 3; ; CHECK-NEXT: cvt.u32.u16 %r5, %rs4; ; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U; ; CHECK-NEXT: prmt.b32 %r7, %r1, 0, 0x7771U; ; CHECK-NEXT: cvt.u16.u32 %rs5, %r7; ; CHECK-NEXT: add.s16 %rs6, %rs5, 2; ; CHECK-NEXT: cvt.u32.u16 %r8, %rs6; ; CHECK-NEXT: prmt.b32 %r9, %r1, 0, 0x7770U; ; CHECK-NEXT: cvt.u16.u32 %rs7, %r9; ; CHECK-NEXT: add.s16 %rs8, %rs7, 1; ; CHECK-NEXT: cvt.u32.u16 %r10, %rs8; ; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U; ; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r12; ; CHECK-NEXT: ret; %r = add <4 x i8> , %a ret <4 x i8> %r } define <4 x i8> @test_add_imm_1(<4 x i8> %a) #0 { ; CHECK-LABEL: test_add_imm_1( ; CHECK: { ; CHECK-NEXT: .reg .b16 %rs<9>; ; CHECK-NEXT: .reg .b32 %r<13>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_add_imm_1_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; CHECK-NEXT: cvt.u16.u32 %rs1, %r2; ; CHECK-NEXT: add.s16 %rs2, %rs1, 4; ; CHECK-NEXT: cvt.u32.u16 %r3, %rs2; ; CHECK-NEXT: prmt.b32 %r4, %r1, 0, 0x7772U; ; CHECK-NEXT: cvt.u16.u32 %rs3, %r4; ; CHECK-NEXT: add.s16 %rs4, %rs3, 3; ; CHECK-NEXT: cvt.u32.u16 %r5, %rs4; ; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U; ; CHECK-NEXT: prmt.b32 %r7, %r1, 0, 0x7771U; ; CHECK-NEXT: cvt.u16.u32 %rs5, %r7; ; CHECK-NEXT: add.s16 %rs6, %rs5, 2; ; CHECK-NEXT: cvt.u32.u16 %r8, %rs6; ; CHECK-NEXT: prmt.b32 %r9, %r1, 0, 0x7770U; ; CHECK-NEXT: cvt.u16.u32 %rs7, %r9; ; CHECK-NEXT: add.s16 %rs8, %rs7, 1; ; CHECK-NEXT: cvt.u32.u16 %r10, %rs8; ; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U; ; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r12; ; CHECK-NEXT: ret; %r = add <4 x i8> %a, ret <4 x i8> %r } define <4 x i8> @test_sub(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_sub( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_sub_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_sub_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs1, %r3; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs2, %r4; ; O0-NEXT: sub.s16 %rs3, %rs2, %rs1; ; O0-NEXT: cvt.u32.u16 %r5, %rs3; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs4, %r6; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs5, %r7; ; O0-NEXT: sub.s16 %rs6, %rs5, %rs4; ; O0-NEXT: cvt.u32.u16 %r8, %rs6; ; O0-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O0-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs7, %r10; ; O0-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs8, %r11; ; O0-NEXT: sub.s16 %rs9, %rs8, %rs7; ; O0-NEXT: cvt.u32.u16 %r12, %rs9; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs10, %r13; ; O0-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs11, %r14; ; O0-NEXT: sub.s16 %rs12, %rs11, %rs10; ; O0-NEXT: cvt.u32.u16 %r15, %rs12; ; O0-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_sub( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_sub_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_sub_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs1, %r3; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs2, %r4; ; O3-NEXT: sub.s16 %rs3, %rs2, %rs1; ; O3-NEXT: cvt.u32.u16 %r5, %rs3; ; O3-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs4, %r6; ; O3-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs5, %r7; ; O3-NEXT: sub.s16 %rs6, %rs5, %rs4; ; O3-NEXT: cvt.u32.u16 %r8, %rs6; ; O3-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O3-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs7, %r10; ; O3-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs8, %r11; ; O3-NEXT: sub.s16 %rs9, %rs8, %rs7; ; O3-NEXT: cvt.u32.u16 %r12, %rs9; ; O3-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs10, %r13; ; O3-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs11, %r14; ; O3-NEXT: sub.s16 %rs12, %rs11, %rs10; ; O3-NEXT: cvt.u32.u16 %r15, %rs12; ; O3-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r17; ; O3-NEXT: ret; %r = sub <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_smax(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_smax( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<26>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_smax_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_smax_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x8880U; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x8880U; ; O0-NEXT: setp.gt.s32 %p1, %r4, %r3; ; O0-NEXT: prmt.b32 %r5, %r2, 0, 0x9991U; ; O0-NEXT: prmt.b32 %r6, %r1, 0, 0x9991U; ; O0-NEXT: setp.gt.s32 %p2, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r2, 0, 0xaaa2U; ; O0-NEXT: prmt.b32 %r8, %r1, 0, 0xaaa2U; ; O0-NEXT: setp.gt.s32 %p3, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r2, 0, 0xbbb3U; ; O0-NEXT: prmt.b32 %r10, %r1, 0, 0xbbb3U; ; O0-NEXT: setp.gt.s32 %p4, %r10, %r9; ; O0-NEXT: prmt.b32 %r11, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r12, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r14, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r15, %r1, 0, 0x7773U; ; O0-NEXT: selp.b32 %r16, %r15, %r14, %p4; ; O0-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O0-NEXT: selp.b32 %r18, %r17, %r13, %p3; ; O0-NEXT: prmt.b32 %r19, %r18, %r16, 0x3340U; ; O0-NEXT: prmt.b32 %r20, %r1, 0, 0x7771U; ; O0-NEXT: selp.b32 %r21, %r20, %r12, %p2; ; O0-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O0-NEXT: selp.b32 %r23, %r22, %r11, %p1; ; O0-NEXT: prmt.b32 %r24, %r23, %r21, 0x3340U; ; O0-NEXT: prmt.b32 %r25, %r24, %r19, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r25; ; O0-NEXT: ret; ; ; O3-LABEL: test_smax( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<26>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_smax_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_smax_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x8880U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x8880U; ; O3-NEXT: setp.gt.s32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x9991U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x9991U; ; O3-NEXT: setp.gt.s32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0xaaa2U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0xaaa2U; ; O3-NEXT: setp.gt.s32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0xbbb3U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0xbbb3U; ; O3-NEXT: setp.gt.s32 %p4, %r10, %r9; ; O3-NEXT: prmt.b32 %r11, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r12, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r13, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r14, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r15, %r1, 0, 0x7773U; ; O3-NEXT: selp.b32 %r16, %r15, %r14, %p4; ; O3-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O3-NEXT: selp.b32 %r18, %r17, %r13, %p3; ; O3-NEXT: prmt.b32 %r19, %r18, %r16, 0x3340U; ; O3-NEXT: prmt.b32 %r20, %r1, 0, 0x7771U; ; O3-NEXT: selp.b32 %r21, %r20, %r12, %p2; ; O3-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O3-NEXT: selp.b32 %r23, %r22, %r11, %p1; ; O3-NEXT: prmt.b32 %r24, %r23, %r21, 0x3340U; ; O3-NEXT: prmt.b32 %r25, %r24, %r19, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r25; ; O3-NEXT: ret; %cmp = icmp sgt <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_umax(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_umax( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_umax_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_umax_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O0-NEXT: setp.gt.u32 %p1, %r4, %r3; ; O0-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O0-NEXT: setp.gt.u32 %p2, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O0-NEXT: setp.gt.u32 %p3, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O0-NEXT: setp.gt.u32 %p4, %r10, %r9; ; O0-NEXT: selp.b32 %r11, %r10, %r9, %p4; ; O0-NEXT: selp.b32 %r12, %r8, %r7, %p3; ; O0-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O0-NEXT: selp.b32 %r14, %r6, %r5, %p2; ; O0-NEXT: selp.b32 %r15, %r4, %r3, %p1; ; O0-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_umax( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_umax_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_umax_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O3-NEXT: setp.gt.u32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O3-NEXT: setp.gt.u32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O3-NEXT: setp.gt.u32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O3-NEXT: setp.gt.u32 %p4, %r10, %r9; ; O3-NEXT: selp.b32 %r11, %r10, %r9, %p4; ; O3-NEXT: selp.b32 %r12, %r8, %r7, %p3; ; O3-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O3-NEXT: selp.b32 %r14, %r6, %r5, %p2; ; O3-NEXT: selp.b32 %r15, %r4, %r3, %p1; ; O3-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r17; ; O3-NEXT: ret; %cmp = icmp ugt <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_smin(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_smin( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<26>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_smin_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_smin_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x8880U; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x8880U; ; O0-NEXT: setp.le.s32 %p1, %r4, %r3; ; O0-NEXT: prmt.b32 %r5, %r2, 0, 0x9991U; ; O0-NEXT: prmt.b32 %r6, %r1, 0, 0x9991U; ; O0-NEXT: setp.le.s32 %p2, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r2, 0, 0xaaa2U; ; O0-NEXT: prmt.b32 %r8, %r1, 0, 0xaaa2U; ; O0-NEXT: setp.le.s32 %p3, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r2, 0, 0xbbb3U; ; O0-NEXT: prmt.b32 %r10, %r1, 0, 0xbbb3U; ; O0-NEXT: setp.le.s32 %p4, %r10, %r9; ; O0-NEXT: prmt.b32 %r11, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r12, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r14, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r15, %r1, 0, 0x7773U; ; O0-NEXT: selp.b32 %r16, %r15, %r14, %p4; ; O0-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O0-NEXT: selp.b32 %r18, %r17, %r13, %p3; ; O0-NEXT: prmt.b32 %r19, %r18, %r16, 0x3340U; ; O0-NEXT: prmt.b32 %r20, %r1, 0, 0x7771U; ; O0-NEXT: selp.b32 %r21, %r20, %r12, %p2; ; O0-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O0-NEXT: selp.b32 %r23, %r22, %r11, %p1; ; O0-NEXT: prmt.b32 %r24, %r23, %r21, 0x3340U; ; O0-NEXT: prmt.b32 %r25, %r24, %r19, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r25; ; O0-NEXT: ret; ; ; O3-LABEL: test_smin( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<26>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_smin_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_smin_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x8880U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x8880U; ; O3-NEXT: setp.le.s32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x9991U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x9991U; ; O3-NEXT: setp.le.s32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0xaaa2U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0xaaa2U; ; O3-NEXT: setp.le.s32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0xbbb3U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0xbbb3U; ; O3-NEXT: setp.le.s32 %p4, %r10, %r9; ; O3-NEXT: prmt.b32 %r11, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r12, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r13, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r14, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r15, %r1, 0, 0x7773U; ; O3-NEXT: selp.b32 %r16, %r15, %r14, %p4; ; O3-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O3-NEXT: selp.b32 %r18, %r17, %r13, %p3; ; O3-NEXT: prmt.b32 %r19, %r18, %r16, 0x3340U; ; O3-NEXT: prmt.b32 %r20, %r1, 0, 0x7771U; ; O3-NEXT: selp.b32 %r21, %r20, %r12, %p2; ; O3-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O3-NEXT: selp.b32 %r23, %r22, %r11, %p1; ; O3-NEXT: prmt.b32 %r24, %r23, %r21, 0x3340U; ; O3-NEXT: prmt.b32 %r25, %r24, %r19, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r25; ; O3-NEXT: ret; %cmp = icmp sle <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_umin(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_umin( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_umin_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_umin_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O0-NEXT: setp.le.u32 %p1, %r4, %r3; ; O0-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O0-NEXT: setp.le.u32 %p2, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O0-NEXT: setp.le.u32 %p3, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O0-NEXT: setp.le.u32 %p4, %r10, %r9; ; O0-NEXT: selp.b32 %r11, %r10, %r9, %p4; ; O0-NEXT: selp.b32 %r12, %r8, %r7, %p3; ; O0-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O0-NEXT: selp.b32 %r14, %r6, %r5, %p2; ; O0-NEXT: selp.b32 %r15, %r4, %r3, %p1; ; O0-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_umin( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_umin_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_umin_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O3-NEXT: setp.le.u32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O3-NEXT: setp.le.u32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O3-NEXT: setp.le.u32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O3-NEXT: setp.le.u32 %p4, %r10, %r9; ; O3-NEXT: selp.b32 %r11, %r10, %r9, %p4; ; O3-NEXT: selp.b32 %r12, %r8, %r7, %p3; ; O3-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O3-NEXT: selp.b32 %r14, %r6, %r5, %p2; ; O3-NEXT: selp.b32 %r15, %r4, %r3, %p1; ; O3-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r17; ; O3-NEXT: ret; %cmp = icmp ule <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_eq(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c) #0 { ; O0-LABEL: test_eq( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<23>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r3, [test_eq_param_2]; ; O0-NEXT: ld.param.b32 %r2, [test_eq_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_eq_param_0]; ; O0-NEXT: prmt.b32 %r4, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r5, %r1, 0, 0x7770U; ; O0-NEXT: setp.eq.b32 %p1, %r5, %r4; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0x7771U; ; O0-NEXT: setp.eq.b32 %p2, %r7, %r6; ; O0-NEXT: prmt.b32 %r8, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r9, %r1, 0, 0x7772U; ; O0-NEXT: setp.eq.b32 %p3, %r9, %r8; ; O0-NEXT: prmt.b32 %r10, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r11, %r1, 0, 0x7773U; ; O0-NEXT: setp.eq.b32 %p4, %r11, %r10; ; O0-NEXT: prmt.b32 %r12, %r3, 0, 0x7773U; ; O0-NEXT: selp.b32 %r13, %r11, %r12, %p4; ; O0-NEXT: prmt.b32 %r14, %r3, 0, 0x7772U; ; O0-NEXT: selp.b32 %r15, %r9, %r14, %p3; ; O0-NEXT: prmt.b32 %r16, %r15, %r13, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r3, 0, 0x7771U; ; O0-NEXT: selp.b32 %r18, %r7, %r17, %p2; ; O0-NEXT: prmt.b32 %r19, %r3, 0, 0x7770U; ; O0-NEXT: selp.b32 %r20, %r5, %r19, %p1; ; O0-NEXT: prmt.b32 %r21, %r20, %r18, 0x3340U; ; O0-NEXT: prmt.b32 %r22, %r21, %r16, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r22; ; O0-NEXT: ret; ; ; O3-LABEL: test_eq( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<23>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_eq_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_eq_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O3-NEXT: setp.eq.b32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O3-NEXT: setp.eq.b32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O3-NEXT: setp.eq.b32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O3-NEXT: setp.eq.b32 %p4, %r10, %r9; ; O3-NEXT: ld.param.b32 %r11, [test_eq_param_2]; ; O3-NEXT: prmt.b32 %r12, %r11, 0, 0x7773U; ; O3-NEXT: selp.b32 %r13, %r10, %r12, %p4; ; O3-NEXT: prmt.b32 %r14, %r11, 0, 0x7772U; ; O3-NEXT: selp.b32 %r15, %r8, %r14, %p3; ; O3-NEXT: prmt.b32 %r16, %r15, %r13, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r11, 0, 0x7771U; ; O3-NEXT: selp.b32 %r18, %r6, %r17, %p2; ; O3-NEXT: prmt.b32 %r19, %r11, 0, 0x7770U; ; O3-NEXT: selp.b32 %r20, %r4, %r19, %p1; ; O3-NEXT: prmt.b32 %r21, %r20, %r18, 0x3340U; ; O3-NEXT: prmt.b32 %r22, %r21, %r16, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r22; ; O3-NEXT: ret; %cmp = icmp eq <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %c ret <4 x i8> %r } define <4 x i8> @test_ne(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c) #0 { ; O0-LABEL: test_ne( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<23>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r3, [test_ne_param_2]; ; O0-NEXT: ld.param.b32 %r2, [test_ne_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_ne_param_0]; ; O0-NEXT: prmt.b32 %r4, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r5, %r1, 0, 0x7770U; ; O0-NEXT: setp.ne.b32 %p1, %r5, %r4; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0x7771U; ; O0-NEXT: setp.ne.b32 %p2, %r7, %r6; ; O0-NEXT: prmt.b32 %r8, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r9, %r1, 0, 0x7772U; ; O0-NEXT: setp.ne.b32 %p3, %r9, %r8; ; O0-NEXT: prmt.b32 %r10, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r11, %r1, 0, 0x7773U; ; O0-NEXT: setp.ne.b32 %p4, %r11, %r10; ; O0-NEXT: prmt.b32 %r12, %r3, 0, 0x7773U; ; O0-NEXT: selp.b32 %r13, %r11, %r12, %p4; ; O0-NEXT: prmt.b32 %r14, %r3, 0, 0x7772U; ; O0-NEXT: selp.b32 %r15, %r9, %r14, %p3; ; O0-NEXT: prmt.b32 %r16, %r15, %r13, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r3, 0, 0x7771U; ; O0-NEXT: selp.b32 %r18, %r7, %r17, %p2; ; O0-NEXT: prmt.b32 %r19, %r3, 0, 0x7770U; ; O0-NEXT: selp.b32 %r20, %r5, %r19, %p1; ; O0-NEXT: prmt.b32 %r21, %r20, %r18, 0x3340U; ; O0-NEXT: prmt.b32 %r22, %r21, %r16, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r22; ; O0-NEXT: ret; ; ; O3-LABEL: test_ne( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<23>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_ne_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_ne_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O3-NEXT: setp.ne.b32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O3-NEXT: setp.ne.b32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O3-NEXT: setp.ne.b32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O3-NEXT: setp.ne.b32 %p4, %r10, %r9; ; O3-NEXT: ld.param.b32 %r11, [test_ne_param_2]; ; O3-NEXT: prmt.b32 %r12, %r11, 0, 0x7773U; ; O3-NEXT: selp.b32 %r13, %r10, %r12, %p4; ; O3-NEXT: prmt.b32 %r14, %r11, 0, 0x7772U; ; O3-NEXT: selp.b32 %r15, %r8, %r14, %p3; ; O3-NEXT: prmt.b32 %r16, %r15, %r13, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r11, 0, 0x7771U; ; O3-NEXT: selp.b32 %r18, %r6, %r17, %p2; ; O3-NEXT: prmt.b32 %r19, %r11, 0, 0x7770U; ; O3-NEXT: selp.b32 %r20, %r4, %r19, %p1; ; O3-NEXT: prmt.b32 %r21, %r20, %r18, 0x3340U; ; O3-NEXT: prmt.b32 %r22, %r21, %r16, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r22; ; O3-NEXT: ret; %cmp = icmp ne <4 x i8> %a, %b %r = select <4 x i1> %cmp, <4 x i8> %a, <4 x i8> %c ret <4 x i8> %r } define <4 x i8> @test_mul(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_mul( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_mul_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_mul_param_0]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs1, %r3; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O0-NEXT: cvt.u16.u32 %rs2, %r4; ; O0-NEXT: mul.lo.s16 %rs3, %rs2, %rs1; ; O0-NEXT: cvt.u32.u16 %r5, %rs3; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs4, %r6; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O0-NEXT: cvt.u16.u32 %rs5, %r7; ; O0-NEXT: mul.lo.s16 %rs6, %rs5, %rs4; ; O0-NEXT: cvt.u32.u16 %r8, %rs6; ; O0-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O0-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs7, %r10; ; O0-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O0-NEXT: cvt.u16.u32 %rs8, %r11; ; O0-NEXT: mul.lo.s16 %rs9, %rs8, %rs7; ; O0-NEXT: cvt.u32.u16 %r12, %rs9; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs10, %r13; ; O0-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O0-NEXT: cvt.u16.u32 %rs11, %r14; ; O0-NEXT: mul.lo.s16 %rs12, %rs11, %rs10; ; O0-NEXT: cvt.u32.u16 %r15, %rs12; ; O0-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_mul( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_mul_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_mul_param_1]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs1, %r3; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O3-NEXT: cvt.u16.u32 %rs2, %r4; ; O3-NEXT: mul.lo.s16 %rs3, %rs2, %rs1; ; O3-NEXT: cvt.u32.u16 %r5, %rs3; ; O3-NEXT: prmt.b32 %r6, %r2, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs4, %r6; ; O3-NEXT: prmt.b32 %r7, %r1, 0, 0x7772U; ; O3-NEXT: cvt.u16.u32 %rs5, %r7; ; O3-NEXT: mul.lo.s16 %rs6, %rs5, %rs4; ; O3-NEXT: cvt.u32.u16 %r8, %rs6; ; O3-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O3-NEXT: prmt.b32 %r10, %r2, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs7, %r10; ; O3-NEXT: prmt.b32 %r11, %r1, 0, 0x7771U; ; O3-NEXT: cvt.u16.u32 %rs8, %r11; ; O3-NEXT: mul.lo.s16 %rs9, %rs8, %rs7; ; O3-NEXT: cvt.u32.u16 %r12, %rs9; ; O3-NEXT: prmt.b32 %r13, %r2, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs10, %r13; ; O3-NEXT: prmt.b32 %r14, %r1, 0, 0x7770U; ; O3-NEXT: cvt.u16.u32 %rs11, %r14; ; O3-NEXT: mul.lo.s16 %rs12, %rs11, %rs10; ; O3-NEXT: cvt.u32.u16 %r15, %rs12; ; O3-NEXT: prmt.b32 %r16, %r15, %r12, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r9, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r17; ; O3-NEXT: ret; %r = mul <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_or(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_or( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_or_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_or_param_0]; ; O0-NEXT: or.b32 %r3, %r1, %r2; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_or( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_or_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_or_param_1]; ; O3-NEXT: or.b32 %r3, %r1, %r2; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = or <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_or_computed(i8 %a) { ; O0-LABEL: test_or_computed( ; O0: { ; O0-NEXT: .reg .b16 %rs<2>; ; O0-NEXT: .reg .b32 %r<8>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_or_computed_param_0]; ; O0-NEXT: mov.b32 %r1, 0; ; O0-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O0-NEXT: cvt.u32.u16 %r3, %rs1; ; O0-NEXT: prmt.b32 %r4, %r3, 0, 0x3340U; ; O0-NEXT: prmt.b32 %r5, %r4, %r2, 0x5410U; ; O0-NEXT: bfi.b32 %r6, 5, %r5, 8, 8; ; O0-NEXT: or.b32 %r7, %r6, %r5; ; O0-NEXT: st.param.b32 [func_retval0], %r7; ; O0-NEXT: ret; ; ; O3-LABEL: test_or_computed( ; O3: { ; O3-NEXT: .reg .b32 %r<6>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b8 %r1, [test_or_computed_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x5410U; ; O3-NEXT: bfi.b32 %r4, 5, %r3, 8, 8; ; O3-NEXT: or.b32 %r5, %r4, %r3; ; O3-NEXT: st.param.b32 [func_retval0], %r5; ; O3-NEXT: ret; %ins.0 = insertelement <4 x i8> zeroinitializer, i8 %a, i32 0 %ins.1 = insertelement <4 x i8> %ins.0, i8 5, i32 1 %r = or <4 x i8> %ins.1, %ins.0 ret <4 x i8> %r } define <4 x i8> @test_or_imm_0(<4 x i8> %a) #0 { ; CHECK-LABEL: test_or_imm_0( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_or_imm_0_param_0]; ; CHECK-NEXT: or.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = or <4 x i8> , %a ret <4 x i8> %r } define <4 x i8> @test_or_imm_1(<4 x i8> %a) #0 { ; CHECK-LABEL: test_or_imm_1( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_or_imm_1_param_0]; ; CHECK-NEXT: or.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = or <4 x i8> %a, ret <4 x i8> %r } define <4 x i8> @test_xor(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_xor( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_xor_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_xor_param_0]; ; O0-NEXT: xor.b32 %r3, %r1, %r2; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_xor( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_xor_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_xor_param_1]; ; O3-NEXT: xor.b32 %r3, %r1, %r2; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = xor <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_xor_computed(i8 %a) { ; O0-LABEL: test_xor_computed( ; O0: { ; O0-NEXT: .reg .b16 %rs<2>; ; O0-NEXT: .reg .b32 %r<8>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_xor_computed_param_0]; ; O0-NEXT: mov.b32 %r1, 0; ; O0-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O0-NEXT: cvt.u32.u16 %r3, %rs1; ; O0-NEXT: prmt.b32 %r4, %r3, 0, 0x3340U; ; O0-NEXT: prmt.b32 %r5, %r4, %r2, 0x5410U; ; O0-NEXT: bfi.b32 %r6, 5, %r5, 8, 8; ; O0-NEXT: xor.b32 %r7, %r6, %r5; ; O0-NEXT: st.param.b32 [func_retval0], %r7; ; O0-NEXT: ret; ; ; O3-LABEL: test_xor_computed( ; O3: { ; O3-NEXT: .reg .b32 %r<6>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b8 %r1, [test_xor_computed_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x5410U; ; O3-NEXT: bfi.b32 %r4, 5, %r3, 8, 8; ; O3-NEXT: xor.b32 %r5, %r4, %r3; ; O3-NEXT: st.param.b32 [func_retval0], %r5; ; O3-NEXT: ret; %ins.0 = insertelement <4 x i8> zeroinitializer, i8 %a, i32 0 %ins.1 = insertelement <4 x i8> %ins.0, i8 5, i32 1 %r = xor <4 x i8> %ins.1, %ins.0 ret <4 x i8> %r } define <4 x i8> @test_xor_imm_0(<4 x i8> %a) #0 { ; CHECK-LABEL: test_xor_imm_0( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_xor_imm_0_param_0]; ; CHECK-NEXT: xor.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = xor <4 x i8> , %a ret <4 x i8> %r } define <4 x i8> @test_xor_imm_1(<4 x i8> %a) #0 { ; CHECK-LABEL: test_xor_imm_1( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_xor_imm_1_param_0]; ; CHECK-NEXT: xor.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = xor <4 x i8> %a, ret <4 x i8> %r } define <4 x i8> @test_and(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_and( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_and_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_and_param_0]; ; O0-NEXT: and.b32 %r3, %r1, %r2; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_and( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_and_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_and_param_1]; ; O3-NEXT: and.b32 %r3, %r1, %r2; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = and <4 x i8> %a, %b ret <4 x i8> %r } define <4 x i8> @test_and_computed(i8 %a) { ; O0-LABEL: test_and_computed( ; O0: { ; O0-NEXT: .reg .b16 %rs<2>; ; O0-NEXT: .reg .b32 %r<8>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_and_computed_param_0]; ; O0-NEXT: mov.b32 %r1, 0; ; O0-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O0-NEXT: cvt.u32.u16 %r3, %rs1; ; O0-NEXT: prmt.b32 %r4, %r3, 0, 0x3340U; ; O0-NEXT: prmt.b32 %r5, %r4, %r2, 0x5410U; ; O0-NEXT: bfi.b32 %r6, 5, %r5, 8, 8; ; O0-NEXT: and.b32 %r7, %r6, %r5; ; O0-NEXT: st.param.b32 [func_retval0], %r7; ; O0-NEXT: ret; ; ; O3-LABEL: test_and_computed( ; O3: { ; O3-NEXT: .reg .b32 %r<6>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b8 %r1, [test_and_computed_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, 0, 0x3340U; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x5410U; ; O3-NEXT: bfi.b32 %r4, 5, %r3, 8, 8; ; O3-NEXT: and.b32 %r5, %r4, %r3; ; O3-NEXT: st.param.b32 [func_retval0], %r5; ; O3-NEXT: ret; %ins.0 = insertelement <4 x i8> zeroinitializer, i8 %a, i32 0 %ins.1 = insertelement <4 x i8> %ins.0, i8 5, i32 1 %r = and <4 x i8> %ins.1, %ins.0 ret <4 x i8> %r } define <4 x i8> @test_and_imm_0(<4 x i8> %a) #0 { ; CHECK-LABEL: test_and_imm_0( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_and_imm_0_param_0]; ; CHECK-NEXT: and.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = and <4 x i8> , %a ret <4 x i8> %r } define <4 x i8> @test_and_imm_1(<4 x i8> %a) #0 { ; CHECK-LABEL: test_and_imm_1( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<3>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_and_imm_1_param_0]; ; CHECK-NEXT: and.b32 %r2, %r1, 67305985; ; CHECK-NEXT: st.param.b32 [func_retval0], %r2; ; CHECK-NEXT: ret; %r = and <4 x i8> %a, ret <4 x i8> %r } define void @test_ldst_v2i8(ptr %a, ptr %b) { ; O0-LABEL: test_ldst_v2i8( ; O0: { ; O0-NEXT: .reg .b32 %r<2>; ; O0-NEXT: .reg .b64 %rd<3>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd2, [test_ldst_v2i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_ldst_v2i8_param_0]; ; O0-NEXT: ld.b32 %r1, [%rd1]; ; O0-NEXT: st.b32 [%rd2], %r1; ; O0-NEXT: ret; ; ; O3-LABEL: test_ldst_v2i8( ; O3: { ; O3-NEXT: .reg .b32 %r<2>; ; O3-NEXT: .reg .b64 %rd<3>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b64 %rd1, [test_ldst_v2i8_param_0]; ; O3-NEXT: ld.b32 %r1, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_ldst_v2i8_param_1]; ; O3-NEXT: st.b32 [%rd2], %r1; ; O3-NEXT: ret; %t1 = load <4 x i8>, ptr %a store <4 x i8> %t1, ptr %b, align 16 ret void } define void @test_ldst_v3i8(ptr %a, ptr %b) { ; O0-LABEL: test_ldst_v3i8( ; O0: { ; O0-NEXT: .reg .b32 %r<3>; ; O0-NEXT: .reg .b64 %rd<3>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd2, [test_ldst_v3i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_ldst_v3i8_param_0]; ; O0-NEXT: ld.b32 %r1, [%rd1]; ; O0-NEXT: st.b16 [%rd2], %r1; ; O0-NEXT: prmt.b32 %r2, %r1, 0, 0x7772U; ; O0-NEXT: st.b8 [%rd2+2], %r2; ; O0-NEXT: ret; ; ; O3-LABEL: test_ldst_v3i8( ; O3: { ; O3-NEXT: .reg .b32 %r<3>; ; O3-NEXT: .reg .b64 %rd<3>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b64 %rd1, [test_ldst_v3i8_param_0]; ; O3-NEXT: ld.b32 %r1, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_ldst_v3i8_param_1]; ; O3-NEXT: st.b16 [%rd2], %r1; ; O3-NEXT: prmt.b32 %r2, %r1, 0, 0x7772U; ; O3-NEXT: st.b8 [%rd2+2], %r2; ; O3-NEXT: ret; %t1 = load <3 x i8>, ptr %a store <3 x i8> %t1, ptr %b, align 16 ret void } define void @test_ldst_v4i8(ptr %a, ptr %b) { ; O0-LABEL: test_ldst_v4i8( ; O0: { ; O0-NEXT: .reg .b32 %r<2>; ; O0-NEXT: .reg .b64 %rd<3>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd2, [test_ldst_v4i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_ldst_v4i8_param_0]; ; O0-NEXT: ld.b32 %r1, [%rd1]; ; O0-NEXT: st.b32 [%rd2], %r1; ; O0-NEXT: ret; ; ; O3-LABEL: test_ldst_v4i8( ; O3: { ; O3-NEXT: .reg .b32 %r<2>; ; O3-NEXT: .reg .b64 %rd<3>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b64 %rd1, [test_ldst_v4i8_param_0]; ; O3-NEXT: ld.b32 %r1, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_ldst_v4i8_param_1]; ; O3-NEXT: st.b32 [%rd2], %r1; ; O3-NEXT: ret; %t1 = load <4 x i8>, ptr %a store <4 x i8> %t1, ptr %b, align 16 ret void } define void @test_ldst_v4i8_unaligned(ptr %a, ptr %b) { ; O0-LABEL: test_ldst_v4i8_unaligned( ; O0: { ; O0-NEXT: .reg .b32 %r<5>; ; O0-NEXT: .reg .b64 %rd<3>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd2, [test_ldst_v4i8_unaligned_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_ldst_v4i8_unaligned_param_0]; ; O0-NEXT: ld.b8 %r1, [%rd1]; ; O0-NEXT: ld.b8 %r2, [%rd1+1]; ; O0-NEXT: ld.b8 %r3, [%rd1+2]; ; O0-NEXT: ld.b8 %r4, [%rd1+3]; ; O0-NEXT: st.b8 [%rd2+3], %r4; ; O0-NEXT: st.b8 [%rd2+2], %r3; ; O0-NEXT: st.b8 [%rd2+1], %r2; ; O0-NEXT: st.b8 [%rd2], %r1; ; O0-NEXT: ret; ; ; O3-LABEL: test_ldst_v4i8_unaligned( ; O3: { ; O3-NEXT: .reg .b32 %r<5>; ; O3-NEXT: .reg .b64 %rd<3>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b64 %rd1, [test_ldst_v4i8_unaligned_param_0]; ; O3-NEXT: ld.b8 %r1, [%rd1+1]; ; O3-NEXT: ld.b8 %r2, [%rd1]; ; O3-NEXT: ld.b8 %r3, [%rd1+3]; ; O3-NEXT: ld.b8 %r4, [%rd1+2]; ; O3-NEXT: ld.param.b64 %rd2, [test_ldst_v4i8_unaligned_param_1]; ; O3-NEXT: st.b8 [%rd2+2], %r4; ; O3-NEXT: st.b8 [%rd2+3], %r3; ; O3-NEXT: st.b8 [%rd2], %r2; ; O3-NEXT: st.b8 [%rd2+1], %r1; ; O3-NEXT: ret; %t1 = load <4 x i8>, ptr %a, align 1 store <4 x i8> %t1, ptr %b, align 1 ret void } define void @test_ldst_v8i8(ptr %a, ptr %b) { ; O0-LABEL: test_ldst_v8i8( ; O0: { ; O0-NEXT: .reg .b32 %r<3>; ; O0-NEXT: .reg .b64 %rd<3>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b64 %rd2, [test_ldst_v8i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_ldst_v8i8_param_0]; ; O0-NEXT: ld.v2.b32 {%r1, %r2}, [%rd1]; ; O0-NEXT: st.v2.b32 [%rd2], {%r1, %r2}; ; O0-NEXT: ret; ; ; O3-LABEL: test_ldst_v8i8( ; O3: { ; O3-NEXT: .reg .b32 %r<3>; ; O3-NEXT: .reg .b64 %rd<3>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b64 %rd1, [test_ldst_v8i8_param_0]; ; O3-NEXT: ld.v2.b32 {%r1, %r2}, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_ldst_v8i8_param_1]; ; O3-NEXT: st.v2.b32 [%rd2], {%r1, %r2}; ; O3-NEXT: ret; %t1 = load <8 x i8>, ptr %a store <8 x i8> %t1, ptr %b, align 16 ret void } declare <4 x i8> @test_callee(<4 x i8> %a, <4 x i8> %b) #0 define <4 x i8> @test_call(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_call( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_call_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_call_param_0]; ; O0-NEXT: { // callseq 0, 0 ; O0-NEXT: .param .align 4 .b8 param0[4]; ; O0-NEXT: .param .align 4 .b8 param1[4]; ; O0-NEXT: .param .align 4 .b8 retval0[4]; ; O0-NEXT: st.param.b32 [param1], %r2; ; O0-NEXT: st.param.b32 [param0], %r1; ; O0-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O0-NEXT: ld.param.b32 %r3, [retval0]; ; O0-NEXT: } // callseq 0 ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_call( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_call_param_0]; ; O3-NEXT: { // callseq 0, 0 ; O3-NEXT: .param .align 4 .b8 param0[4]; ; O3-NEXT: .param .align 4 .b8 param1[4]; ; O3-NEXT: .param .align 4 .b8 retval0[4]; ; O3-NEXT: ld.param.b32 %r2, [test_call_param_1]; ; O3-NEXT: st.param.b32 [param1], %r2; ; O3-NEXT: st.param.b32 [param0], %r1; ; O3-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O3-NEXT: ld.param.b32 %r3, [retval0]; ; O3-NEXT: } // callseq 0 ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = call <4 x i8> @test_callee(<4 x i8> %a, <4 x i8> %b) ret <4 x i8> %r } define <4 x i8> @test_call_flipped(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_call_flipped( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_call_flipped_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_call_flipped_param_0]; ; O0-NEXT: { // callseq 1, 0 ; O0-NEXT: .param .align 4 .b8 param0[4]; ; O0-NEXT: .param .align 4 .b8 param1[4]; ; O0-NEXT: .param .align 4 .b8 retval0[4]; ; O0-NEXT: st.param.b32 [param1], %r1; ; O0-NEXT: st.param.b32 [param0], %r2; ; O0-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O0-NEXT: ld.param.b32 %r3, [retval0]; ; O0-NEXT: } // callseq 1 ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_call_flipped( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_call_flipped_param_0]; ; O3-NEXT: { // callseq 1, 0 ; O3-NEXT: .param .align 4 .b8 param0[4]; ; O3-NEXT: .param .align 4 .b8 param1[4]; ; O3-NEXT: .param .align 4 .b8 retval0[4]; ; O3-NEXT: st.param.b32 [param1], %r1; ; O3-NEXT: ld.param.b32 %r2, [test_call_flipped_param_1]; ; O3-NEXT: st.param.b32 [param0], %r2; ; O3-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O3-NEXT: ld.param.b32 %r3, [retval0]; ; O3-NEXT: } // callseq 1 ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = call <4 x i8> @test_callee(<4 x i8> %b, <4 x i8> %a) ret <4 x i8> %r } define <4 x i8> @test_tailcall_flipped(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_tailcall_flipped( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_tailcall_flipped_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_tailcall_flipped_param_0]; ; O0-NEXT: { // callseq 2, 0 ; O0-NEXT: .param .align 4 .b8 param0[4]; ; O0-NEXT: .param .align 4 .b8 param1[4]; ; O0-NEXT: .param .align 4 .b8 retval0[4]; ; O0-NEXT: st.param.b32 [param1], %r1; ; O0-NEXT: st.param.b32 [param0], %r2; ; O0-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O0-NEXT: ld.param.b32 %r3, [retval0]; ; O0-NEXT: } // callseq 2 ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_tailcall_flipped( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_tailcall_flipped_param_0]; ; O3-NEXT: { // callseq 2, 0 ; O3-NEXT: .param .align 4 .b8 param0[4]; ; O3-NEXT: .param .align 4 .b8 param1[4]; ; O3-NEXT: .param .align 4 .b8 retval0[4]; ; O3-NEXT: st.param.b32 [param1], %r1; ; O3-NEXT: ld.param.b32 %r2, [test_tailcall_flipped_param_1]; ; O3-NEXT: st.param.b32 [param0], %r2; ; O3-NEXT: call.uni (retval0), test_callee, (param0, param1); ; O3-NEXT: ld.param.b32 %r3, [retval0]; ; O3-NEXT: } // callseq 2 ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %r = tail call <4 x i8> @test_callee(<4 x i8> %b, <4 x i8> %a) ret <4 x i8> %r } define <4 x i8> @test_select(<4 x i8> %a, <4 x i8> %b, i1 zeroext %c) #0 { ; O0-LABEL: test_select( ; O0: { ; O0-NEXT: .reg .pred %p<2>; ; O0-NEXT: .reg .b16 %rs<3>; ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_select_param_2]; ; O0-NEXT: and.b16 %rs2, %rs1, 1; ; O0-NEXT: setp.ne.b16 %p1, %rs2, 0; ; O0-NEXT: ld.param.b32 %r2, [test_select_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_select_param_0]; ; O0-NEXT: selp.b32 %r3, %r1, %r2, %p1; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_select( ; O3: { ; O3-NEXT: .reg .pred %p<2>; ; O3-NEXT: .reg .b16 %rs<3>; ; O3-NEXT: .reg .b32 %r<2>; ; O3-NEXT: .reg .b64 %rd<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b8 %rs1, [test_select_param_2]; ; O3-NEXT: and.b16 %rs2, %rs1, 1; ; O3-NEXT: setp.ne.b16 %p1, %rs2, 0; ; O3-NEXT: mov.b64 %rd1, test_select_param_1; ; O3-NEXT: mov.b64 %rd2, test_select_param_0; ; O3-NEXT: selp.b64 %rd3, %rd2, %rd1, %p1; ; O3-NEXT: ld.param.b32 %r1, [%rd3]; ; O3-NEXT: st.param.b32 [func_retval0], %r1; ; O3-NEXT: ret; %r = select i1 %c, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_select_cc(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c, <4 x i8> %d) #0 { ; O0-LABEL: test_select_cc( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<28>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r4, [test_select_cc_param_3]; ; O0-NEXT: ld.param.b32 %r3, [test_select_cc_param_2]; ; O0-NEXT: ld.param.b32 %r2, [test_select_cc_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_select_cc_param_0]; ; O0-NEXT: prmt.b32 %r5, %r4, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r6, %r3, 0, 0x7770U; ; O0-NEXT: setp.ne.b32 %p1, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r4, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r8, %r3, 0, 0x7771U; ; O0-NEXT: setp.ne.b32 %p2, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r4, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r10, %r3, 0, 0x7772U; ; O0-NEXT: setp.ne.b32 %p3, %r10, %r9; ; O0-NEXT: prmt.b32 %r11, %r4, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r12, %r3, 0, 0x7773U; ; O0-NEXT: setp.ne.b32 %p4, %r12, %r11; ; O0-NEXT: prmt.b32 %r13, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r14, %r1, 0, 0x7773U; ; O0-NEXT: selp.b32 %r15, %r14, %r13, %p4; ; O0-NEXT: prmt.b32 %r16, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O0-NEXT: selp.b32 %r18, %r17, %r16, %p3; ; O0-NEXT: prmt.b32 %r19, %r18, %r15, 0x3340U; ; O0-NEXT: prmt.b32 %r20, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r21, %r1, 0, 0x7771U; ; O0-NEXT: selp.b32 %r22, %r21, %r20, %p2; ; O0-NEXT: prmt.b32 %r23, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r24, %r1, 0, 0x7770U; ; O0-NEXT: selp.b32 %r25, %r24, %r23, %p1; ; O0-NEXT: prmt.b32 %r26, %r25, %r22, 0x3340U; ; O0-NEXT: prmt.b32 %r27, %r26, %r19, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r27; ; O0-NEXT: ret; ; ; O3-LABEL: test_select_cc( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<28>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_select_cc_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_select_cc_param_3]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: ld.param.b32 %r4, [test_select_cc_param_2]; ; O3-NEXT: prmt.b32 %r5, %r4, 0, 0x7770U; ; O3-NEXT: setp.ne.b32 %p1, %r5, %r3; ; O3-NEXT: prmt.b32 %r6, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r7, %r4, 0, 0x7771U; ; O3-NEXT: setp.ne.b32 %p2, %r7, %r6; ; O3-NEXT: prmt.b32 %r8, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r9, %r4, 0, 0x7772U; ; O3-NEXT: setp.ne.b32 %p3, %r9, %r8; ; O3-NEXT: prmt.b32 %r10, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r11, %r4, 0, 0x7773U; ; O3-NEXT: setp.ne.b32 %p4, %r11, %r10; ; O3-NEXT: ld.param.b32 %r12, [test_select_cc_param_1]; ; O3-NEXT: prmt.b32 %r13, %r12, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r14, %r1, 0, 0x7773U; ; O3-NEXT: selp.b32 %r15, %r14, %r13, %p4; ; O3-NEXT: prmt.b32 %r16, %r12, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r17, %r1, 0, 0x7772U; ; O3-NEXT: selp.b32 %r18, %r17, %r16, %p3; ; O3-NEXT: prmt.b32 %r19, %r18, %r15, 0x3340U; ; O3-NEXT: prmt.b32 %r20, %r12, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r21, %r1, 0, 0x7771U; ; O3-NEXT: selp.b32 %r22, %r21, %r20, %p2; ; O3-NEXT: prmt.b32 %r23, %r12, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r24, %r1, 0, 0x7770U; ; O3-NEXT: selp.b32 %r25, %r24, %r23, %p1; ; O3-NEXT: prmt.b32 %r26, %r25, %r22, 0x3340U; ; O3-NEXT: prmt.b32 %r27, %r26, %r19, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r27; ; O3-NEXT: ret; %cc = icmp ne <4 x i8> %c, %d %r = select <4 x i1> %cc, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i32> @test_select_cc_i32_i8(<4 x i32> %a, <4 x i32> %b, ; O0-LABEL: test_select_cc_i32_i8( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<23>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.v4.b32 {%r5, %r6, %r7, %r8}, [test_select_cc_i32_i8_param_1]; ; O0-NEXT: ld.param.v4.b32 {%r1, %r2, %r3, %r4}, [test_select_cc_i32_i8_param_0]; ; O0-NEXT: ld.param.b32 %r10, [test_select_cc_i32_i8_param_3]; ; O0-NEXT: ld.param.b32 %r9, [test_select_cc_i32_i8_param_2]; ; O0-NEXT: prmt.b32 %r11, %r10, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r12, %r9, 0, 0x7770U; ; O0-NEXT: setp.ne.b32 %p1, %r12, %r11; ; O0-NEXT: prmt.b32 %r13, %r10, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r14, %r9, 0, 0x7771U; ; O0-NEXT: setp.ne.b32 %p2, %r14, %r13; ; O0-NEXT: prmt.b32 %r15, %r10, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r16, %r9, 0, 0x7772U; ; O0-NEXT: setp.ne.b32 %p3, %r16, %r15; ; O0-NEXT: prmt.b32 %r17, %r10, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r18, %r9, 0, 0x7773U; ; O0-NEXT: setp.ne.b32 %p4, %r18, %r17; ; O0-NEXT: selp.b32 %r19, %r4, %r8, %p4; ; O0-NEXT: selp.b32 %r20, %r3, %r7, %p3; ; O0-NEXT: selp.b32 %r21, %r2, %r6, %p2; ; O0-NEXT: selp.b32 %r22, %r1, %r5, %p1; ; O0-NEXT: st.param.v4.b32 [func_retval0], {%r22, %r21, %r20, %r19}; ; O0-NEXT: ret; ; ; O3-LABEL: test_select_cc_i32_i8( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<23>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.v4.b32 {%r1, %r2, %r3, %r4}, [test_select_cc_i32_i8_param_0]; ; O3-NEXT: ld.param.b32 %r5, [test_select_cc_i32_i8_param_3]; ; O3-NEXT: prmt.b32 %r6, %r5, 0, 0x7770U; ; O3-NEXT: ld.param.b32 %r7, [test_select_cc_i32_i8_param_2]; ; O3-NEXT: prmt.b32 %r8, %r7, 0, 0x7770U; ; O3-NEXT: setp.ne.b32 %p1, %r8, %r6; ; O3-NEXT: prmt.b32 %r9, %r5, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r10, %r7, 0, 0x7771U; ; O3-NEXT: setp.ne.b32 %p2, %r10, %r9; ; O3-NEXT: prmt.b32 %r11, %r5, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r12, %r7, 0, 0x7772U; ; O3-NEXT: setp.ne.b32 %p3, %r12, %r11; ; O3-NEXT: prmt.b32 %r13, %r5, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r14, %r7, 0, 0x7773U; ; O3-NEXT: setp.ne.b32 %p4, %r14, %r13; ; O3-NEXT: ld.param.v4.b32 {%r15, %r16, %r17, %r18}, [test_select_cc_i32_i8_param_1]; ; O3-NEXT: selp.b32 %r19, %r4, %r18, %p4; ; O3-NEXT: selp.b32 %r20, %r3, %r17, %p3; ; O3-NEXT: selp.b32 %r21, %r2, %r16, %p2; ; O3-NEXT: selp.b32 %r22, %r1, %r15, %p1; ; O3-NEXT: st.param.v4.b32 [func_retval0], {%r22, %r21, %r20, %r19}; ; O3-NEXT: ret; <4 x i8> %c, <4 x i8> %d) #0 { %cc = icmp ne <4 x i8> %c, %d %r = select <4 x i1> %cc, <4 x i32> %a, <4 x i32> %b ret <4 x i32> %r } define <4 x i8> @test_select_cc_i8_i32(<4 x i8> %a, <4 x i8> %b, ; O0-LABEL: test_select_cc_i8_i32( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<26>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.v4.b32 {%r7, %r8, %r9, %r10}, [test_select_cc_i8_i32_param_3]; ; O0-NEXT: ld.param.v4.b32 {%r3, %r4, %r5, %r6}, [test_select_cc_i8_i32_param_2]; ; O0-NEXT: ld.param.b32 %r2, [test_select_cc_i8_i32_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_select_cc_i8_i32_param_0]; ; O0-NEXT: setp.ne.b32 %p1, %r3, %r7; ; O0-NEXT: setp.ne.b32 %p2, %r4, %r8; ; O0-NEXT: setp.ne.b32 %p3, %r5, %r9; ; O0-NEXT: setp.ne.b32 %p4, %r6, %r10; ; O0-NEXT: prmt.b32 %r11, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r12, %r1, 0, 0x7773U; ; O0-NEXT: selp.b32 %r13, %r12, %r11, %p4; ; O0-NEXT: prmt.b32 %r14, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r15, %r1, 0, 0x7772U; ; O0-NEXT: selp.b32 %r16, %r15, %r14, %p3; ; O0-NEXT: prmt.b32 %r17, %r16, %r13, 0x3340U; ; O0-NEXT: prmt.b32 %r18, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r19, %r1, 0, 0x7771U; ; O0-NEXT: selp.b32 %r20, %r19, %r18, %p2; ; O0-NEXT: prmt.b32 %r21, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O0-NEXT: selp.b32 %r23, %r22, %r21, %p1; ; O0-NEXT: prmt.b32 %r24, %r23, %r20, 0x3340U; ; O0-NEXT: prmt.b32 %r25, %r24, %r17, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r25; ; O0-NEXT: ret; ; ; O3-LABEL: test_select_cc_i8_i32( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<26>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_select_cc_i8_i32_param_0]; ; O3-NEXT: ld.param.v4.b32 {%r2, %r3, %r4, %r5}, [test_select_cc_i8_i32_param_2]; ; O3-NEXT: ld.param.v4.b32 {%r6, %r7, %r8, %r9}, [test_select_cc_i8_i32_param_3]; ; O3-NEXT: setp.ne.b32 %p1, %r2, %r6; ; O3-NEXT: setp.ne.b32 %p2, %r3, %r7; ; O3-NEXT: setp.ne.b32 %p3, %r4, %r8; ; O3-NEXT: setp.ne.b32 %p4, %r5, %r9; ; O3-NEXT: ld.param.b32 %r10, [test_select_cc_i8_i32_param_1]; ; O3-NEXT: prmt.b32 %r11, %r10, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r12, %r1, 0, 0x7773U; ; O3-NEXT: selp.b32 %r13, %r12, %r11, %p4; ; O3-NEXT: prmt.b32 %r14, %r10, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r15, %r1, 0, 0x7772U; ; O3-NEXT: selp.b32 %r16, %r15, %r14, %p3; ; O3-NEXT: prmt.b32 %r17, %r16, %r13, 0x3340U; ; O3-NEXT: prmt.b32 %r18, %r10, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r19, %r1, 0, 0x7771U; ; O3-NEXT: selp.b32 %r20, %r19, %r18, %p2; ; O3-NEXT: prmt.b32 %r21, %r10, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r22, %r1, 0, 0x7770U; ; O3-NEXT: selp.b32 %r23, %r22, %r21, %p1; ; O3-NEXT: prmt.b32 %r24, %r23, %r20, 0x3340U; ; O3-NEXT: prmt.b32 %r25, %r24, %r17, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r25; ; O3-NEXT: ret; <4 x i32> %c, <4 x i32> %d) #0 { %cc = icmp ne <4 x i32> %c, %d %r = select <4 x i1> %cc, <4 x i8> %a, <4 x i8> %b ret <4 x i8> %r } define <4 x i8> @test_trunc_2xi32(<4 x i32> %a) #0 { ; CHECK-LABEL: test_trunc_2xi32( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<8>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.v4.b32 {%r1, %r2, %r3, %r4}, [test_trunc_2xi32_param_0]; ; CHECK-NEXT: prmt.b32 %r5, %r3, %r4, 0x3340U; ; CHECK-NEXT: prmt.b32 %r6, %r1, %r2, 0x3340U; ; CHECK-NEXT: prmt.b32 %r7, %r6, %r5, 0x5410U; ; CHECK-NEXT: st.param.b32 [func_retval0], %r7; ; CHECK-NEXT: ret; %r = trunc <4 x i32> %a to <4 x i8> ret <4 x i8> %r } define <4 x i8> @test_trunc_2xi64(<4 x i64> %a) #0 { ; O0-LABEL: test_trunc_2xi64( ; O0: { ; O0-NEXT: .reg .b32 %r<8>; ; O0-NEXT: .reg .b64 %rd<5>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.v2.b64 {%rd3, %rd4}, [test_trunc_2xi64_param_0+16]; ; O0-NEXT: ld.param.v2.b64 {%rd1, %rd2}, [test_trunc_2xi64_param_0]; ; O0-NEXT: cvt.u32.u64 %r1, %rd4; ; O0-NEXT: cvt.u32.u64 %r2, %rd3; ; O0-NEXT: prmt.b32 %r3, %r2, %r1, 0x3340U; ; O0-NEXT: cvt.u32.u64 %r4, %rd2; ; O0-NEXT: cvt.u32.u64 %r5, %rd1; ; O0-NEXT: prmt.b32 %r6, %r5, %r4, 0x3340U; ; O0-NEXT: prmt.b32 %r7, %r6, %r3, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r7; ; O0-NEXT: ret; ; ; O3-LABEL: test_trunc_2xi64( ; O3: { ; O3-NEXT: .reg .b32 %r<8>; ; O3-NEXT: .reg .b64 %rd<5>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.v2.b64 {%rd1, %rd2}, [test_trunc_2xi64_param_0]; ; O3-NEXT: ld.param.v2.b64 {%rd3, %rd4}, [test_trunc_2xi64_param_0+16]; ; O3-NEXT: cvt.u32.u64 %r1, %rd4; ; O3-NEXT: cvt.u32.u64 %r2, %rd3; ; O3-NEXT: prmt.b32 %r3, %r2, %r1, 0x3340U; ; O3-NEXT: cvt.u32.u64 %r4, %rd2; ; O3-NEXT: cvt.u32.u64 %r5, %rd1; ; O3-NEXT: prmt.b32 %r6, %r5, %r4, 0x3340U; ; O3-NEXT: prmt.b32 %r7, %r6, %r3, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r7; ; O3-NEXT: ret; %r = trunc <4 x i64> %a to <4 x i8> ret <4 x i8> %r } define <4 x i32> @test_zext_2xi32(<4 x i8> %a) #0 { ; CHECK-LABEL: test_zext_2xi32( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<6>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_zext_2xi32_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; CHECK-NEXT: prmt.b32 %r3, %r1, 0, 0x7772U; ; CHECK-NEXT: prmt.b32 %r4, %r1, 0, 0x7771U; ; CHECK-NEXT: prmt.b32 %r5, %r1, 0, 0x7770U; ; CHECK-NEXT: st.param.v4.b32 [func_retval0], {%r5, %r4, %r3, %r2}; ; CHECK-NEXT: ret; %r = zext <4 x i8> %a to <4 x i32> ret <4 x i32> %r } define <4 x i64> @test_zext_2xi64(<4 x i8> %a) #0 { ; O0-LABEL: test_zext_2xi64( ; O0: { ; O0-NEXT: .reg .b32 %r<6>; ; O0-NEXT: .reg .b64 %rd<5>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r1, [test_zext_2xi64_param_0]; ; O0-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; O0-NEXT: cvt.u64.u32 %rd1, %r2; ; O0-NEXT: prmt.b32 %r3, %r1, 0, 0x7772U; ; O0-NEXT: cvt.u64.u32 %rd2, %r3; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7771U; ; O0-NEXT: cvt.u64.u32 %rd3, %r4; ; O0-NEXT: prmt.b32 %r5, %r1, 0, 0x7770U; ; O0-NEXT: cvt.u64.u32 %rd4, %r5; ; O0-NEXT: st.param.v2.b64 [func_retval0], {%rd4, %rd3}; ; O0-NEXT: st.param.v2.b64 [func_retval0+16], {%rd2, %rd1}; ; O0-NEXT: ret; ; ; O3-LABEL: test_zext_2xi64( ; O3: { ; O3-NEXT: .reg .b32 %r<6>; ; O3-NEXT: .reg .b64 %rd<5>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_zext_2xi64_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, 0, 0x7771U; ; O3-NEXT: cvt.u64.u32 %rd1, %r2; ; O3-NEXT: prmt.b32 %r3, %r1, 0, 0x7770U; ; O3-NEXT: cvt.u64.u32 %rd2, %r3; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7773U; ; O3-NEXT: cvt.u64.u32 %rd3, %r4; ; O3-NEXT: prmt.b32 %r5, %r1, 0, 0x7772U; ; O3-NEXT: cvt.u64.u32 %rd4, %r5; ; O3-NEXT: st.param.v2.b64 [func_retval0+16], {%rd4, %rd3}; ; O3-NEXT: st.param.v2.b64 [func_retval0], {%rd2, %rd1}; ; O3-NEXT: ret; %r = zext <4 x i8> %a to <4 x i64> ret <4 x i64> %r } define <4 x i8> @test_bitcast_i32_to_4xi8(i32 %a) #0 { ; CHECK-LABEL: test_bitcast_i32_to_4xi8( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<2>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_bitcast_i32_to_4xi8_param_0]; ; CHECK-NEXT: st.param.b32 [func_retval0], %r1; ; CHECK-NEXT: ret; %r = bitcast i32 %a to <4 x i8> ret <4 x i8> %r } define <4 x i8> @test_bitcast_float_to_4xi8(float %a) #0 { ; CHECK-LABEL: test_bitcast_float_to_4xi8( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<2>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_bitcast_float_to_4xi8_param_0]; ; CHECK-NEXT: st.param.b32 [func_retval0], %r1; ; CHECK-NEXT: ret; %r = bitcast float %a to <4 x i8> ret <4 x i8> %r } define i32 @test_bitcast_4xi8_to_i32(<4 x i8> %a) #0 { ; CHECK-LABEL: test_bitcast_4xi8_to_i32( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<2>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_bitcast_4xi8_to_i32_param_0]; ; CHECK-NEXT: st.param.b32 [func_retval0], %r1; ; CHECK-NEXT: ret; %r = bitcast <4 x i8> %a to i32 ret i32 %r } define float @test_bitcast_4xi8_to_float(<4 x i8> %a) #0 { ; CHECK-LABEL: test_bitcast_4xi8_to_float( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<2>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_bitcast_4xi8_to_float_param_0]; ; CHECK-NEXT: st.param.b32 [func_retval0], %r1; ; CHECK-NEXT: ret; %r = bitcast <4 x i8> %a to float ret float %r } define <2 x half> @test_bitcast_4xi8_to_2xhalf(i8 %a) #0 { ; O0-LABEL: test_bitcast_4xi8_to_2xhalf( ; O0: { ; O0-NEXT: .reg .b16 %rs<2>; ; O0-NEXT: .reg .b32 %r<6>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_bitcast_4xi8_to_2xhalf_param_0]; ; O0-NEXT: mov.b32 %r1, 6; ; O0-NEXT: prmt.b32 %r2, %r1, 7, 0x3340U; ; O0-NEXT: cvt.u32.u16 %r3, %rs1; ; O0-NEXT: prmt.b32 %r4, %r3, 5, 0x3340U; ; O0-NEXT: prmt.b32 %r5, %r4, %r2, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r5; ; O0-NEXT: ret; ; ; O3-LABEL: test_bitcast_4xi8_to_2xhalf( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b8 %r1, [test_bitcast_4xi8_to_2xhalf_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, 5, 0x3340U; ; O3-NEXT: prmt.b32 %r3, %r2, 1798, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %ins.0 = insertelement <4 x i8> undef, i8 %a, i32 0 %ins.1 = insertelement <4 x i8> %ins.0, i8 5, i32 1 %ins.2 = insertelement <4 x i8> %ins.1, i8 6, i32 2 %ins.3 = insertelement <4 x i8> %ins.2, i8 7, i32 3 %r = bitcast <4 x i8> %ins.3 to <2 x half> ret <2 x half> %r } define <4 x i8> @test_shufflevector(<4 x i8> %a) #0 { ; O0-LABEL: test_shufflevector( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r1, [test_shufflevector_param_0]; ; O0-NEXT: // implicit-def: %r3 ; O0-NEXT: prmt.b32 %r2, %r1, %r3, 0x123U; ; O0-NEXT: st.param.b32 [func_retval0], %r2; ; O0-NEXT: ret; ; ; O3-LABEL: test_shufflevector( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_shufflevector_param_0]; ; O3-NEXT: prmt.b32 %r2, %r1, %r3, 0x123U; ; O3-NEXT: st.param.b32 [func_retval0], %r2; ; O3-NEXT: ret; %s = shufflevector <4 x i8> %a, <4 x i8> undef, <4 x i32> ret <4 x i8> %s } define <4 x i8> @test_shufflevector_2(<4 x i8> %a, <4 x i8> %b) #0 { ; O0-LABEL: test_shufflevector_2( ; O0: { ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b32 %r2, [test_shufflevector_2_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_shufflevector_2_param_0]; ; O0-NEXT: prmt.b32 %r3, %r1, %r2, 0x2537U; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_shufflevector_2( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_shufflevector_2_param_0]; ; O3-NEXT: ld.param.b32 %r2, [test_shufflevector_2_param_1]; ; O3-NEXT: prmt.b32 %r3, %r1, %r2, 0x2537U; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %s = shufflevector <4 x i8> %a, <4 x i8> %b, <4 x i32> ret <4 x i8> %s } define <4 x i8> @test_insertelement(<4 x i8> %a, i8 %x) #0 { ; O0-LABEL: test_insertelement( ; O0: { ; O0-NEXT: .reg .b16 %rs<2>; ; O0-NEXT: .reg .b32 %r<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.b8 %rs1, [test_insertelement_param_1]; ; O0-NEXT: ld.param.b32 %r1, [test_insertelement_param_0]; ; O0-NEXT: cvt.u32.u16 %r2, %rs1; ; O0-NEXT: bfi.b32 %r3, %r2, %r1, 8, 8; ; O0-NEXT: st.param.b32 [func_retval0], %r3; ; O0-NEXT: ret; ; ; O3-LABEL: test_insertelement( ; O3: { ; O3-NEXT: .reg .b32 %r<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.b32 %r1, [test_insertelement_param_0]; ; O3-NEXT: ld.param.b8 %r2, [test_insertelement_param_1]; ; O3-NEXT: bfi.b32 %r3, %r2, %r1, 8, 8; ; O3-NEXT: st.param.b32 [func_retval0], %r3; ; O3-NEXT: ret; %i = insertelement <4 x i8> %a, i8 %x, i64 1 ret <4 x i8> %i } define <4 x i8> @test_fptosi_4xhalf_to_4xi8(<4 x half> %a) #0 { ; O0-LABEL: test_fptosi_4xhalf_to_4xi8( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<12>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_fptosi_4xhalf_to_4xi8_param_0]; ; O0-NEXT: mov.b32 {%rs1, %rs2}, %r2; ; O0-NEXT: cvt.rzi.s16.f16 %rs3, %rs2; ; O0-NEXT: cvt.rzi.s16.f16 %rs4, %rs1; ; O0-NEXT: mov.b32 %r3, {%rs4, %rs3}; ; O0-NEXT: mov.b32 {%rs5, %rs6}, %r3; ; O0-NEXT: cvt.u32.u16 %r4, %rs6; ; O0-NEXT: cvt.u32.u16 %r5, %rs5; ; O0-NEXT: prmt.b32 %r6, %r5, %r4, 0x3340U; ; O0-NEXT: mov.b32 {%rs7, %rs8}, %r1; ; O0-NEXT: cvt.rzi.s16.f16 %rs9, %rs8; ; O0-NEXT: cvt.rzi.s16.f16 %rs10, %rs7; ; O0-NEXT: mov.b32 %r7, {%rs10, %rs9}; ; O0-NEXT: mov.b32 {%rs11, %rs12}, %r7; ; O0-NEXT: cvt.u32.u16 %r8, %rs12; ; O0-NEXT: cvt.u32.u16 %r9, %rs11; ; O0-NEXT: prmt.b32 %r10, %r9, %r8, 0x3340U; ; O0-NEXT: prmt.b32 %r11, %r10, %r6, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r11; ; O0-NEXT: ret; ; ; O3-LABEL: test_fptosi_4xhalf_to_4xi8( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<10>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.v4.b16 {%rs1, %rs2, %rs3, %rs4}, [test_fptosi_4xhalf_to_4xi8_param_0]; ; O3-NEXT: cvt.rzi.s16.f16 %rs5, %rs4; ; O3-NEXT: cvt.rzi.s16.f16 %rs6, %rs3; ; O3-NEXT: mov.b32 %r1, {%rs6, %rs5}; ; O3-NEXT: mov.b32 {%rs7, %rs8}, %r1; ; O3-NEXT: cvt.u32.u16 %r2, %rs8; ; O3-NEXT: cvt.u32.u16 %r3, %rs7; ; O3-NEXT: prmt.b32 %r4, %r3, %r2, 0x3340U; ; O3-NEXT: cvt.rzi.s16.f16 %rs9, %rs2; ; O3-NEXT: cvt.rzi.s16.f16 %rs10, %rs1; ; O3-NEXT: mov.b32 %r5, {%rs10, %rs9}; ; O3-NEXT: mov.b32 {%rs11, %rs12}, %r5; ; O3-NEXT: cvt.u32.u16 %r6, %rs12; ; O3-NEXT: cvt.u32.u16 %r7, %rs11; ; O3-NEXT: prmt.b32 %r8, %r7, %r6, 0x3340U; ; O3-NEXT: prmt.b32 %r9, %r8, %r4, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r9; ; O3-NEXT: ret; %r = fptosi <4 x half> %a to <4 x i8> ret <4 x i8> %r } define <4 x i8> @test_fptoui_4xhalf_to_4xi8(<4 x half> %a) #0 { ; O0-LABEL: test_fptoui_4xhalf_to_4xi8( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<12>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: ; O0-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_fptoui_4xhalf_to_4xi8_param_0]; ; O0-NEXT: mov.b32 {%rs1, %rs2}, %r2; ; O0-NEXT: cvt.rzi.u16.f16 %rs3, %rs2; ; O0-NEXT: cvt.rzi.u16.f16 %rs4, %rs1; ; O0-NEXT: mov.b32 %r3, {%rs4, %rs3}; ; O0-NEXT: mov.b32 {%rs5, %rs6}, %r3; ; O0-NEXT: cvt.u32.u16 %r4, %rs6; ; O0-NEXT: cvt.u32.u16 %r5, %rs5; ; O0-NEXT: prmt.b32 %r6, %r5, %r4, 0x3340U; ; O0-NEXT: mov.b32 {%rs7, %rs8}, %r1; ; O0-NEXT: cvt.rzi.u16.f16 %rs9, %rs8; ; O0-NEXT: cvt.rzi.u16.f16 %rs10, %rs7; ; O0-NEXT: mov.b32 %r7, {%rs10, %rs9}; ; O0-NEXT: mov.b32 {%rs11, %rs12}, %r7; ; O0-NEXT: cvt.u32.u16 %r8, %rs12; ; O0-NEXT: cvt.u32.u16 %r9, %rs11; ; O0-NEXT: prmt.b32 %r10, %r9, %r8, 0x3340U; ; O0-NEXT: prmt.b32 %r11, %r10, %r6, 0x5410U; ; O0-NEXT: st.param.b32 [func_retval0], %r11; ; O0-NEXT: ret; ; ; O3-LABEL: test_fptoui_4xhalf_to_4xi8( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<10>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: ; O3-NEXT: ld.param.v4.b16 {%rs1, %rs2, %rs3, %rs4}, [test_fptoui_4xhalf_to_4xi8_param_0]; ; O3-NEXT: cvt.rzi.u16.f16 %rs5, %rs4; ; O3-NEXT: cvt.rzi.u16.f16 %rs6, %rs3; ; O3-NEXT: mov.b32 %r1, {%rs6, %rs5}; ; O3-NEXT: mov.b32 {%rs7, %rs8}, %r1; ; O3-NEXT: cvt.u32.u16 %r2, %rs8; ; O3-NEXT: cvt.u32.u16 %r3, %rs7; ; O3-NEXT: prmt.b32 %r4, %r3, %r2, 0x3340U; ; O3-NEXT: cvt.rzi.u16.f16 %rs9, %rs2; ; O3-NEXT: cvt.rzi.u16.f16 %rs10, %rs1; ; O3-NEXT: mov.b32 %r5, {%rs10, %rs9}; ; O3-NEXT: mov.b32 {%rs11, %rs12}, %r5; ; O3-NEXT: cvt.u32.u16 %r6, %rs12; ; O3-NEXT: cvt.u32.u16 %r7, %rs11; ; O3-NEXT: prmt.b32 %r8, %r7, %r6, 0x3340U; ; O3-NEXT: prmt.b32 %r9, %r8, %r4, 0x5410U; ; O3-NEXT: st.param.b32 [func_retval0], %r9; ; O3-NEXT: ret; %r = fptoui <4 x half> %a to <4 x i8> ret <4 x i8> %r } define void @test_srem_v4i8(ptr %a, ptr %b, ptr %c) { ; O0-LABEL: test_srem_v4i8( ; O0: { ; O0-NEXT: .reg .b16 %rs<13>; ; O0-NEXT: .reg .b32 %r<16>; ; O0-NEXT: .reg .b64 %rd<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: // %entry ; O0-NEXT: ld.param.b64 %rd3, [test_srem_v4i8_param_2]; ; O0-NEXT: ld.param.b64 %rd2, [test_srem_v4i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_srem_v4i8_param_0]; ; O0-NEXT: ld.b32 %r1, [%rd1]; ; O0-NEXT: ld.b32 %r2, [%rd2]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0xbbb3U; ; O0-NEXT: cvt.u16.u32 %rs1, %r3; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0xbbb3U; ; O0-NEXT: cvt.u16.u32 %rs2, %r4; ; O0-NEXT: rem.s16 %rs3, %rs2, %rs1; ; O0-NEXT: cvt.u32.u16 %r5, %rs3; ; O0-NEXT: prmt.b32 %r6, %r2, 0, 0xaaa2U; ; O0-NEXT: cvt.u16.u32 %rs4, %r6; ; O0-NEXT: prmt.b32 %r7, %r1, 0, 0xaaa2U; ; O0-NEXT: cvt.u16.u32 %rs5, %r7; ; O0-NEXT: rem.s16 %rs6, %rs5, %rs4; ; O0-NEXT: cvt.u32.u16 %r8, %rs6; ; O0-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O0-NEXT: cvt.s8.s32 %rs7, %r2; ; O0-NEXT: cvt.s8.s32 %rs8, %r1; ; O0-NEXT: rem.s16 %rs9, %rs8, %rs7; ; O0-NEXT: cvt.u32.u16 %r10, %rs9; ; O0-NEXT: prmt.b32 %r11, %r2, 0, 0x9991U; ; O0-NEXT: cvt.u16.u32 %rs10, %r11; ; O0-NEXT: prmt.b32 %r12, %r1, 0, 0x9991U; ; O0-NEXT: cvt.u16.u32 %rs11, %r12; ; O0-NEXT: rem.s16 %rs12, %rs11, %rs10; ; O0-NEXT: cvt.u32.u16 %r13, %rs12; ; O0-NEXT: prmt.b32 %r14, %r10, %r13, 0x3340U; ; O0-NEXT: prmt.b32 %r15, %r14, %r9, 0x5410U; ; O0-NEXT: st.b32 [%rd3], %r15; ; O0-NEXT: ret; ; ; O3-LABEL: test_srem_v4i8( ; O3: { ; O3-NEXT: .reg .b16 %rs<13>; ; O3-NEXT: .reg .b32 %r<16>; ; O3-NEXT: .reg .b64 %rd<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: // %entry ; O3-NEXT: ld.param.b64 %rd1, [test_srem_v4i8_param_0]; ; O3-NEXT: ld.b32 %r1, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_srem_v4i8_param_1]; ; O3-NEXT: ld.b32 %r2, [%rd2]; ; O3-NEXT: ld.param.b64 %rd3, [test_srem_v4i8_param_2]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0xbbb3U; ; O3-NEXT: cvt.u16.u32 %rs1, %r3; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0xbbb3U; ; O3-NEXT: cvt.u16.u32 %rs2, %r4; ; O3-NEXT: rem.s16 %rs3, %rs2, %rs1; ; O3-NEXT: cvt.u32.u16 %r5, %rs3; ; O3-NEXT: prmt.b32 %r6, %r2, 0, 0xaaa2U; ; O3-NEXT: cvt.u16.u32 %rs4, %r6; ; O3-NEXT: prmt.b32 %r7, %r1, 0, 0xaaa2U; ; O3-NEXT: cvt.u16.u32 %rs5, %r7; ; O3-NEXT: rem.s16 %rs6, %rs5, %rs4; ; O3-NEXT: cvt.u32.u16 %r8, %rs6; ; O3-NEXT: prmt.b32 %r9, %r8, %r5, 0x3340U; ; O3-NEXT: cvt.s8.s32 %rs7, %r2; ; O3-NEXT: cvt.s8.s32 %rs8, %r1; ; O3-NEXT: rem.s16 %rs9, %rs8, %rs7; ; O3-NEXT: cvt.u32.u16 %r10, %rs9; ; O3-NEXT: prmt.b32 %r11, %r2, 0, 0x9991U; ; O3-NEXT: cvt.u16.u32 %rs10, %r11; ; O3-NEXT: prmt.b32 %r12, %r1, 0, 0x9991U; ; O3-NEXT: cvt.u16.u32 %rs11, %r12; ; O3-NEXT: rem.s16 %rs12, %rs11, %rs10; ; O3-NEXT: cvt.u32.u16 %r13, %rs12; ; O3-NEXT: prmt.b32 %r14, %r10, %r13, 0x3340U; ; O3-NEXT: prmt.b32 %r15, %r14, %r9, 0x5410U; ; O3-NEXT: st.b32 [%rd3], %r15; ; O3-NEXT: ret; entry: %t57 = load <4 x i8>, ptr %a, align 4 %t59 = load <4 x i8>, ptr %b, align 4 %x = srem <4 x i8> %t57, %t59 store <4 x i8> %x, ptr %c, align 4 ret void } ;; v3i8 lowering, especially for unaligned loads is terrible. We end up doing ;; tons of pointless scalar_to_vector/bitcast/extract_elt on v2i16/v4i8, which ;; is further complicated by LLVM trying to use i16 as an intermediate type, ;; because we don't have i8 registers. It's a mess. ;; Ideally we want to split it into element-wise ops, but legalizer can't handle ;; odd-sized vectors. TL;DR; don't use odd-sized vectors of v8. define void @test_srem_v3i8(ptr %a, ptr %b, ptr %c) { ; O0-LABEL: test_srem_v3i8( ; O0: { ; O0-NEXT: .reg .b16 %rs<20>; ; O0-NEXT: .reg .b32 %r<8>; ; O0-NEXT: .reg .b64 %rd<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: // %entry ; O0-NEXT: ld.param.b64 %rd3, [test_srem_v3i8_param_2]; ; O0-NEXT: ld.param.b64 %rd2, [test_srem_v3i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_srem_v3i8_param_0]; ; O0-NEXT: ld.b8 %rs1, [%rd1]; ; O0-NEXT: ld.b8 %rs2, [%rd1+1]; ; O0-NEXT: shl.b16 %rs3, %rs2, 8; ; O0-NEXT: or.b16 %rs4, %rs3, %rs1; ; O0-NEXT: cvt.u32.u16 %r1, %rs4; ; O0-NEXT: ld.s8 %rs5, [%rd1+2]; ; O0-NEXT: ld.b8 %rs6, [%rd2]; ; O0-NEXT: ld.b8 %rs7, [%rd2+1]; ; O0-NEXT: shl.b16 %rs8, %rs7, 8; ; O0-NEXT: or.b16 %rs9, %rs8, %rs6; ; O0-NEXT: cvt.u32.u16 %r2, %rs9; ; O0-NEXT: ld.s8 %rs10, [%rd2+2]; ; O0-NEXT: cvt.s16.s8 %rs11, %rs9; ; O0-NEXT: cvt.s16.s8 %rs12, %rs4; ; O0-NEXT: rem.s16 %rs13, %rs12, %rs11; ; O0-NEXT: cvt.u32.u16 %r3, %rs13; ; O0-NEXT: prmt.b32 %r4, %r2, 0, 0x9991U; ; O0-NEXT: cvt.u16.u32 %rs14, %r4; ; O0-NEXT: prmt.b32 %r5, %r1, 0, 0x9991U; ; O0-NEXT: cvt.u16.u32 %rs15, %r5; ; O0-NEXT: rem.s16 %rs16, %rs15, %rs14; ; O0-NEXT: cvt.u32.u16 %r6, %rs16; ; O0-NEXT: prmt.b32 %r7, %r3, %r6, 0x3340U; ; O0-NEXT: rem.s16 %rs17, %rs5, %rs10; ; O0-NEXT: cvt.u16.u32 %rs18, %r7; ; O0-NEXT: st.b8 [%rd3], %rs18; ; O0-NEXT: shr.u16 %rs19, %rs18, 8; ; O0-NEXT: st.b8 [%rd3+1], %rs19; ; O0-NEXT: st.b8 [%rd3+2], %rs17; ; O0-NEXT: ret; ; ; O3-LABEL: test_srem_v3i8( ; O3: { ; O3-NEXT: .reg .b16 %rs<20>; ; O3-NEXT: .reg .b32 %r<8>; ; O3-NEXT: .reg .b64 %rd<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: // %entry ; O3-NEXT: ld.param.b64 %rd1, [test_srem_v3i8_param_0]; ; O3-NEXT: ld.b8 %rs1, [%rd1]; ; O3-NEXT: ld.b8 %rs2, [%rd1+1]; ; O3-NEXT: shl.b16 %rs3, %rs2, 8; ; O3-NEXT: or.b16 %rs4, %rs3, %rs1; ; O3-NEXT: cvt.u32.u16 %r1, %rs4; ; O3-NEXT: ld.s8 %rs5, [%rd1+2]; ; O3-NEXT: ld.param.b64 %rd2, [test_srem_v3i8_param_1]; ; O3-NEXT: ld.b8 %rs6, [%rd2]; ; O3-NEXT: ld.b8 %rs7, [%rd2+1]; ; O3-NEXT: shl.b16 %rs8, %rs7, 8; ; O3-NEXT: or.b16 %rs9, %rs8, %rs6; ; O3-NEXT: cvt.u32.u16 %r2, %rs9; ; O3-NEXT: ld.s8 %rs10, [%rd2+2]; ; O3-NEXT: ld.param.b64 %rd3, [test_srem_v3i8_param_2]; ; O3-NEXT: cvt.s16.s8 %rs11, %rs9; ; O3-NEXT: cvt.s16.s8 %rs12, %rs4; ; O3-NEXT: rem.s16 %rs13, %rs12, %rs11; ; O3-NEXT: cvt.u32.u16 %r3, %rs13; ; O3-NEXT: prmt.b32 %r4, %r2, 0, 0x9991U; ; O3-NEXT: cvt.u16.u32 %rs14, %r4; ; O3-NEXT: prmt.b32 %r5, %r1, 0, 0x9991U; ; O3-NEXT: cvt.u16.u32 %rs15, %r5; ; O3-NEXT: rem.s16 %rs16, %rs15, %rs14; ; O3-NEXT: cvt.u32.u16 %r6, %rs16; ; O3-NEXT: prmt.b32 %r7, %r3, %r6, 0x3340U; ; O3-NEXT: rem.s16 %rs17, %rs5, %rs10; ; O3-NEXT: st.b8 [%rd3+2], %rs17; ; O3-NEXT: cvt.u16.u32 %rs18, %r7; ; O3-NEXT: st.b8 [%rd3], %rs18; ; O3-NEXT: shr.u16 %rs19, %rs18, 8; ; O3-NEXT: st.b8 [%rd3+1], %rs19; ; O3-NEXT: ret; entry: %t57 = load <3 x i8>, ptr %a, align 1 %t59 = load <3 x i8>, ptr %b, align 1 %x = srem <3 x i8> %t57, %t59 store <3 x i8> %x, ptr %c, align 1 ret void } define void @test_sext_v4i1_to_v4i8(ptr %a, ptr %b, ptr %c) { ; O0-LABEL: test_sext_v4i1_to_v4i8( ; O0: { ; O0-NEXT: .reg .pred %p<5>; ; O0-NEXT: .reg .b32 %r<18>; ; O0-NEXT: .reg .b64 %rd<4>; ; O0-EMPTY: ; O0-NEXT: // %bb.0: // %entry ; O0-NEXT: ld.param.b64 %rd3, [test_sext_v4i1_to_v4i8_param_2]; ; O0-NEXT: ld.param.b64 %rd2, [test_sext_v4i1_to_v4i8_param_1]; ; O0-NEXT: ld.param.b64 %rd1, [test_sext_v4i1_to_v4i8_param_0]; ; O0-NEXT: ld.b32 %r1, [%rd1]; ; O0-NEXT: ld.b32 %r2, [%rd2]; ; O0-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O0-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O0-NEXT: setp.gt.u32 %p1, %r4, %r3; ; O0-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O0-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O0-NEXT: setp.gt.u32 %p2, %r6, %r5; ; O0-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O0-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O0-NEXT: setp.gt.u32 %p3, %r8, %r7; ; O0-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O0-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O0-NEXT: setp.gt.u32 %p4, %r10, %r9; ; O0-NEXT: selp.b32 %r11, -1, 0, %p4; ; O0-NEXT: selp.b32 %r12, -1, 0, %p3; ; O0-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O0-NEXT: selp.b32 %r14, -1, 0, %p2; ; O0-NEXT: selp.b32 %r15, -1, 0, %p1; ; O0-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O0-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O0-NEXT: st.b32 [%rd3], %r17; ; O0-NEXT: ret; ; ; O3-LABEL: test_sext_v4i1_to_v4i8( ; O3: { ; O3-NEXT: .reg .pred %p<5>; ; O3-NEXT: .reg .b32 %r<18>; ; O3-NEXT: .reg .b64 %rd<4>; ; O3-EMPTY: ; O3-NEXT: // %bb.0: // %entry ; O3-NEXT: ld.param.b64 %rd1, [test_sext_v4i1_to_v4i8_param_0]; ; O3-NEXT: ld.b32 %r1, [%rd1]; ; O3-NEXT: ld.param.b64 %rd2, [test_sext_v4i1_to_v4i8_param_1]; ; O3-NEXT: ld.b32 %r2, [%rd2]; ; O3-NEXT: ld.param.b64 %rd3, [test_sext_v4i1_to_v4i8_param_2]; ; O3-NEXT: prmt.b32 %r3, %r2, 0, 0x7770U; ; O3-NEXT: prmt.b32 %r4, %r1, 0, 0x7770U; ; O3-NEXT: setp.gt.u32 %p1, %r4, %r3; ; O3-NEXT: prmt.b32 %r5, %r2, 0, 0x7771U; ; O3-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; O3-NEXT: setp.gt.u32 %p2, %r6, %r5; ; O3-NEXT: prmt.b32 %r7, %r2, 0, 0x7772U; ; O3-NEXT: prmt.b32 %r8, %r1, 0, 0x7772U; ; O3-NEXT: setp.gt.u32 %p3, %r8, %r7; ; O3-NEXT: prmt.b32 %r9, %r2, 0, 0x7773U; ; O3-NEXT: prmt.b32 %r10, %r1, 0, 0x7773U; ; O3-NEXT: setp.gt.u32 %p4, %r10, %r9; ; O3-NEXT: selp.b32 %r11, -1, 0, %p4; ; O3-NEXT: selp.b32 %r12, -1, 0, %p3; ; O3-NEXT: prmt.b32 %r13, %r12, %r11, 0x3340U; ; O3-NEXT: selp.b32 %r14, -1, 0, %p2; ; O3-NEXT: selp.b32 %r15, -1, 0, %p1; ; O3-NEXT: prmt.b32 %r16, %r15, %r14, 0x3340U; ; O3-NEXT: prmt.b32 %r17, %r16, %r13, 0x5410U; ; O3-NEXT: st.b32 [%rd3], %r17; ; O3-NEXT: ret; entry: %t1 = load <4 x i8>, ptr %a, align 4 %t2 = load <4 x i8>, ptr %b, align 4 %t5 = icmp ugt <4 x i8> %t1, %t2 %t6 = sext <4 x i1> %t5 to <4 x i8> store <4 x i8> %t6, ptr %c, align 4 ret void } define <4 x float> @test_uitofp_v4i8(<4 x i8> %a) { ; CHECK-LABEL: test_uitofp_v4i8( ; CHECK: { ; CHECK-NEXT: .reg .b32 %r<10>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_uitofp_v4i8_param_0]; ; CHECK-NEXT: prmt.b32 %r2, %r1, 0, 0x7773U; ; CHECK-NEXT: cvt.rn.f32.u32 %r3, %r2; ; CHECK-NEXT: prmt.b32 %r4, %r1, 0, 0x7772U; ; CHECK-NEXT: cvt.rn.f32.u32 %r5, %r4; ; CHECK-NEXT: prmt.b32 %r6, %r1, 0, 0x7771U; ; CHECK-NEXT: cvt.rn.f32.u32 %r7, %r6; ; CHECK-NEXT: prmt.b32 %r8, %r1, 0, 0x7770U; ; CHECK-NEXT: cvt.rn.f32.u32 %r9, %r8; ; CHECK-NEXT: st.param.v4.b32 [func_retval0], {%r9, %r7, %r5, %r3}; ; CHECK-NEXT: ret; %r = uitofp <4 x i8> %a to <4 x float> ret <4 x float> %r } define <4 x float> @test_sitofp_v4i8(<4 x i8> %a) { ; CHECK-LABEL: test_sitofp_v4i8( ; CHECK: { ; CHECK-NEXT: .reg .b16 %rs<5>; ; CHECK-NEXT: .reg .b32 %r<9>; ; CHECK-EMPTY: ; CHECK-NEXT: // %bb.0: ; CHECK-NEXT: ld.param.b32 %r1, [test_sitofp_v4i8_param_0]; ; CHECK-NEXT: cvt.s8.s32 %rs1, %r1; ; CHECK-NEXT: cvt.rn.f32.s16 %r2, %rs1; ; CHECK-NEXT: prmt.b32 %r3, %r1, 0, 0xbbb3U; ; CHECK-NEXT: cvt.u16.u32 %rs2, %r3; ; CHECK-NEXT: cvt.rn.f32.s16 %r4, %rs2; ; CHECK-NEXT: prmt.b32 %r5, %r1, 0, 0xaaa2U; ; CHECK-NEXT: cvt.u16.u32 %rs3, %r5; ; CHECK-NEXT: cvt.rn.f32.s16 %r6, %rs3; ; CHECK-NEXT: prmt.b32 %r7, %r1, 0, 0x9991U; ; CHECK-NEXT: cvt.u16.u32 %rs4, %r7; ; CHECK-NEXT: cvt.rn.f32.s16 %r8, %rs4; ; CHECK-NEXT: st.param.v4.b32 [func_retval0], {%r2, %r8, %r6, %r4}; ; CHECK-NEXT: ret; %r = sitofp <4 x i8> %a to <4 x float> ret <4 x float> %r } attributes #0 = { nounwind }