; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc -mtriple=powerpc64le -mcpu=pwr10 < %s | FileCheck %s --check-prefix=CHECK-LE ; RUN: llc -mtriple=powerpc64 -mcpu=pwr10 < %s | FileCheck %s --check-prefix=CHECK-BE ; RUN: llc -mtriple=powerpc64 -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-P7-BE ; i16 = bitcast(v16i1 truncate(v16i8)) define fastcc <16 x i16> @test_v16i8_to_i16(<16 x i1> %0) { ; CHECK-LE-LABEL: test_v16i8_to_i16: ; CHECK-LE: # %bb.0: # %Entry ; CHECK-LE-NEXT: plxv 35, .LCPI0_0@PCREL(0), 1 ; CHECK-LE-NEXT: plxv 1, .LCPI0_1@PCREL(0), 1 ; CHECK-LE-NEXT: li 4, 0 ; CHECK-LE-NEXT: mtfprd 0, 4 ; CHECK-LE-NEXT: vbpermq 2, 2, 3 ; CHECK-LE-NEXT: xxlxor 35, 35, 35 ; CHECK-LE-NEXT: mfvsrwz 3, 34 ; CHECK-LE-NEXT: mtvsrd 34, 3 ; CHECK-LE-NEXT: xxperm 34, 0, 1 ; CHECK-LE-NEXT: blr ; ; CHECK-BE-LABEL: test_v16i8_to_i16: ; CHECK-BE: # %bb.0: # %Entry ; CHECK-BE-NEXT: addis 3, 2, .LCPI0_0@toc@ha ; CHECK-BE-NEXT: addi 3, 3, .LCPI0_0@toc@l ; CHECK-BE-NEXT: lxv 35, 0(3) ; CHECK-BE-NEXT: vbpermq 2, 2, 3 ; CHECK-BE-NEXT: xxlxor 35, 35, 35 ; CHECK-BE-NEXT: mfvsrwz 3, 34 ; CHECK-BE-NEXT: mtfprwz 0, 3 ; CHECK-BE-NEXT: addis 3, 2, .LCPI0_1@toc@ha ; CHECK-BE-NEXT: addi 3, 3, .LCPI0_1@toc@l ; CHECK-BE-NEXT: lxv 1, 0(3) ; CHECK-BE-NEXT: li 3, 0 ; CHECK-BE-NEXT: mtvsrwz 34, 3 ; CHECK-BE-NEXT: xxperm 34, 0, 1 ; CHECK-BE-NEXT: blr ; ; CHECK-P7-BE-LABEL: test_v16i8_to_i16: ; CHECK-P7-BE: # %bb.0: # %Entry ; CHECK-P7-BE-NEXT: addi 3, 1, -32 ; CHECK-P7-BE-NEXT: xxlxor 36, 36, 36 ; CHECK-P7-BE-NEXT: stxvw4x 34, 0, 3 ; CHECK-P7-BE-NEXT: lbz 3, -17(1) ; CHECK-P7-BE-NEXT: lbz 4, -18(1) ; CHECK-P7-BE-NEXT: clrlwi 3, 3, 31 ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 1, 30, 30 ; CHECK-P7-BE-NEXT: lbz 4, -19(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 2, 29, 29 ; CHECK-P7-BE-NEXT: lbz 4, -20(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 3, 28, 28 ; CHECK-P7-BE-NEXT: lbz 4, -21(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 4, 27, 27 ; CHECK-P7-BE-NEXT: lbz 4, -22(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 5, 26, 26 ; CHECK-P7-BE-NEXT: lbz 4, -23(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 6, 25, 25 ; CHECK-P7-BE-NEXT: lbz 4, -24(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 7, 24, 24 ; CHECK-P7-BE-NEXT: lbz 4, -25(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 8, 23, 23 ; CHECK-P7-BE-NEXT: lbz 4, -26(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 9, 22, 22 ; CHECK-P7-BE-NEXT: lbz 4, -27(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 10, 21, 21 ; CHECK-P7-BE-NEXT: lbz 4, -28(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 11, 20, 20 ; CHECK-P7-BE-NEXT: lbz 4, -29(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 12, 19, 19 ; CHECK-P7-BE-NEXT: lbz 4, -30(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 13, 18, 18 ; CHECK-P7-BE-NEXT: lbz 4, -31(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 14, 17, 17 ; CHECK-P7-BE-NEXT: lbz 4, -32(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 15, 16, 16 ; CHECK-P7-BE-NEXT: sldi 3, 3, 48 ; CHECK-P7-BE-NEXT: std 3, -48(1) ; CHECK-P7-BE-NEXT: std 3, -40(1) ; CHECK-P7-BE-NEXT: addis 3, 2, .LCPI0_0@toc@ha ; CHECK-P7-BE-NEXT: addi 3, 3, .LCPI0_0@toc@l ; CHECK-P7-BE-NEXT: lxvw4x 34, 0, 3 ; CHECK-P7-BE-NEXT: addi 3, 1, -48 ; CHECK-P7-BE-NEXT: lxvw4x 35, 0, 3 ; CHECK-P7-BE-NEXT: vperm 2, 3, 4, 2 ; CHECK-P7-BE-NEXT: xxlxor 35, 35, 35 ; CHECK-P7-BE-NEXT: blr Entry: %1 = bitcast <16 x i1> %0 to i16 %2 = insertelement <16 x i16> zeroinitializer, i16 %1, i64 0 ret <16 x i16> %2 } ; i8 = bitcast(v8i1 truncate(v8i16)) define fastcc <16 x i8> @test_v8i16_to_i8(<8 x i1> %0) { ; CHECK-LE-LABEL: test_v8i16_to_i8: ; CHECK-LE: # %bb.0: # %Entry ; CHECK-LE-NEXT: plxv 35, .LCPI1_0@PCREL(0), 1 ; CHECK-LE-NEXT: plxv 1, .LCPI1_1@PCREL(0), 1 ; CHECK-LE-NEXT: li 4, 0 ; CHECK-LE-NEXT: mtfprd 0, 4 ; CHECK-LE-NEXT: vbpermq 2, 2, 3 ; CHECK-LE-NEXT: mfvsrwz 3, 34 ; CHECK-LE-NEXT: mtvsrd 34, 3 ; CHECK-LE-NEXT: xxperm 34, 0, 1 ; CHECK-LE-NEXT: blr ; ; CHECK-BE-LABEL: test_v8i16_to_i8: ; CHECK-BE: # %bb.0: # %Entry ; CHECK-BE-NEXT: addis 3, 2, .LCPI1_0@toc@ha ; CHECK-BE-NEXT: addi 3, 3, .LCPI1_0@toc@l ; CHECK-BE-NEXT: lxv 35, 0(3) ; CHECK-BE-NEXT: vbpermq 2, 2, 3 ; CHECK-BE-NEXT: mfvsrwz 3, 34 ; CHECK-BE-NEXT: mtfprwz 0, 3 ; CHECK-BE-NEXT: addis 3, 2, .LCPI1_1@toc@ha ; CHECK-BE-NEXT: addi 3, 3, .LCPI1_1@toc@l ; CHECK-BE-NEXT: lxv 1, 0(3) ; CHECK-BE-NEXT: li 3, 0 ; CHECK-BE-NEXT: mtvsrwz 34, 3 ; CHECK-BE-NEXT: xxperm 34, 0, 1 ; CHECK-BE-NEXT: blr ; ; CHECK-P7-BE-LABEL: test_v8i16_to_i8: ; CHECK-P7-BE: # %bb.0: # %Entry ; CHECK-P7-BE-NEXT: addi 3, 1, -32 ; CHECK-P7-BE-NEXT: xxlxor 36, 36, 36 ; CHECK-P7-BE-NEXT: stxvw4x 34, 0, 3 ; CHECK-P7-BE-NEXT: lhz 3, -18(1) ; CHECK-P7-BE-NEXT: lhz 4, -20(1) ; CHECK-P7-BE-NEXT: clrlwi 3, 3, 31 ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 1, 30, 30 ; CHECK-P7-BE-NEXT: lhz 4, -22(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 2, 29, 29 ; CHECK-P7-BE-NEXT: lhz 4, -24(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 3, 28, 28 ; CHECK-P7-BE-NEXT: lhz 4, -26(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 4, 27, 27 ; CHECK-P7-BE-NEXT: lhz 4, -28(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 5, 26, 26 ; CHECK-P7-BE-NEXT: lhz 4, -30(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 6, 25, 25 ; CHECK-P7-BE-NEXT: lhz 4, -32(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 7, 24, 24 ; CHECK-P7-BE-NEXT: sldi 3, 3, 56 ; CHECK-P7-BE-NEXT: std 3, -48(1) ; CHECK-P7-BE-NEXT: std 3, -40(1) ; CHECK-P7-BE-NEXT: addis 3, 2, .LCPI1_0@toc@ha ; CHECK-P7-BE-NEXT: addi 3, 3, .LCPI1_0@toc@l ; CHECK-P7-BE-NEXT: lxvw4x 34, 0, 3 ; CHECK-P7-BE-NEXT: addi 3, 1, -48 ; CHECK-P7-BE-NEXT: lxvw4x 35, 0, 3 ; CHECK-P7-BE-NEXT: vperm 2, 3, 4, 2 ; CHECK-P7-BE-NEXT: blr Entry: %2 = bitcast <8 x i1> %0 to i8 %3 = insertelement <16 x i8> zeroinitializer, i8 %2, i64 0 ret <16 x i8> %3 } ; i8 = bitcast(v8i1 truncate(v8i8)) define i8 @test_v8i8_to_i8(<8 x i8> %a) { ; CHECK-LE-LABEL: test_v8i8_to_i8: ; CHECK-LE: # %bb.0: ; CHECK-LE-NEXT: plxv 35, .LCPI2_0@PCREL(0), 1 ; CHECK-LE-NEXT: vbpermq 2, 2, 3 ; CHECK-LE-NEXT: mfvsrwz 3, 34 ; CHECK-LE-NEXT: blr ; ; CHECK-BE-LABEL: test_v8i8_to_i8: ; CHECK-BE: # %bb.0: ; CHECK-BE-NEXT: addis 3, 2, .LCPI2_0@toc@ha ; CHECK-BE-NEXT: addi 3, 3, .LCPI2_0@toc@l ; CHECK-BE-NEXT: lxv 35, 0(3) ; CHECK-BE-NEXT: vbpermq 2, 2, 3 ; CHECK-BE-NEXT: mfvsrwz 3, 34 ; CHECK-BE-NEXT: blr ; ; CHECK-P7-BE-LABEL: test_v8i8_to_i8: ; CHECK-P7-BE: # %bb.0: ; CHECK-P7-BE-NEXT: addi 3, 1, -32 ; CHECK-P7-BE-NEXT: stxvw4x 34, 0, 3 ; CHECK-P7-BE-NEXT: lbz 3, -25(1) ; CHECK-P7-BE-NEXT: lbz 4, -26(1) ; CHECK-P7-BE-NEXT: clrlwi 3, 3, 31 ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 1, 30, 30 ; CHECK-P7-BE-NEXT: lbz 4, -27(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 2, 29, 29 ; CHECK-P7-BE-NEXT: lbz 4, -28(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 3, 28, 28 ; CHECK-P7-BE-NEXT: lbz 4, -29(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 4, 27, 27 ; CHECK-P7-BE-NEXT: lbz 4, -30(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 5, 26, 26 ; CHECK-P7-BE-NEXT: lbz 4, -31(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 6, 25, 25 ; CHECK-P7-BE-NEXT: lbz 4, -32(1) ; CHECK-P7-BE-NEXT: rlwimi 3, 4, 7, 24, 24 ; CHECK-P7-BE-NEXT: stb 3, -1(1) ; CHECK-P7-BE-NEXT: lbz 3, -1(1) ; CHECK-P7-BE-NEXT: blr %1 = trunc <8 x i8> %a to <8 x i1> %2 = bitcast <8 x i1> %1 to i8 ret i8 %2 }