# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+a,+zabha -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV32IA-ZABHA
# RUN: llc -mtriple=riscv32 -mattr=+a -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV32IA

---
name:            atomicrmw_add_i8_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_add_i8_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_add_i8_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s8) = G_TRUNC %1(s32)
    %3:_(s8) = G_ATOMICRMW_ADD %0(p0), %2 :: (load store monotonic (s8))
    %4:_(s32) = G_ANYEXT %3(s8)
    $x10 = COPY %4(s32)
    PseudoRET implicit $x10
...
---
name:            atomicrmw_add_i16_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_add_i16_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_add_i16_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s16) = G_TRUNC %1(s32)
    %3:_(s16) = G_ATOMICRMW_ADD %0(p0), %2 :: (load store monotonic (s16))
    %4:_(s32) = G_ANYEXT %3(s16)
    $x10 = COPY %4(s32)
    PseudoRET implicit $x10
...
---
name:            atomicrmw_add_i32_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_add_i32_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_add_i32_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s32) = G_ATOMICRMW_ADD %0(p0), %1 :: (load store monotonic (s32))
    $x10 = COPY %2(s32)
    PseudoRET implicit $x10
...
---
name:            atomicrmw_sub_i8_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_sub_i8_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-ZABHA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s8))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_sub_i8_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s8))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s8) = G_TRUNC %1(s32)
    %3:_(s8) = G_ATOMICRMW_SUB %0(p0), %2 :: (load store monotonic (s8))
    %4:_(s32) = G_ANYEXT %3(s8)
    $x10 = COPY %4(s32)
    PseudoRET implicit $x10
...
---
name:            atomicrmw_sub_i16_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_sub_i16_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-ZABHA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s16))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_sub_i16_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s16))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s16) = G_TRUNC %1(s32)
    %3:_(s16) = G_ATOMICRMW_SUB %0(p0), %2 :: (load store monotonic (s16))
    %4:_(s32) = G_ANYEXT %3(s16)
    $x10 = COPY %4(s32)
    PseudoRET implicit $x10
...
---
name:            atomicrmw_sub_i32_monotonic
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; RV32IA-ZABHA-LABEL: name: atomicrmw_sub_i32_monotonic
    ; RV32IA-ZABHA: liveins: $x10, $x11
    ; RV32IA-ZABHA-NEXT: {{  $}}
    ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-ZABHA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-ZABHA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s32))
    ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
    ;
    ; RV32IA-LABEL: name: atomicrmw_sub_i32_monotonic
    ; RV32IA: liveins: $x10, $x11
    ; RV32IA-NEXT: {{  $}}
    ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
    ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
    ; RV32IA-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; RV32IA-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
    ; RV32IA-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s32) = G_ATOMICRMW_ADD [[COPY]](p0), [[SUB]] :: (load store monotonic (s32))
    ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_ADD]](s32)
    ; RV32IA-NEXT: PseudoRET implicit $x10
    %0:_(p0) = COPY $x10
    %1:_(s32) = COPY $x11
    %2:_(s32) = G_ATOMICRMW_SUB %0(p0), %1 :: (load store monotonic (s32))
    $x10 = COPY %2(s32)
    PseudoRET implicit $x10
...