; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 < %s | FileCheck %s

define i32 @freeze_i8_load_multi_bb(ptr %p, i64 %len) {
; CHECK-LABEL: freeze_i8_load_multi_bb:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a5, 0
; CHECK-NEXT:    li a2, 32
; CHECK-NEXT:    li a3, 34
; CHECK-NEXT:    li a4, 92
; CHECK-NEXT:    j .LBB0_2
; CHECK-NEXT:  .LBB0_1: # %for.end
; CHECK-NEXT:    # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT:    beq a6, a1, .LBB0_8
; CHECK-NEXT:  .LBB0_2: # %for.cond
; CHECK-NEXT:    # =>This Loop Header: Depth=1
; CHECK-NEXT:    # Child Loop BB0_4 Depth 2
; CHECK-NEXT:    bgeu a5, a1, .LBB0_9
; CHECK-NEXT:  # %bb.3: # %for.body.preheader
; CHECK-NEXT:    # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT:    mv a6, a5
; CHECK-NEXT:    add a7, a0, a5
; CHECK-NEXT:    addi a5, a5, 1
; CHECK-NEXT:  .LBB0_4: # %for.body
; CHECK-NEXT:    # Parent Loop BB0_2 Depth=1
; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
; CHECK-NEXT:    lbu t0, 0(a7)
; CHECK-NEXT:    bltu t0, a2, .LBB0_1
; CHECK-NEXT:  # %bb.5: # %switch.test
; CHECK-NEXT:    # in Loop: Header=BB0_4 Depth=2
; CHECK-NEXT:    beq t0, a3, .LBB0_1
; CHECK-NEXT:  # %bb.6: # %switch.test
; CHECK-NEXT:    # in Loop: Header=BB0_4 Depth=2
; CHECK-NEXT:    beq t0, a4, .LBB0_1
; CHECK-NEXT:  # %bb.7: # %for.inc
; CHECK-NEXT:    # in Loop: Header=BB0_4 Depth=2
; CHECK-NEXT:    bne a5, a1, .LBB0_4
; CHECK-NEXT:  .LBB0_8: # %ret0
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
; CHECK-NEXT:  .LBB0_9: # %ret1
; CHECK-NEXT:    li a0, 1
; CHECK-NEXT:    ret
  br label %for.cond

for.cond:
  %i = phi i64 [ 0, %0 ], [ %add, %for.end ]
  %cmp = icmp ult i64 %i, %len
  br i1 %cmp, label %for.body, label %ret1

for.body:
  %arrayidx = getelementptr inbounds i8, ptr %p, i64 %i
  %load = load i8, ptr %arrayidx, align 1
  %freeze = freeze i8 %load
  %cmp.lo = icmp ugt i8 %freeze, 31
  br i1 %cmp.lo, label %switch.test, label %for.end

switch.test:
  switch i8 %freeze, label %for.inc [
    i8 92, label %for.end
    i8 34, label %for.end
  ]

for.inc:
  %inc = add nuw i64 %i, 1
  %exitcond = icmp eq i64 %inc, %len
  br i1 %exitcond, label %ret0, label %for.body

for.end:
  %cmp.end = icmp eq i64 %i, %len
  %add = add i64 %i, 1
  br i1 %cmp.end, label %ret0, label %for.cond

ret0:
  ret i32 0

ret1:
  ret i32 1
}

define i32 @freeze_i8_load_loop(ptr %p, i32 %n) {
; CHECK-LABEL: freeze_i8_load_loop:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mv a2, a0
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    li a3, 0
; CHECK-NEXT:    lbu a2, 0(a2)
; CHECK-NEXT:    sext.w a1, a1
; CHECK-NEXT:  .LBB1_1: # %loop
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    addiw a3, a3, 1
; CHECK-NEXT:    addw a0, a0, a2
; CHECK-NEXT:    blt a3, a1, .LBB1_1
; CHECK-NEXT:  # %bb.2: # %exit
; CHECK-NEXT:    ret
  %load = load i8, ptr %p
  %freeze = freeze i8 %load
  %zext = zext i8 %freeze to i32
  br label %loop

loop:
  %acc = phi i32 [ 0, %0 ], [ %sum, %loop ]
  %i = phi i32 [ 0, %0 ], [ %inc, %loop ]
  %sum = add i32 %acc, %zext
  %inc = add i32 %i, 1
  %cmp = icmp slt i32 %inc, %n
  br i1 %cmp, label %loop, label %exit

exit:
  ret i32 %sum
}

define i32 @freeze_i16_load_cross_bb(ptr %p, i1 %cond) {
; CHECK-LABEL: freeze_i16_load_cross_bb:
; CHECK:       # %bb.0:
; CHECK-NEXT:    andi a1, a1, 1
; CHECK-NEXT:    beqz a1, .LBB2_2
; CHECK-NEXT:  # %bb.1: # %then
; CHECK-NEXT:    lhu a0, 0(a0)
; CHECK-NEXT:    ret
; CHECK-NEXT:  .LBB2_2: # %else
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %load = load i16, ptr %p
  %freeze = freeze i16 %load
  br i1 %cond, label %then, label %else

then:
  %zext = zext i16 %freeze to i32
  ret i32 %zext

else:
  ret i32 0
}

define i32 @freeze_non_load_cross_bb(i8 %val, i1 %cond) {
; CHECK-LABEL: freeze_non_load_cross_bb:
; CHECK:       # %bb.0:
; CHECK-NEXT:    andi a1, a1, 1
; CHECK-NEXT:    beqz a1, .LBB3_2
; CHECK-NEXT:  # %bb.1: # %then
; CHECK-NEXT:    zext.b a0, a0
; CHECK-NEXT:    ret
; CHECK-NEXT:  .LBB3_2: # %else
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %freeze = freeze i8 %val
  br i1 %cond, label %then, label %else

then:
  %zext = zext i8 %freeze to i32
  ret i32 %zext

else:
  ret i32 0
}