; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc -mtriple=riscv32 -mattr=+m,+zcmp -verify-machineinstrs < %s | FileCheck %s --check-prefix=ZCMP ; RUN: llc -mtriple=riscv32 -mattr=+m,+xqccmp -verify-machineinstrs < %s | FileCheck %s --check-prefix=XQCCMP ; RUN: llc -mtriple=riscv32 -mattr=+m,+zcmp,+experimental-p -verify-machineinstrs < %s | FileCheck %s --check-prefix=ZCMP-P ; RUN: llc -mtriple=riscv64 -mattr=+m,+zcmp,+experimental-p -verify-machineinstrs < %s | FileCheck %s --check-prefix=ZCMP-P64 ; This source code exposed a crash in the RISC-V Zcmp move merging pass. ; The root cause was: mergeGPRPairInsns being called on targets without ; Zdinx or P extension support, triggering an unreachable in ; getGPRPairCopyOpcode. define void @test(i32 %arg0, i32 %arg1) nounwind { ; ZCMP-LABEL: test: ; ZCMP: # %bb.0: # %entry ; ZCMP-NEXT: #APP ; ZCMP-NEXT: csrr a4, 66 ; ZCMP-NEXT: #NO_APP ; ZCMP-NEXT: #APP ; ZCMP-NEXT: csrr a5, 67 ; ZCMP-NEXT: #NO_APP ; ZCMP-NEXT: #APP ; ZCMP-NEXT: #NO_APP ; ZCMP-NEXT: mv a0, a4 ; ZCMP-NEXT: mv a1, a5 ; ZCMP-NEXT: tail foo ; ; XQCCMP-LABEL: test: ; XQCCMP: # %bb.0: # %entry ; XQCCMP-NEXT: #APP ; XQCCMP-NEXT: csrr a4, 66 ; XQCCMP-NEXT: #NO_APP ; XQCCMP-NEXT: #APP ; XQCCMP-NEXT: csrr a5, 67 ; XQCCMP-NEXT: #NO_APP ; XQCCMP-NEXT: #APP ; XQCCMP-NEXT: #NO_APP ; XQCCMP-NEXT: mv a0, a4 ; XQCCMP-NEXT: mv a1, a5 ; XQCCMP-NEXT: tail foo ; ; ZCMP-P-LABEL: test: ; ZCMP-P: # %bb.0: # %entry ; ZCMP-P-NEXT: #APP ; ZCMP-P-NEXT: csrr a4, 66 ; ZCMP-P-NEXT: #NO_APP ; ZCMP-P-NEXT: #APP ; ZCMP-P-NEXT: csrr a5, 67 ; ZCMP-P-NEXT: #NO_APP ; ZCMP-P-NEXT: #APP ; ZCMP-P-NEXT: #NO_APP ; ZCMP-P-NEXT: padd.dw a0, a4, zero ; ZCMP-P-NEXT: tail foo ; ; ZCMP-P64-LABEL: test: ; ZCMP-P64: # %bb.0: # %entry ; ZCMP-P64-NEXT: #APP ; ZCMP-P64-NEXT: csrr a4, 66 ; ZCMP-P64-NEXT: #NO_APP ; ZCMP-P64-NEXT: #APP ; ZCMP-P64-NEXT: csrr a5, 67 ; ZCMP-P64-NEXT: #NO_APP ; ZCMP-P64-NEXT: #APP ; ZCMP-P64-NEXT: #NO_APP ; ZCMP-P64-NEXT: mv a0, a4 ; ZCMP-P64-NEXT: mv a1, a5 ; ZCMP-P64-NEXT: tail foo entry: %0 = tail call i32 asm sideeffect "csrr $0, 0x42", "=r"() %1 = tail call i32 asm sideeffect "csrr $0, 0x43", "=r"() tail call void asm sideeffect "", "~{x17},~{x10},~{x11},~{x12},~{x13}"() %cmp = icmp eq i32 %0, 11 br i1 %cmp, label %if.else, label %if.else if.else: %call = tail call i32 @foo(i32 %0, i32 %1) br label %if.end if.end: ret void } declare i32 @foo(i32, i32)