# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -run-pass=machine-combiner -o - %s | FileCheck %s

# Make sure the verifier doesn't fail due to dropping subregister
# uses.

---
name:            machine_combiner_subreg_verifier_error
tracksRegLiveness: true
isSSA:           true
body:             |
  bb.0:
    liveins: $v8m4, $v12m4

    ; CHECK-LABEL: name: machine_combiner_subreg_verifier_error
    ; CHECK: liveins: $v8m4, $v12m4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gprnox0 = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vrm8 = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vr = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vrm2 = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vr = IMPLICIT_DEF
    ; CHECK-NEXT: [[PseudoVSLIDEDOWN_VI_M8_:%[0-9]+]]:vrm8 = PseudoVSLIDEDOWN_VI_M8 $noreg, [[DEF2]], 26, 2 /* vl */, 5 /* e32 */, 3 /* ta, ma */
    ; CHECK-NEXT: [[PseudoVADD_VV_MF2_:%[0-9]+]]:vr = PseudoVADD_VV_MF2 $noreg, [[DEF2]].sub_vrm1_0, killed [[DEF3]], 2 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    ; CHECK-NEXT: [[PseudoVADD_VV_MF2_1:%[0-9]+]]:vr = PseudoVADD_VV_MF2 $noreg, [[PseudoVSLIDEDOWN_VI_M8_]].sub_vrm1_0, killed [[PseudoVADD_VV_MF2_]], 2 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:vrm4 = IMPLICIT_DEF
    %1:gprnox0 = IMPLICIT_DEF
    %2:vrm8 = IMPLICIT_DEF
    %3:vr = IMPLICIT_DEF
    %4:vrm2 = IMPLICIT_DEF
    %5:vr = IMPLICIT_DEF
    %6:vrm8 = PseudoVSLIDEDOWN_VI_M8 $noreg, %2, 26, 2, 5 /* e32 */, 3 /* ta, ma */
    %7:vr = PseudoVADD_VV_MF2 $noreg, %6.sub_vrm1_0, %2.sub_vrm1_0, 2, 5 /* e32 */, 1 /* ta, mu */
    %8:vr = PseudoVADD_VV_MF2 $noreg, killed %7, killed %3, 2, 5 /* e32 */, 1 /* ta, mu */
    PseudoRET implicit $v8

...