; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s

define i8 @or_load_combine(ptr %p) {
; CHECK-LABEL: or_load_combine:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, ma
; CHECK-NEXT:    vle8.v v8, (a0)
; CHECK-NEXT:    vmv.x.s a0, v8
; CHECK-NEXT:    ori a0, a0, 1
; CHECK-NEXT:    ret
  %load = load <2 x i8>, ptr %p
  %extract = extractelement <2 x i8> %load, i64 0
  %or = or i8 %extract, 1
  ret i8 %or
}