; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -O1 -mtriple=riscv64 -mattr=+v < %s | FileCheck %s

define i32 @pr134424(i64 %input_value, i32 %base_value, i1 %cond_flag1, i1 %cond_flag2, i1 %cond_flag3) {
; CHECK-LABEL: pr134424:
; CHECK:       # %bb.0: # %for.body.us.preheader.i
; CHECK-NEXT:    andi a3, a3, 1
; CHECK-NEXT:    andi a5, a2, 1
; CHECK-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
; CHECK-NEXT:    vmv.v.x v8, a0
; CHECK-NEXT:    vsetvli zero, zero, e64, m2, tu, ma
; CHECK-NEXT:    vmv.s.x v8, zero
; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
; CHECK-NEXT:    vmv.v.i v0, 14
; CHECK-NEXT:    mv a2, a1
; CHECK-NEXT:    bnez a5, .LBB0_2
; CHECK-NEXT:  # %bb.1: # %for.body.us.preheader.i
; CHECK-NEXT:    li a2, 1
; CHECK-NEXT:  .LBB0_2: # %for.body.us.preheader.i
; CHECK-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
; CHECK-NEXT:    andi a4, a4, 1
; CHECK-NEXT:    mv a0, a1
; CHECK-NEXT:    bnez a3, .LBB0_4
; CHECK-NEXT:  # %bb.3: # %for.body.us.preheader.i
; CHECK-NEXT:    li a0, 1
; CHECK-NEXT:  .LBB0_4: # %for.body.us.preheader.i
; CHECK-NEXT:    vmsle.vi v0, v8, 0
; CHECK-NEXT:    sext.w a2, a2
; CHECK-NEXT:    bnez a4, .LBB0_6
; CHECK-NEXT:  # %bb.5: # %for.body.us.preheader.i
; CHECK-NEXT:    li a1, 1
; CHECK-NEXT:  .LBB0_6: # %for.body.us.preheader.i
; CHECK-NEXT:    sext.w a0, a0
; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
; CHECK-NEXT:    vmv.v.i v8, 0
; CHECK-NEXT:    vmerge.vim v8, v8, 1, v0
; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
; CHECK-NEXT:    vredmin.vs v8, v8, v8
; CHECK-NEXT:    vmv.x.s a3, v8
; CHECK-NEXT:    sext.w a1, a1
; CHECK-NEXT:    bge a3, a2, .LBB0_11
; CHECK-NEXT:  # %bb.7: # %for.body.us.preheader.i
; CHECK-NEXT:    bge a0, a1, .LBB0_12
; CHECK-NEXT:  .LBB0_8: # %for.body.us.preheader.i
; CHECK-NEXT:    blt a3, a0, .LBB0_10
; CHECK-NEXT:  .LBB0_9: # %for.body.us.preheader.i
; CHECK-NEXT:    mv a3, a0
; CHECK-NEXT:  .LBB0_10: # %for.body.us.preheader.i
; CHECK-NEXT:    sw a3, 0(zero)
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
; CHECK-NEXT:  .LBB0_11: # %for.body.us.preheader.i
; CHECK-NEXT:    mv a3, a2
; CHECK-NEXT:    blt a0, a1, .LBB0_8
; CHECK-NEXT:  .LBB0_12: # %for.body.us.preheader.i
; CHECK-NEXT:    mv a0, a1
; CHECK-NEXT:    bge a3, a0, .LBB0_9
; CHECK-NEXT:    j .LBB0_10
for.body.us.preheader.i:
  %partial_vector = insertelement <4 x i64> zeroinitializer, i64 %input_value, i64 1
  %comparison_vector = shufflevector <4 x i64> %partial_vector, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 1, i32 1>
  %comparison_result = icmp sle <4 x i64> %comparison_vector, zeroinitializer
  %selected_value1 = select i1 %cond_flag1, i32 %base_value, i32 1
  %selected_value2 = select i1 %cond_flag2, i32 %base_value, i32 1
  %selected_value3 = select i1 %cond_flag3, i32 %base_value, i32 1
  %bool_to_int = zext <4 x i1> %comparison_result to <4 x i32>
  %extended_vector = shufflevector <4 x i32> %bool_to_int, <4 x i32> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
  %vector_min = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> %extended_vector)
  %min1 = call i32 @llvm.smin.i32(i32 %vector_min, i32 %selected_value1)
  %min2 = call i32 @llvm.smin.i32(i32 %selected_value2, i32 %selected_value3)
  %final_min = call i32 @llvm.smin.i32(i32 %min1, i32 %min2)
  store i32 %final_min, ptr null, align 4
  ret i32 0
}