# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vector-peephole \
# RUN:     -verify-machineinstrs | FileCheck %s

---
name: move_src
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: move_src
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */
    ; CHECK-NEXT: %y:gpr = ADDI $x0, 1
    %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
    %passthru:vr = COPY $v8
    %y:gpr = ADDI $x0, 1
    %z:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
---
name: tail_agnostic
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: tail_agnostic
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    %passthru:vr = COPY $v8
    %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
    %y:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 1 /* ta, mu */
...
---
name: tail_agnostic_larger_vl
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: tail_agnostic_larger_vl
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */
    %passthru:vr = COPY $v8
    %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
    %y:vr = PseudoVMV_V_V_M1 %passthru, %x, 5, 5 /* e32 */, 1 /* ta, mu */
...
---
name: undef_passthru_src_undef_passthru
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: undef_passthru_src_undef_passthru
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 4 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    %passthru:vr = COPY $v8
    %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
    %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
---
name: undef_passthru
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: undef_passthru
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    %passthru:vr = COPY $v8
    %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
    %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 4, 5 /* e32 */, 1 /* ta, mu */
...
---
# Shouldn't be folded because the EEWs don't match
name: different_eew
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: different_eew
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr = PseudoVADD_VV_MF4 %passthru, $noreg, $noreg, 4 /* vl */, 4 /* e16 */, 0 /* tu, mu */
    ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_MF8 %passthru, %x, 4 /* vl */, 3 /* e8 */, 0 /* tu, mu */
    %passthru:vr = COPY $v8
    %x:vr = PseudoVADD_VV_MF4 %passthru, $noreg, $noreg, 4, 4 /* e16 */, 0 /* tu, mu */
    %y:vr = PseudoVMV_V_V_MF8 %passthru, %x, 4, 3 /* e8 */, 0 /* tu, mu */
...
---
name: kill_flag
tracksRegLiveness: true
body: |
  bb.0:
    ; CHECK-LABEL: name: kill_flag
    ; CHECK: [[PseudoVADD_VV_M1_:%[0-9]+]]:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1 /* vl=VLMAX */, 4 /* e16 */, 0 /* tu, mu */
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vr = COPY [[PseudoVADD_VV_M1_]]
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vr = COPY [[PseudoVADD_VV_M1_]]
    %0:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */
    %1:vr = PseudoVMV_V_V_M1 $noreg, %0, -1, 4 /* e16 */, 0 /* tu, mu */
    %2:vr = COPY killed %1
    %3:vr = COPY %0
...
---
name: diff_regclass
body: |
  bb.0.entry:
    liveins: $v8
    ; CHECK-LABEL: name: diff_regclass
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 $noreg, 0, 0 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vmv0 = COPY $v8
    ; CHECK-NEXT: [[PseudoVADD_VV_M1_MASK:%[0-9]+]]:vrnov0 = PseudoVADD_VV_M1_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY]], 0 /* vl */, 5 /* e32 */, 0 /* tu, mu */
    %0:vr = PseudoVMV_V_I_MF2 $noreg, 0, 0, 5 /* e32 */, 0 /* tu, mu */
    %1:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %0, 0, 5 /* e32 */, 0 /* tu, mu */
    %2:vmv0 = COPY $v8
    %3:vrnov0 = PseudoVADD_VV_M1_MASK %1, $noreg, $noreg, %2, 0, 5 /* e32 */, 0 /* tu, mu */
...
---
name: diff_regclass_passthru
body: |
  bb.0.entry:
    liveins: $v8
    ; CHECK-LABEL: name: diff_regclass_passthru
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 $noreg, 0, 0 /* vl */, 5 /* e32 */, 1 /* ta, mu */
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vmv0 = COPY $v8
    ; CHECK-NEXT: [[PseudoVLSE32_V_MF2_MASK:%[0-9]+]]:vrnov0 = PseudoVLSE32_V_MF2_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY]], 0 /* vl */, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 4)
    %2:vr = PseudoVMV_V_I_MF2 $noreg, 0, 0, 5 /* e32 */, 0 /* tu, mu */
    %3:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %2, 0, 5 /* e32 */, 0 /* tu, mu */
    %7:vmv0 = COPY $v8
    %6:vrnov0 = PseudoVLSE32_V_MF2_MASK %3, $noreg, $noreg, %7, 0, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 4)
...
---
name: move_vleff
body: |
  bb.0:
    liveins: $v8
    ; CHECK-LABEL: name: move_vleff
    ; CHECK: liveins: $v8
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vr = COPY $v8
    ; CHECK-NEXT: %x:vr, %vl:gpr = PseudoVLE32FF_V_M1 %passthru, $noreg, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 1)
    ; CHECK-NEXT: %y:gpr = ADDI $x0, 1
    %x:vr, %vl:gpr = PseudoVLE32FF_V_M1 $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size)
    %passthru:vr = COPY $v8
    %y:gpr = ADDI $x0, 1
    %z:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
---
name: vmerge_vvm
body: |
  bb.0:
    liveins: $v8, $v0
    ; CHECK-LABEL: name: vmerge_vvm
    ; CHECK: liveins: $v8, $v0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %passthru:vrnov0 = COPY $v8
    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
    ; CHECK-NEXT: %x:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, $noreg, %mask, 4 /* vl */, 5 /* e32 */
    %passthru:vrnov0 = COPY $v8
    %mask:vmv0 = COPY $v0
    %x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %passthru, $noreg, %mask, 4, 5 /* e32 */
    %z:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
---
name: commute_vfmadd
body: |
  bb.0:
    liveins: $x8, $v0, $v8, $v9, $v10
    ; CHECK-LABEL: name: commute_vfmadd
    ; CHECK: liveins: $x8, $v0, $v8, $v9, $v10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %avl:gprnox0 = COPY $x8
    ; CHECK-NEXT: %passthru:vrnov0 = COPY $v8
    ; CHECK-NEXT: %x:vr = COPY $v9
    ; CHECK-NEXT: %y:vr = COPY $v10
    ; CHECK-NEXT: %vfmadd:vrnov0 = nofpexcept PseudoVFMACC_VV_M1_E32 %passthru, %y, %x, 7 /* frm=dyn */, %avl /* vl */, 5 /* e32 */, 0 /* tu, mu */, implicit $frm
    %avl:gprnox0 = COPY $x8
    %passthru:vrnov0 = COPY $v8
    %x:vr = COPY $v9
    %y:vr = COPY $v10
    %vfmadd:vrnov0 = nofpexcept PseudoVFMADD_VV_M1_E32 %x, %y, %passthru, 7, %avl, 5 /* e32 */, 3 /* ta, ma */, implicit $frm
    %vmerge:vrnov0 = PseudoVMV_V_V_M1 %passthru, %vfmadd, %avl, 5 /* e32 */, 0 /* tu, mu */
...