# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 # RUN: llc -mtriple=riscv64 -start-before twoaddressinstruction \ # RUN: -stop-before riscv-asm-printer -o - %s -mattr=+v | FileCheck %s --- name: foo tracksRegLiveness: true body: | ; CHECK-LABEL: name: foo ; CHECK: bb.0: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: liveins: $x10, $x11 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: dead renamable $x10 = IMPLICIT_DEF ; CHECK-NEXT: dead renamable $v8m4 = IMPLICIT_DEF ; CHECK-NEXT: renamable $v8m4 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000) ; CHECK-NEXT: liveins: $v8m4 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype ; CHECK-NEXT: renamable $v12m4 = PseudoVLE32_V_M4 undef renamable $v12m4, undef renamable $x10, 0 /* vl */, 5 /* e32 */, 2 /* tu, ma */, implicit $vl, implicit $vtype :: (load unknown-size, align 4) ; CHECK-NEXT: renamable $v8m4 = PseudoVFMACC_VV_M4_E32 killed renamable $v8m4, undef renamable $v8m4, killed renamable $v12m4, 0 /* frm=rne */, 0 /* vl */, 5 /* e32 */, 1 /* ta, mu */, implicit $frm, implicit $vl, implicit $vtype ; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0X0 killed $x0, 146 /* e32, m4, tu, ma */, implicit-def $vl, implicit-def $vtype, implicit $vl ; CHECK-NEXT: renamable $v8m4 = PseudoVFMACC_VV_M4_E32 killed renamable $v8m4, undef renamable $v8m4, undef renamable $v8m4, 0 /* frm=rne */, 0 /* vl */, 5 /* e32 */, 0 /* tu, mu */, implicit $frm, implicit $vl, implicit $vtype ; CHECK-NEXT: BNE undef renamable $x10, $x0, %bb.1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: PseudoRET bb.0: successors: %bb.1(0x80000000) liveins: $x10, $x11 %28:gpr = IMPLICIT_DEF %29:vrm4 = IMPLICIT_DEF %23:vrm4 = IMPLICIT_DEF bb.1: successors: %bb.2(0x04000000), %bb.1(0x7c000000) %3:vrm4 = COPY killed %23 %13:vrm4 = PseudoVLE32_V_M4 undef %29, undef %28, 0, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size, align 4) %14:vrm4 = PseudoVFMACC_VV_M4_E32 killed %3, undef %29, killed %13, 0, 0, 5 /* e32 */, 1 /* ta, mu */, implicit $frm %4:vrm4 = PseudoVFMACC_VV_M4_E32 killed %14, undef %29, undef %29, 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $frm %23:vrm4 = COPY %4 BNE killed undef %28, $x0, %bb.1 PseudoBR %bb.2 bb.2: PseudoRET ...