; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+xandesbfhcvt -target-abi ilp32f \
; RUN:   -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,XANDESBFHCVT %s
; RUN: llc -mtriple=riscv32 -mattr=+zfh,+xandesbfhcvt -target-abi ilp32f \
; RUN:   -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,ZFH %s
; RUN: llc -mtriple=riscv64 -mattr=+xandesbfhcvt -target-abi lp64f \
; RUN:   -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,XANDESBFHCVT %s
; RUN: llc -mtriple=riscv64 -mattr=+zfh,+xandesbfhcvt -target-abi lp64f \
; RUN:   -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,ZFH %s

define float @fcvt_s_bf16(bfloat %a) nounwind {
; CHECK-LABEL: fcvt_s_bf16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    nds.fcvt.s.bf16 fa0, fa0
; CHECK-NEXT:    ret
  %1 = fpext bfloat %a to float
  ret float %1
}

define bfloat @fcvt_bf16_s(float %a) nounwind {
; CHECK-LABEL: fcvt_bf16_s:
; CHECK:       # %bb.0:
; CHECK-NEXT:    nds.fcvt.bf16.s fa0, fa0
; CHECK-NEXT:    ret
  %1 = fptrunc float %a to bfloat
  ret bfloat %1
}

; Check load and store to bf16.
define void @loadstorebf16(ptr %bf, ptr %sf) nounwind {
; XANDESBFHCVT-LABEL: loadstorebf16:
; XANDESBFHCVT:       # %bb.0: # %entry
; XANDESBFHCVT-NEXT:    lhu a2, 0(a0)
; XANDESBFHCVT-NEXT:    lui a3, 1048560
; XANDESBFHCVT-NEXT:    or a2, a2, a3
; XANDESBFHCVT-NEXT:    fmv.w.x fa5, a2
; XANDESBFHCVT-NEXT:    nds.fcvt.s.bf16 fa5, fa5
; XANDESBFHCVT-NEXT:    fsw fa5, 0(a1)
; XANDESBFHCVT-NEXT:    flw fa5, 0(a1)
; XANDESBFHCVT-NEXT:    nds.fcvt.bf16.s fa5, fa5
; XANDESBFHCVT-NEXT:    fmv.x.w a1, fa5
; XANDESBFHCVT-NEXT:    sh a1, 0(a0)
; XANDESBFHCVT-NEXT:    ret
;
; ZFH-LABEL: loadstorebf16:
; ZFH:       # %bb.0: # %entry
; ZFH-NEXT:    flh fa5, 0(a0)
; ZFH-NEXT:    nds.fcvt.s.bf16 fa5, fa5
; ZFH-NEXT:    fsw fa5, 0(a1)
; ZFH-NEXT:    flw fa5, 0(a1)
; ZFH-NEXT:    nds.fcvt.bf16.s fa5, fa5
; ZFH-NEXT:    fsh fa5, 0(a0)
; ZFH-NEXT:    ret
entry:
  %0 = load bfloat, ptr %bf, align 2
  %1 = fpext bfloat %0 to float
  store volatile float %1, ptr %sf, align 4

  %2 = load float, ptr %sf, align 4
  %3 = fptrunc float %2 to bfloat
  store volatile bfloat %3, ptr %bf, align 2

  ret void
}