# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 # RUN: llc -mtriple=wasm32-unknown-unknown -run-pass=legalizer,regbankselect,instruction-select %s -o - | FileCheck %s --- name: rotr_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 5, implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_1:%[0-9]+]]:i32 = CONST_I32 255, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_]], [[CONST_I32_]], implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_2:%[0-9]+]]:i32 = CONST_I32 3, implicit-def dead $arguments ; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments %0:_(i8) = G_TRUNC %2(i32) %1:_(i8) = G_CONSTANT i8 5 %3:_(i8) = G_ROTR %0, %1 %4:_(i32) = G_ANYEXT %3(i8) RETURN %4(i32), implicit-def $arguments ... --- name: rotrv_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 0, implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_1:%[0-9]+]]:i32 = CONST_I32 7, implicit-def dead $arguments ; CHECK-NEXT: [[SUB_I32_:%[0-9]+]]:i32 = SUB_I32 [[CONST_I32_]], [[ARGUMENT_i32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_2:%[0-9]+]]:i32 = CONST_I32 255, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_1:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_1]], [[AND_I32_]], implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_2:%[0-9]+]]:i32 = AND_I32 [[SUB_I32_]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[AND_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments %0:_(i8) = G_TRUNC %2(i32) %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments %1:_(i8) = G_TRUNC %3(i32) %4:_(i8) = G_ROTR %0, %1 %5:_(i32) = G_ANYEXT %4(i8) RETURN %5(i32), implicit-def $arguments ... --- name: rotr_i16 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i16 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 13, implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_1:%[0-9]+]]:i32 = CONST_I32 65535, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_]], [[CONST_I32_]], implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_2:%[0-9]+]]:i32 = CONST_I32 3, implicit-def dead $arguments ; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments %0:_(i16) = G_TRUNC %2(i32) %1:_(i16) = G_CONSTANT i16 13 %3:_(i16) = G_ROTR %0, %1 %4:_(i32) = G_ANYEXT %3(i16) RETURN %4(i32), implicit-def $arguments ... --- name: rotrv_i16 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i16 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 0, implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_1:%[0-9]+]]:i32 = CONST_I32 15, implicit-def dead $arguments ; CHECK-NEXT: [[SUB_I32_:%[0-9]+]]:i32 = SUB_I32 [[CONST_I32_]], [[ARGUMENT_i32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I32_2:%[0-9]+]]:i32 = CONST_I32 65535, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_1:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_1]], [[AND_I32_]], implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_2:%[0-9]+]]:i32 = AND_I32 [[SUB_I32_]], [[CONST_I32_1]], implicit-def dead $arguments ; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[AND_I32_2]], implicit-def dead $arguments ; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments %0:_(i16) = G_TRUNC %2(i32) %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments %1:_(i16) = G_TRUNC %3(i32) %4:_(i16) = G_ROTR %0, %1 %5:_(i32) = G_ANYEXT %4(i16) RETURN %5(i32), implicit-def $arguments ... --- name: rotr_i32 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i32 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments %1:_(i32) = G_CONSTANT i32 21 %2:_(i32) = G_ROTR %0, %1 RETURN %2(i32), implicit-def $arguments ... --- name: rotrv_i32 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i32 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments ; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[ARGUMENT_i32_1]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments %2:_(i32) = G_ROTR %0, %1 RETURN %2(i32), implicit-def $arguments ... --- name: rotr_i32_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i32_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments %1:_(i8) = G_CONSTANT i8 21 %2:_(i32) = G_ROTR %0, %1 RETURN %2(i32), implicit-def $arguments ... --- name: rotrv_i32_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i32_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 255, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments %1:_(i8) = G_TRUNC %2(i32) %3:_(i32) = G_ROTR %0, %1 RETURN %3(i32), implicit-def $arguments ... --- name: rotr_i64 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i64 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments ; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 37, implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[CONST_I64_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments %1:_(i64) = G_CONSTANT i64 37 %2:_(i64) = G_ROTR %0, %1 RETURN %2(i64), implicit-def $arguments ... --- name: rotrv_i64 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i64 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64 = ARGUMENT_i64 1, implicit $arguments ; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[ARGUMENT_i64_1]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments %2:_(i64) = G_ROTR %0, %1 RETURN %2(i64), implicit-def $arguments ... --- name: rotr_i64_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotr_i64_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments ; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 37, implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I64_1:%[0-9]+]]:i64 = CONST_I64 255, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments %1:_(i8) = G_CONSTANT i8 37 %2:_(i64) = G_ROTR %0, %1 RETURN %2(i64), implicit-def $arguments ... --- name: rotrv_i64_i8 tracksRegLiveness: true body: | bb.1.entry: liveins: $arguments ; CHECK-LABEL: name: rotrv_i64_i8 ; CHECK: liveins: $arguments ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments ; CHECK-NEXT: [[I64_EXTEND_U_I32_:%[0-9]+]]:i64 = I64_EXTEND_U_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments ; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 255, implicit-def dead $arguments ; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments ; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments ; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments %1:_(i8) = G_TRUNC %2(i32) %3:_(i64) = G_ROTR %0, %1 RETURN %3(i64), implicit-def $arguments ...