# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
--- |
  define void @test_merge_v128() {
    ret void
  }

  define void @test_merge_v256() {
    ret void
  }

...
---
name:            test_merge_v128
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
body:             |
  bb.1 (%ir-block.0):

    ; ALL-LABEL: name: test_merge_v128
    ; ALL: [[DEF:%[0-9]+]]:vr128x = IMPLICIT_DEF
    ; ALL-NEXT: [[DEF1:%[0-9]+]]:vr512 = IMPLICIT_DEF
    ; ALL-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vr512 = INSERT_SUBREG [[DEF1]], [[DEF]], %subreg.sub_xmm
    ; ALL-NEXT: [[VINSERTF32X4Zrri:%[0-9]+]]:vr512 = VINSERTF32X4Zrri [[INSERT_SUBREG]], [[DEF]], 1
    ; ALL-NEXT: [[VINSERTF32X4Zrri1:%[0-9]+]]:vr512 = VINSERTF32X4Zrri [[VINSERTF32X4Zrri]], [[DEF]], 2
    ; ALL-NEXT: [[VINSERTF32X4Zrri2:%[0-9]+]]:vr512 = VINSERTF32X4Zrri [[VINSERTF32X4Zrri1]], [[DEF]], 3
    ; ALL-NEXT: $zmm0 = COPY [[VINSERTF32X4Zrri2]]
    ; ALL-NEXT: RET 0, implicit $zmm0
    %0(<4 x s32>) = IMPLICIT_DEF
    %1(<16 x s32>) = G_CONCAT_VECTORS %0(<4 x s32>), %0(<4 x s32>), %0(<4 x s32>), %0(<4 x s32>)
    $zmm0 = COPY %1(<16 x s32>)
    RET 0, implicit $zmm0

...
---
name:            test_merge_v256
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
body:             |
  bb.1 (%ir-block.0):

    ; ALL-LABEL: name: test_merge_v256
    ; ALL: [[DEF:%[0-9]+]]:vr256x = IMPLICIT_DEF
    ; ALL-NEXT: [[DEF1:%[0-9]+]]:vr512 = IMPLICIT_DEF
    ; ALL-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vr512 = INSERT_SUBREG [[DEF1]], [[DEF]], %subreg.sub_ymm
    ; ALL-NEXT: [[VINSERTF64X4Zrri:%[0-9]+]]:vr512 = VINSERTF64X4Zrri [[INSERT_SUBREG]], [[DEF]], 1
    ; ALL-NEXT: $zmm0 = COPY [[VINSERTF64X4Zrri]]
    ; ALL-NEXT: RET 0, implicit $zmm0
    %0(<8 x s32>) = IMPLICIT_DEF
    %1(<16 x s32>) = G_CONCAT_VECTORS %0(<8 x s32>), %0(<8 x s32>)
    $zmm0 = COPY %1(<16 x s32>)
    RET 0, implicit $zmm0

...